EVALUATION OF RADIATION HARDNESS DESIGN TECHNIQUES TO IMPROVE RADIATION TOLERANCE FOR CMOS IMAGE SENSORS DEDICATED TO SPACE APPLICATIONS

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1 EVALUATION OF RADIATION HARDNESS DESIGN TECHNIQUES TO IMPROVE RADIATION TOLERANCE FOR CMOS IMAGE SENSORS DEDICATED TO SPACE APPLICATIONS P. MARTIN-GONTHIER, F. CORBIERE, N. HUGER, M. ESTRIBEAU, C. ENGEL, V. GOIFFON, P. MAGNAN (SUPAERO/CIMI), O. SAINT PE (EADS Astrium) Integrated Image Sensors Laboratory - SUPAERO TOULOUSE - FRANCE AMICSA

2 OUTLINES 1. Introduction and motivations 2. Radiation effects on image sensors 3. Technology and Test vehicle description 4. Ionizing radiation effects measurements 5. Conclusion 2

3 CIMI LABORATORY CIMI Research and development on CMOS image sensors Characterisation on CMOS image sensors (general measurements and specific as MTF) COLLABORATIONS APS750 3 Miniaturised star tracker Wafer of APS750FAST sensor for LOLA application (optical communications between planes and satellites) 3K linear sensor for earth observation 2Mpixel image sensor designed for space applications

4 INTRODUCTION AND MOTIVATIONS CMOS image sensors are nowadays extensively considered for several space applications Missions requirements may vary considerably in term of spectral band, flux amount, charge handling capacity, signal to noise ratio and also radiation tolerances CMOS standard processes for digital and mixed signal applications low power consumption applicability for on-chip signal processing large availability CMOS image sensors processes Improve electro-optic performances to reach high end applications THESE TECHNOLOGIES MUST BE COMPLIANT WITH RADIATION TOLERANCE DESIGN TECHNIQUES EXIST TO IMPROVE RADIATION TOLERANCE 4

5 RADIATION EFFECTS : IONIZING DOSE EFFECT Trapped holes : Radiation Hole-electron pairs created into oxide Into gate oxide Trapped holes induce threshold voltage shift Gate oxide NMOS Polysilicon I D ID=f(VG) before radiation ID=f(VG) after radiation N N+ P substrate Trapped holes Into Field oxide Trapped holes induce an increase of leakage current (in bird s beak region) V T V G Field oxide I GS source gate drain Trapped holes Increasing of total dose Bird s beak 5 V GS

6 RADIATION EFFECTS : IONIZING DOSE EFFECT Trapped holes : Into field oxide Trapped holes create N-channel between 2 NMOS NMOS 1 NMOS 2 N+ N N+ N+ P substrate Interface states : Radiation dangling bonds at SiO 2 /Si interface filled by electrons or holes (it depends on MOS transistor type) induce threshold voltage shift and leakage current SiO2 Parasitic TMOS NMOS TRANSISTOR SiO 2 Interface PMOS TRANSISTOR N+ N+ P+ P+ P substrate Nwell 6

7 RADIATION EFFECTS Displacement effects particles (proton,neutrons ) create atom displacement and interstices Minority carrier lifetime decrease Mobility decrease Carrier charge density modification Electric field increase Quantum efficiency reduction Dark current and Dark current non uniformity increase SEL and SEU effects heavy particles lay down energy along its trajectory in silicon This effect can induce change on memory point (SEU) or put in conduction parasitic thyristor in a CMOS logic gate composed of PMOS and NMOS transistors. 7

8 RADIATION EFFECTS ON IMAGE SENSORS IO PAD DECODERS Pixel: leakage current & impact on analog performances of active electronic READOUT CIRCUIT Readout circuit : impact on analog performances Decoders : impact on performances & SEL and SEU PIXEL ARRAY Timing and controls : impact on performances & SEL and SEU IO PAD : SEL and SEU TIMING AND CONTROLS 8

9 HARDNESS DESIGN TECHNIQUES IONIZING DOSE : use of ELT (Enclosed layout Transistors) MOS use of P+ guard rings L S or D D or S NMOS 1 NMOS 2 N+ N+ P+ N+ N+ GATE P substrate Guard ring P+ P SUBSTRATE SEL & SEU : use of P+ guard rings use of epitaxial substrate 9

10 ROW DECODER AMS OPTO 0.35µm 2P/3M technology NOT USED 64x32 STRUCTURE 2 64x32 NOT USED 64x64 COLUMN DECODER NOT USED 64x32 OPTICAL GUARD RING STRUCTURE 3 64x32 STRUCTURE 4 64x64 NOT USED 64x64 STRUCTURE 5 64x64 OPTICAL GUARD RING READOUT CIRCUIT 2 (HARDENED) COLUMN DECODER READOUT CIRCUIT 1 (STANDARD) STRUCTURE 1 64x64 NOT USED 64x64 TECHNOLOGY AND TEST VEHICLE analog standard process derived from core process (digital process) Improved for image sensors Improvements are in 3 ways: STRUCTURE 2 use of a deep epitaxial layer use of an antireflective coating optimisation of superficial layers (passivation) Test vehicle designed to evaluate ionizing dose tolerance on photosensitive area STRUCTURE 3 STRUCTURE 1 STRUCTURE 5 STRUCTURE 4 128x256 pixels array composed of 10 sub-arrays. 5 sub-arrays (two of 64x32 pixels and three of 64x64 pixels) are considered in this study 10

11 TECHNOLOGY AND TEST VEHICLE All pixels in the test vehicle are 3T structures with a pitch of 15µm RST i VDD_RST T 1 VDD_A 1st phase : At the beginning of a line period, the photodiode is reset by transistor T1. Reference level is carried out by the follower transistor (T2) and selection row switch (T3) and sampled at the bottom of the column. Photons photodiode V Ph Ph T2 T3 Vpix SelY i 2nd phase : During integration time, photodiode is in self-integrating mode (integrating charges in its own capacitance). 3rd phase : At the end of integration, signal is read out through the follower transistor and selection row switch and sampled Another cycle (next frame) can start Column Bus N+ and Nwell diffusion photodiode as recommended by the founder AMS This pixel is the baseline structure for this technology No ELT MOS in readout circuit and no guard rings with P+ implant between transistors and around photosensitive area. Readout circuit for this pixel is totally standard with no PASSIVATION LAYER P substrate 11 Epitaxial layer P - hardening special techniques STRUCTURE 1 N+ Nwell

12 TECHNOLOGY AND TEST VEHICLE STRUCTURE 2 STRUCTURE 3 PASSIVATION LAYER PASSIVATI PASSIVATION LAYER PASSIVATI N+ P+ N+ Nwell P+ Epitaxial layer P - Epitaxial layer P - P substrate P substrate N+ diffusion for photosensitive area ELT MOS & P+ guard rings (avoid leakage current due to radiation) N+ & NWELL diffusion for photosensitive area ELT MOS & P+ guard rings (avoid leakage current due to radiation) PASSIVATION LAYER STRUCTURE 4 Nwell P+ Epitaxial layer P - PASSIVATI STRUCTURE 5 PASSIVATION LAYER P+ Nwell P+ Epitaxial layer P - P substrate NWELL implant with partially no Field oxide for photosensitive area ELT MOS & P+ guard rings (avoid leakage current due to radiation) P substrate NWELL implant with no Field oxide for photosensitive area ELT MOS & P+ guard rings (avoid leakage current due to radiation) 12

13 TECHNOLOGY AND TEST VEHICLE 2 readout circuits on the test vehicle : One readout circuit for reference pixel totally standard with no hardening special techniques One readout circuit totally hardened for other pixel Digital parts and IO PADs : Hardened READOUT CIRCUIT WITH ELT MOS IO PADS DECODER 13

14 MEASUREMENT RESULTS MEASUREMENTS WITHOUT IRRADIATIONS Peak Quantum Efficiency Conversion gain (µv/e) Dark current (na/cm²) 10 C 20 C Noise in rms electron Structure 1 43 % Structure 2 28 % Structure 3 42 % Structure 4 42 % Structure 5 42 % Quantum efficiency is higher for NWELL structures Conversion gain is higher for NWELL structures Dark current depends on structure types Quantum Efficiency x FF (%) STRUCTURE 2 STRUCTURE 3 STRUCTURE 1 STRUCTURE 4 STRUCTURE Wavelength (nm) QUANTUM EFFICIENCY 14

15 MEASUREMENT RESULTS Radiation tolerance (total dose) Cobalt 60 irradiations were performed at ONERA Toulouse with a dose rate of 160 rad/h. Measurements were done for 4, 15, 25, 50 and 100 krad radiation levels in a first step. Annealing was done at 80 C during one w eek for all irradiated parts 1200 Output (mv) Pre-Irrad Post-Irrad Annealing slopes of the curves represent quantum efficiency multiplied by conversion gain For all structures : no differences between slopes ,0E+00 1,0E+05 2,0E+05 3,0E+05 4,0E+05 5,0E+05 6,0E+05 7,0E+05 8,0E+05 9,0E+05 1,0E+06 Photons/pixel no major impact of ionizing radiation at least up to 100krad for quantum efficiency and conversion gain QUANTUM EFFICIENCY x CONVERSION GAIN 15

16 MEASUREMENT RESULTS ,79 Pre-Irrad Post-Irrad 13,12 14,45 Dark Current (na/cm²) ,11 Annealing 4,27 3,64 4,48 5,84 7,79 7,04 2 0,46 1,18 2,03 0,76 1,23 0 STRUCTURE 1 STRUCTURE 2 STRUCTURE 3 STRUCTURE 4 STRUCTURE 5 Structure 4KRAD 450,00 400,00 350,00 394,13 Pre-Irrad Post-Irrad Important impact of annealing on all structures Dark Current (na/cm²) KRAD 300,00 250,00 200,00 150,00 100,00 50,00 0,00 0,64 43,67 1,59 Annealing 122,51 10,82 0,82 246,52 STRUCTURE 1 STRUCTURE 2 STRUCTURE 3 STRUCTURE 4 STRUCTURE 5 35,17 Structure 1,33 254,96 35,83 3,54 27,84 17,05

17 MEASUREMENT RESULTS Dark Current Relative Increase 80,00 70,00 60,00 50,00 40,00 30,00 20,00 10,00 0,00 STRUCTURE 2 STRUCTURE 3 STRUCTURE 1 STRUCTURE 4 STRUCTURE 5 0,00 10,00 20,00 30,00 40,00 50,00 60,00 70,00 80,00 90,00 100,00 Total Dose (krad) Relative increase of dark current at 100 Krad after annealing: Structure 1 : 68 (43.7 na/cm 2 ) Structure 2 : 6.8 (10.8 na/cm 2 ) Structure 3 : 43.1 (35.2 na/cm 2 ) Structure 4 : 26.9 (35.8 na/cm 2 ) Structure 5 : 4.82 (17.1 na/cm 2 ) Structures 2 and 5 provide excellent results in terms of hardening dark current increase versus ionizing dose stays low 17

18 MEASUREMENT RESULTS STRUCTURE 2 STRUCTURE 3 STRUCTURE 1 Image grabbed with the sensor at 50Krad STRUCTURE 4 STRUCTURE 5 STRUCTURE 2 STRUCTURE 3 STRUCTURE 1 Image grabbed with the sensor at 100Krad STRUCTURE 4 STRUCTURE 5 18

19 CONCLUSION GOOD BEHAVIOUR OF THE TEST VEHICLE UNDER IRRADIATIONS Design techniques exist to improve ionizing dose tolerance on image sensors and especially for photosensitive area use of ELT MOS use of guard rings (between TMOS and between photosensitive areas) special building of photosensitive area ensure good results with a minor of drawbacks (STRUCTURE 2 & 5) Weak impact of ionizing dose on Readout circuit, digital parts and IO PADs 19