Etching Small Samples and the Effects of Using a Carrier Wafer STS ICP-RIE

Transcription

1 Etching Small Samples and the Effects of Using a Carrier Wafer STS ICP-RIE This note is a brief description of the effects of bonding pieces to a carrier wafer during the etch process on the STS ICP-RIE. Users looking to etch Si on samples other than 100mm round Si wafers are required to mount their samples on a carrier wafer. The most common situations are users etching smaller die such as those used in e-beam lithography, or processes which require deep (>250um) Si etching due to the fragility of thinned wafers. As illustrated by the data and images below, the best bonding methods were either the or the photoresist, and using a Si wafer with a protective film. In this case a SiO2 layer on Si was used, but photoresist or other materials will have a similar effect, due to the reduction of exposed Si. The process for bonding using is to melt the (MP = 66oC) by heating the carrier wafer using a hotplate. A spot slightly smaller than the piece to be etched should be melted near the centre of the wafer, and the piece set on the melted. Remove the wafer from the hotplate and allow the substrate to cool. Once cooled, the will have hardened and the wafer will be ready for etching. Once etched, the crystalbond can be removed by soaking in a hot water bath, but may require sonication. If using HPR504 (or a similar resist), use a q-tip and place a drop or two of resist on the backside of the piece or directly on the wafer. Alternatively the resist can be spun over the entire wafer surface. Place the piece on the wafer, and press the piece to spread the resist. Bake the wafer using the litho hotplates for at least 5 minutes at 115oC to fully bake the resist. If the resist is not fully baked, any remaining liquid will form bubbles under the piece when placed under vacuum. This will likely lift the piece from the wafer, and will result in poor thermal conduction and a poor etch. Once etched, the resist can be removed by soaking in acetone, but again may require sonication. Both double-sided tape and kapton tape did not work well for this process. Although using these is a more simple and cleaner method of bonding, the lack of thermal conduction resulted in poor etching. Each adhesive has its pros and cons, it's up to the user to prioritize and decide what works best for their own process. The main issue with using a carrrier wafer is the sensitivity of the etch to wafer temperature. The chuck is cooled to 10C, with the wafer mechanically clamped to the chuck and Helium flowed between the wafer and the chuck to ensure good thermal contact. Stacking two pieces of Si together using some sort of adhesive will inevitably change the wafer temperature and in turn the actual etch. Two sets of runs were performed, one set using the above adhesion methods on a bare Si wafer, and one set using the same methods on a Si wafer with an SiO2 layer to illustrate the effects of the amount of total exposed Si on the overall etch rate. The samples used were small Si die, ~1cm x 1cm, with an SiO2 mask, bonded near the centre of the wafer, each die containing a variety of features. The Precision etch was processed for 5 minutes, and each die measured and imaged for comparison. Note that the etch rate and selectivity obtained during this process are to be used as a guidline only. The actual value will be differnt for all users, and is dependent on a number of items. Refer to other documentation for further information.

2 Etch Rate Etch Rate (um/min) Si Wafer SiO2 Wafer Double sided tape Kapton tape Bond Type Figure 1 Etch Rate of different bonding methods Selectivity 60 Selectivity (Si:SiO2) Si Wafer SiO2 Wafer Double sided tape Bond Type Figure 2 Selectivity of different bonding methods Kapton tape

3 Images: 5um posts on each die were imaged for comparison. This etch was done on a full 100mm wafer using the same mask as the smaller die.

4 Si Wafer Bonding Double Sided Tape Kapton Tape

5 SiO2 Wafer Bonding Double Sided Tape Kapton Tape