Semiconductor Manufacturing Technology. Semiconductor Manufacturing Technology. Photolithography: Resist Development and Advanced Lithography

Transcription

1 Semiconductor Manufacturing Technology Michael Quirk & Julian Serda October 2001 by Prentice Hall Chapter 15 Photolithography: Resist Development and Advanced Lithography

2 Eight Basic Steps of Photolithography Step Chapter Covered 1. Vapor prime Spin coat Soft bake Alignment and exposure Post-exposure bake Develop Hard bake Develop inspect 15 Table 15.1

3 Post Exposure Bake Deep UV Exposure Bake Temperature Uniformity PEB Delay Conventional I-Line PEB

4 Amine Contamination of DUV Resist leading to T-top Formation Region of unexposed photoresist Neutralized photoresist } Resist T-topping H + PAG H + H + H + H + PAG PAG PAG PAG PAG PAG H + H + H + Development H + PAG H + Acid-catalyzed reaction of exposed resist (post PEB) Figure 15.1

5 Reduction of Standing Wave Effect due to PEB Standing waves Unexposed photoresist Exposed photoresist (a) Exposure to UV light (b) Striations in resist (c) PEB causes diffusion (d) Result of PEB Figure 15.2

6 Develop Negative Resist Positive Resist Development Methods Resist Development Parameters

7 Photoresist Development Problems Resist Substrate X Under develop X Incomplete develop Correct develop X Severe overdevelop Figure 15.3

8 Negative Resist Crosslinking UV Exposed resist Unexposed resist Crosslinks Figure 15.4

9 Development of Positive Resist Resist exposed to light dissolves in the develop chemical. Unexposed positive resist Crosslinked resist Figure 15.5

10 Development Methods Continuous Spray Development Puddle Development

11 Resist Development with Continuous Spray Load Station Vapor Prime Resist Coat Spray Develop- Rinse Edge-bead Removal Transfer Station Wafer Transfer System Soft Bake Cool Plate Cool Plate Hard Bake To vacuum pump Vacuum chuck Spindle connected to spin motor (a) Wafer track system (b) Developer spray dispenser Figure 15.6

12 Puddle Resist Development Puddle formation Developer dispenser (a) Puddle dispense (b) Spin-off excess developer (c) DI H2O rinse (d) Spin dry Figure 15.7

13 Resist Development Parameters Developer Temperature Developer Time Developer Volume Normality Rinse Exhaust Flow Wafer Chuck

14 Hard Bake Characteristics of Hard Bake: Post-Development Exposure Evaporates Residual Solvent inphotoresist Hardens the Resist Improves Resist-to-Wafer Adhesion Prepares Resist for Subsequent Processing Higher Temperature than Soft Bake, but not to Point Where Resist Softens and Flows Resist Hardening with Deep UV

15 Softened Resist Flow at High Temperature Photoresist Figure 15.8

16 Develop Inspect Post-Develop Inspection to Find Defects Find Defects before Etching or Implanting Prevents Scrap Characterizes the Photo Process by Providing Feedback Regarding Quality of the Lithography Process Develop Inspect Rework Flow

17 Develop Inspect Rework Flow UV light HMDS Resist Mask 1. Vapor prime 2. Spin coat 3. Soft bake 4. Align and expose 5. Post-exposure bake O 2 Rejected wafers Plasma Strip and clean 8. Develop inspect 7. Hard bake 6. Develop Rework Ion implant Passed wafers Etch Figure 15.9

18 Advanced Lithography Next Generation Lithography Extreme UV (EUV) SCALPEL Ion Projection Lithography (IPL) X-Ray Advanced Resist Processing Development Trends of Photoresistand Lithography DESIRE Process

19 Photolithography Improvements 1. Reduction in wavelength of the UV light source. 2. Increase in numerical aperture. 3. Chemically amplified DUV resists 4. Resolution enhancement techniques (e.g., phase-shift masks and optical proximity correction). 5. Wafer planarization (chemical mechanical planarization, or CMP) to reduce surface topography. 6. Advances in photolithography equipment (e.g., stepper and step-and-scan). Table 15.2

20 Concept for Extreme Ultraviolet Lithography High power laser Step-and-scan 4 reflection reticle Multilayer coated mirrors EUV Plasma ¼ image of reticle Target material Vacuum chamber Step-and-scan wafer stage Redrawn from International SEMATECH's Next Generation Lithography Workshop Brochure Figure 15.10

21 Concept of SCALPEL Electron beam Step-and-scan reticle stage Electrostatic lens system (4:1 reduction) Step-and-scan wafer stage Vacuum chamber Redrawn from International SEMATECH's Next Generation Lithography Workshop Brochure Figure 15.11

22 Ion Projection Lithography Ion source Ion beam Mask Reference plate Electrostatic lens system (4:1 reduction) Step-and-scan wafer stage Vacuum chamber Redrawn from International SEMATECH's Next Generation Lithography Workshop Brochure Figure 15.12

23 Concept of X-ray Photomask Gold plated chrome pattern X-ray absorbers Silicon wafer Glass frame Window etched into lower membrane Membrane X- r ay s Scanning X-rays are directed toward a production wafer through a photomask similar to this one. Redrawn from C. Y. Chang and S. M. Sze, ULSI Technology, edited by C. Y. Chang and S. M. Sze (New York: McGraw-Hill 1996) p.314 Figure 15.14

24 Development Trends of Photoresist and Lithography Negative photoresist 1970s 10 µm Contact Printer Positive photoresist (DNQ-Novolak) 1980s 1.2 µm 1 µm Scanning Aligner G-line Stepper 0.40 µm I-line Stepper Chemical amplification 1990s 0.35 µm PSM, OAI DUV Stepper 0.18 µm DUV Step and Scan Advanced photoresist top surface imaging 2000s µm µm Figure EUV Step and Scan SCALPEL IPL, X-ray

25 Top Surface Imaging UV Exposed resist Exposed Crosslinked Unexposed resist (a) Normal exposure process (b) Post exposure bake Si HMDS Si Silylated exposed resist O 2 plasma develop (c) Vapor phase silyation (d) Final developed pattern Figure 15.16