FINDINGS. REU Student: Philip Garcia Graduate Student Mentor: Anabil Chaudhuri Faculty Mentor: Steven R. J. Brueck. Figure 1

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1 FINDINGS REU Student: Philip Garcia Graduate Student Mentor: Anabil Chaudhuri Faculty Mentor: Steven R. J. Brueck A. Results At the Center for High Tech Materials at the University of New Mexico, my work was centered on the Nanolithography for Concentrator Solar Cells project. When I started at the Center for High Tech Materials, my knowledge of optics and optical physics was very minimal. I first had to learn the basics of how high powered lasers work and safety precautions associated with using lasers. I also had to learn the optical physics associated with interference lithography, and I had to learn about optical components associated with lasers and lithography. I had to learn how to clean and cleave silicon wafers. I had to learn how to use the wafer spinners in Dr. Brueck s lab as well as the spinners in the clean room. There were two types of hot plates at the Center for High Tech Materials that I had to learn how to use. One was a standard laboratory hot plate, but the second type of hot plate was designed for soft bake and hard bake processes. I also had to learn how to use a Jeol scanning electron microscope. The electron microscope was vital to my research at the Center for High Tech Materials, because it allowed me to see if my samples met the requirements of the project. Once I had a basic understanding of the tools and physics associated with interference lithography, I was allowed to clean, spin, bake, expose, and develop my first sample on a silicon substrate using a Lloyd s mirror setup (see below). Figure 1

2 Figure 2 Figure 3 Figures 1-3 are from my attempt at interference lithography. Figure 3 clearly shows that the lines are far too wide to be used for the solar cell project. Figure 2 shows that the lines are not completely vertical. If this sample were to be used for the solar cell project, then the angle formed by the sides of the lines will cause problems during the chromium deposition stage, because a layer of chromium will be deposited on the side of the lines. If there is a layer of chromium coating the sides of the lines, then the solvent will not be able to completely wash the photoresist off of the sample. Figures 1 and 3 show that a layer of anti-reflective coating was applied to the sample. The layer of anti-reflective coating is the thin layer immediately below the lines but above the silicon substrate. Despite a layer of anti-reflective coating, the corrugated pattern on the sides of the lines in figure 1 shows that a standing wave formed during the exposure step. After my first few successful lithography samples, I began experimenting to achieve the results needed for the solar cell project.

3 I quickly realized that the Lloyd s mirror setup was less than ideal, because the stage needed to be set at an angle of about 5 degrees from normal to achieve a pitch of 2 micrometers. The 5 degree angle did achieve the 2 micrometer pitch, but the region of interference on the sample was extraordinarily small. I was then informed that the lab had a prism with a two micrometer pitch. I quickly switched my setup to incorporate the prism, because it had the correct pitch, but did not restrict the area exposed to the interference pattern in the same way that the Lloyd s mirror did. When working with the prism, I was informed that I could check the pattern on my sample by scratching the surface of the exposed sample, then using an optical microscope to scan the sample for areas of broken lines, how the lines appear along the scratch, and the relative width between the lines, which show in black, and the region that was washed off by the developing step, which shows in white. The ability to quickly check a sample allowed me to expose more samples with a wide variety of exposure parameters. After hundreds of samples with different bake temperatures, photoresist and anti-reflective coating thicknesses, exposure times, exposure power, and developing times, I was able to get a two micrometer pitch with lines that are just less than 200 nanometers. Using what I found to be the ideal bake temperatures, photoresist and anti-reflective coating thicknesses, and developing times, any exposure beyond 19 seconds would result in lines that were fragile, collapsed, or completely missing. Since 200 nanometer lines were not sufficiently narrow for the solar cell project, I begin experimenting again using the Lloyd s mirror setup. The Lloyd s mirror setup allowed me to expose the samples for a much longer period of time, approximately 40 seconds, before the lines began to collapse or disappear (see figures below). Figure 4: 1.3um pitch with ~100nm lines x40k magnification

4 Figure 5: 1.3um pitch with ~100nm lines x10k magnification Figures 4 and 5 both show lines that are much more narrow than those in figures 1-3. The sides of the lines are almost completely vertical, and there is no standing wave pattern. These samples meet the preliminary requirements for the solar cell project. At this point, I proceeded to work on a method for the deposition of chromium. Using evap 02 in the cleanroom of the Center for High Tech Materials, I deposited chromium in thicknesses from 300 Angstroms to 700 Angstroms on samples that were patterned similar to the one in figures 4 and 5 (see figures 6 and 7). Figure 6: 1.5um pitch with ~100nm lines x22k magnification 30nm Cr deposition

5 Figure 7: 1.3um pitch with ~100nm lines x10k magnification 30 nm Cr deposition A thin layer of chromium can be seen on top of the line and along the flat area between the lines on figure 6. At this point, I needed to find a way to remove the photoresist lines leaving just the groves between the chromium, which will serve as the mold for the top contact grid. Since photoresist is soluble in acetone, I tried two methods to remove the photoresist lines. First an acetone bath, where I soaked the sample in acetone for varying times. This resulted in only portions of the lines being removed, and was therefore an ineffective method. The second method that I used was spraying the sample with an acetone gun. This method had enough pressure to remove any excess photoresist, leaving us with groves that could function as mold for the top contact grid of the solar cell (see figures 8 and 9). Figure 8: Image courtesy of Anabil Chaudhuri

6 Figure 9: Image courtesy of Anabil Chaudhuri B. Conclusions I believe that the prism did not work for creating fine lines because there was excessive DC offset. In lithography, DC offset gives a slight exposure to all regions of the sample, and when the line to pitch ratio is high, then DC offset can cause the pattern to develop away. The DC offset in the prism was probably caused because the leading edge of the prism was slightly rounded. I believe that the acetone bath did not work in completely removing the lines, because the sides of the lines were not perfectly normal to the surface of the sample. This caused chromium to be deposited along the sides of the lines, thus shielding the photoresist lines from the acetone. This procedure has shown that it is possible to use interference lithography to create a mold for the top contact grid of a solar cell. One of the solar cells from IMM had a mold for the top contact grid applied on top of a dielectric layer at the Center for High Tech Materials, and was returned to IMM for further processing. C. Future Work Since this is a self-contained project, the portion of the project done at the Center for High Tech Materials has been completed. IMM has several more processing steps before the device can be operational. IMM is going to take the device and apply a layer of photoresist on top of the chromium to use conventional lithography to pattern a busbar for the top and bottom of the device (see figures 10 and 11).

7 Figure 10: Image courtesy of Jose Ripalda (IMM) Figure 11: Image courtesy of Jose Ripalda (IMM) Once the photolithography for the busbar is complete IMM will then etch through the chromium, exposing the anti-reflective coating underneath (see figures 12 and 13). Figure 12: Image courtesy of Jose Ripalda (IMM)

8 Figure 13: Image courtesy of Jose Ripalda (IMM) IMM is planning on using H 3 PO 4 to etch through the chromium. After the etching is done, IMM will etch through the anti-reflective coating and the dielectric layer. This will expose the device substrate. Once the device substrate is exposed, the metal for the contacts will be deposited (see figure 14). Figure 14: Image courtesy of Jose Ripalda (IMM) IMM will then lift off the anti-reflective coating. This should also remove any excess contact metal as well as any remaining chromium. This should leave the dielectric layer to serve as a mold in which copper will be deposited finishing the top contact grid (see figure 15). Figure 15: Image courtesy of Jose Ripalda (IMM) After the copper wires are deposited, the dielectric layer will be etched off using HF. This should be the last processing step for the device (see figures 16 and 17).

9 Figure 16: Image courtesy of Jose Ripalda (IMM) Figure 17: Image courtesy of Jose Ripalda (IMM)