STP75NE75 STP75NE75FP

Transcription

1 STP75NE75 STP75NE75FP N - CHNNEL 75V Ω - 75 TO-220/TO-220FP STripFET POWER MOSFET TYPE V DSS R DS(on) I D STP75NE75 STP75NE75FP 75 V 75 V < Ω < Ω TYPICL RDS(on) = 0.01 Ω EXCEPTIONL dv/dt CPBILITY 100% VLNCHE TESTED PPLICTION ORIENTED CHRCTERIZTION DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique "Single Feature Size " strip-based process. The resulting traistor shows extremely high packing deity for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. PPLICTIONS SOLENOID ND RELY DRIVERS DC MOTOR CONTROL, UDIO MPLIFIERS DC-DC CONVERTERS UTOMOTIVE ENVIRONMENT TO-220 TO-220FP INTERNL SCHEMTIC DIGRM BSOLUTE MXIMUM RTINGS Symbol Parameter Value Unit STP75NE75 STP75NE75FP V DS Drain-source Voltage (V GS = 0) 75 V V DGR Drain- gate Voltage (R GS = 20 kω) 75 V V GS Gate-source Voltage ± 20 V I D Drain Current (continuous) at T c = 25 o C I D Drain Current (continuous) at T c = 100 o C I DM( ) Drain Current (pulsed) P tot Total Dissipation at T c = 25 o C W Derating Factor W/ o C V ISO Iulation Withstand Voltage (DC) 2000 V dv/dt Peak Diode Recovery voltage slope 7 V/ T stg Storage Temperature -65 to 175 T j Max. Operating Junction Temperature 175 ( ) Pulse width limited by safe operating area (1) ISD 75, di/dt 300 /µs, VDD V(BR)DSS, Tj TJMX May 1999 o C o C 1/9

2 THERML DT TO-220 TO-220FP R thj-case Thermal Resistance Junction-case Max R thj-amb Thermal Resistance Junction-ambient Max 62.5 R thc-sink Thermal Resistance Case-sink Typ 0.5 T l Maximum Lead Temperature For Soldering Purpose 300 o C/W o C/W o C/W o C VLNCHE CHRCTERISTICS Symbol Parameter Max Value Unit I R valanche Current, Repetitive or Not-Repetitive 75 (pulse width limited by T j max) E S Single Pulse valanche Energy (starting T j = 25 o C, I D = I R, V DD = 30V) 200 mj ELECTRICL CHRCTERISTICS (Tcase = 25 o C unless otherwise specified) OFF Symbol Parameter Test Conditio Min. Typ. Max. Unit V (BR)DSS Drain-source Breakdown Voltage I D = 250 µ V GS = 0 75 V I DSS I GSS Zero Gate Voltage Drain Current (V GS = 0) Gate-body Leakage Current (V DS = 0) V DS = Max Rating V DS = Max Rating T c = 125 o C V GS = ± 20 V ± 100 n 1 10 µ µ ON ( ) Symbol Parameter Test Conditio Min. Typ. Max. Unit V GS(th) Gate Threshold Voltage V DS = V GS I D = 250 µ V R DS(on) Static Drain-source On Resistance V GS = 10V I D = Ω I D(on) On State Drain Current V DS > I D(on) x R DS(on)max V GS = 10 V 75 DYNMIC Symbol Parameter Test Conditio Min. Typ. Max. Unit g fs ( ) Forward Traconductance V DS > I D(on) x R DS(on)max I D = S C iss C oss C rss Input Capacitance Output Capacitance Reverse Trafer Capacitance V DS = 25 V f = 1 MHz V GS = pf pf pf 2/9

3 ELECTRICL CHRCTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditio Min. Typ. Max. Unit t d(on) t r Q g Q gs Q gd Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 40 V I D = 40 R G = 4.7 Ω V GS = 10 V (Resistive Load, see fig. 3) V DD = 60 V I D = 75 V GS = 10 V nc nc nc SWITCHING OFF Symbol Parameter Test Conditio Min. Typ. Max. Unit t d(off) t f t r(voff) t f t c Turn-off Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time V DD = 40 V I D = 40 R G = 4.7 Ω V GS = 10 V (Resistive Load, see fig. 3) V clamp = 60 V I D = 75 R G = 4.7 Ω V GS = 4.5 V (Inductive Load, see fig. 5) SOURCE DRIN DIODE Symbol Parameter Test Conditio Min. Typ. Max. Unit I SD I SDM ( ) Source-drain Current Source-drain Current (pulsed) V SD ( ) Forward On Voltage I SD = 75 V GS = V t rr Reverse Recovery I SD = 75 di/dt = 100 /µs 130 Time V DD = 30 V T j = 150 o C Q rr I RRM Reverse Recovery Charge Reverse Recovery Current (see test circuit, fig. 5) µc ( ) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( ) Pulse width limited by safe operating area Safe Operating rea for TO-220 Safe Operating rea for TO-220FP 3/9

4 Thermal Impedance for TO-220 Thermal Impedance forto-220fp Output Characteristics Trafer Characteristics Traconductance Static Drain-source On Resistance 4/9

5 Gate Charge vs Gate-source Voltage Capacitance Variatio Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9

6 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching nd Diode Recovery Times 6/9

7 TO-220 MECHNICL DT DIM. mm inch MIN. TYP. MX. MIN. TYP. MX C D D E F F F G G H L L L L L L DI D1 F G H2 C D E L2 G1 F1 Dia. L5 L7 L9 F2 L6 L4 P011C 7/9

8 TO-220FP MECHNICL DT DIM. mm inch MIN. TYP. MX. MIN. TYP. MX B D E F F F G G H L L L L L Ø H G B D E L6 L7 L3 F1 F G1 L2 F2 L /9

9 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no respoibility for the coequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licee is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics Printed in Italy ll Rights Reserved STMicroelectronics GROUP OF COMPNIES ustralia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.. 9/9