IRF540 N-CHANNEL 100V Ω - 22A TO-220 LOW GATE CHARGE STripFET II POWER MOSFET

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1 N-CHANNEL 100V Ω - 22A TO-220 LOW GATE CHARGE STripFET II POWER MOSFET TYPE V DSS R DS(on) I D IRF V <0.077 Ω 22 A TYPICAL R DS (on) = 0.055Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE APPLICATION ORIENTED CHARACTERIZATION DESCRIPTION This MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced highefficiency, high-frequency isolated DC-DC converters for Telecom and Computer applicatio. It is also intended for any applicatio with low gate drive requirements. TO INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH-EFFICIENCY DC-DC CONVERTERS UPS AND MOTOR CONTROL Ordering Information SALES TYPE MARKING PACKAGE PACKAGING IRF540 IRF540& TO-220 TUBE ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (V GS = 0) 100 V V DGR Drain-gate Voltage (R GS = 20 kω) 100 V V GS Gate- source Voltage ± 20 V I D Drain Current (continuous) at T C = 25 C 22 A I D Drain Current (continuous) at T C = 100 C 15 A I DM ( ) Drain Current (pulsed) 88 A P tot Total Dissipation at T C = 25 C 85 W Derating Factor 0.57 W/ C dv/dt (1) Peak Diode Recovery voltage slope 9 V/ E AS (2) Single Pulse Avalanche Energy 220 mj T stg Storage Temperature Max. Operating Junction Temperature -55 to 175 C T j ( ) Pulse width limited by safe operating area. 1) I SD 22A, di/dt 300A/µs, V DD V (BR)DSS, T j T JMAX (2) Starting T j = 25 oc, I D = 12A, V DD = 30V February 2003 NEW DATASHEET ACCORDING TO PCN DSG/CT/1C16 MARKING: IRF540 & 1/8

2 THERMAL DATA Rthj-case Rthj-amb T l Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max Typ C/W C/W C ELECTRICAL CHARACTERISTICS (T case = 25 C unless otherwise specified) OFF V (BR)DSS Drain-source Breakdown Voltage I D = 250 µa, V GS = V I DSS Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating V DS = Max Rating T C = 125 C 1 10 µa µa I GSS Gate-body Leakage Current (V DS = 0) V GS = ± 20V ±100 na ON (1) V GS(th) Gate Threshold Voltage V DS = V GS I D = 250 µa V R DS(on) Static Drain-source On Resistance V GS = 10 V I D = 11 A Ω DYNAMIC g fs (*) Forward Traconductance V DS =25 V I D = 11 A 20 S C iss C oss C rss Input Capacitance Output Capacitance Reverse Trafer Capacitance V DS = 25V, f = 1 MHz, V GS = pf pf pf 2/8

3 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON t d(on) t r Turn-on Delay Time Rise Time V DD = 50 V I D = 12 A R G = 4.7 Ω V GS = 10 V (Resistive Load, Figure 3) Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 80 V I D = 22 A V GS = 10V nc nc nc SWITCHING OFF t d(off) t f Turn-off Delay Time Fall Time V DD = 50 V I D = 12 A R G = 4.7Ω, V GS = 10 V (Resistive Load, Figure 3) SOURCE DRAIN DIODE I SD I SDM ( ) Source-drain Current Source-drain Current (pulsed) A A V SD (*) Forward On Voltage I SD = 22 A V GS = V t rr Q rr I RRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 22 A di/dt = 100A/µs V DD = 30 V T j = 150 C (see test circuit, Figure 5) nc A (*) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. ( )Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8

4 Output Characteristics Trafer Characteristics Traconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variatio 4/8

5 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature.. 5/8

6 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8

7 TO-220 MECHANICAL DATA DIM. mm. inch. MIN. TYP. MAX. MIN. TYP. TYP. A C D E F F F G G H L L L L L L L DIA /8

8 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no respoibility for the coequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licee is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificatio mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics 2003 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. 8/8

9 This datasheet has been download from: Datasheets for electronics components.

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