Foxton Technology. HotChips Sam Naffziger Intel Corp.
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1 Foxton Technology HotChips 2005 Sam Naffziger Intel Corp. 1
2 The Power Problem Power consumption is a primary limiter in today s processors and unfortunately, it varies a lot Part to part (processing) As a result of the application Due to temperature Watts Measured data of multiple Montecito parts: Power vs. part speed SORTOSC14 2 Y 1.8G FP(peak) 2.0G FP(peak)
3 The Power Problem Power consumption is a primary limiter in today s processors and unfortunately, it varies a lot Part to part (processing) As a result of the application Due to temperature Measure Montecito core power vs. application Power G Power Average 2.0G Power Peak Integer code int.181.mcf int.175.vpr int.186.crafty int.300.twolf int.254.gap int.197.parser int.164.gzip int.256.bzip2 int.253.perlbmk int.176.gcc int.255.vortex int.252.eon fp.177.mesa fp.168.wupwise fp.188.ammp Application FP code fp.187.facerec fp.301.apsi fp.191.fma3d fp.189.lucas fp.179.art fp.183.equake fp.173.applu fp.200.sixtrack fp.172.mgrid fp.171.swim 3 fp.178.galgel Pathological Virus
4 Current Approaches to Power Management and Reduction Split out the thermal power spec from the max electrical power spec Use Thermal Design Power (TDP) to spec a sustained power that is lower than the true maximum ( electrical power ) Counts on the rarity of very high power events Relies on a thermal sensor to throttle the part if it s too hot Allows a lower cost thermal solution, but power supplies and power delivery must still handle the max electrical power Dynamic Voltage Scaling (C states/p states) Conserve energy when the processor is under-utilized to reduce average power Fuse in a Vcc that is part-specific Higher power but faster parts can use a lower voltage at the same frequency 4
5 The Ideal Power Management for Servers and Desktop We currently over-design our power supplies and thermal solutions for worst case parts and applications Most of the time the part isn t fully using the watts we ve allocated for it Lower power applications only run as fast as the highest power ones!we want to maximize performance / Watt for all situations!we want a processor to adapt operating point dynamically to it s situation This is what Foxton Technology does 5
6 What is Foxton? An integrated system that dynamically maximizes performance per watt including Accurate, integrated power measurement Integrated temperature measurement Frequency control to maximize hertz/volt A microcontroller to incorporate instantaneous {power, temperature, voltage, frequency} and optimize the operating point The result is processor cores doing their computation at optimal power efficiency 6
7 High Level View of System Power Sensor Thermal Sensor 10s of µs Micro-Controller Supply VRM Voltage Sensor Voltage to Freq. Converter Clock 100s of ps 7
8 Power Consumption Contour Power (Watts) Optimization point is for typical integer applications which have.6x the switching power of the worst case! Amdahl s law Activity Factor GHz= F(V) Manufacturing test is accomplished by observing the self measured power, and the self-generated frequency for typical code at the power limit 8
9 Measuring Power V Connector V Die R Package Use package resistance to measure power Avoids burning extra power in measurement Portable, self-contained solution No dependence on external power supply 9
10 Power Control System P Limit + - IIR VID 6 DAC + - R Package A/D V Connector P Calc Calc A/D V Die Micro-Controller Power Supply Package/Die 10
11 Temperature Measurement Power Supply V Fixed Die 6 VID V Thermal A/D Converters Micro Controller Calibrate the voltage drop at test to T J target (90C) Use the known -1.7mV per degree C temperature coefficient to calculate die temperature Measure the voltage drop across the diodes every 20ms 11
12 Package Resistance Calibration V c2 -V d2 V c1 -V d1 R Package ( V V ) ( V V ) c2 d 2 c1 d1 RPackage = I Delta I 0 I 0 +I Delta Package resistance can be computed with two voltage measurements with processor stalled Pulling quiescent current I 0 Pulling I 0 + a precision, on-die generated current I Delta On-package precision R for consistent I Delta 66ms recalibration rate 12
13 Frequency 100% 96% 92% 88% Frequency vs. Power Limit Measured Data Core 0, Core 1, Avg Frequency vs. P Limit A 31% power redux for a 10% frequency hit 84% 100W 95W 90W 85W 80W 75W 70W 65W 60W P Limit Core 0 Frequency Core 1 Frequency Avg Frequency 13
14 Managing Frequency Voltage variability costs frequency and hence performance/watt A clock system that can track rapid voltage changes will both maximize hertz/volt and provide smooth response to micro-controller induced voltage changes Vcc(t) F(V(t)) Today: Minimum Vcc(t) determines maximum frequency. Foxton: Average Vcc(t) determines average frequency. F avg (t) F min (t) New FMAX Old FMAX 14
15 A Variable Frequency Clock System Bus Clock (200MHz) 1/M (M=10) PLL Fmax (2.0GHz) DFD L0 Rptr (D=16) DFD (D=16) DFD (D=0) 2 RVD (+/-) DFD VFC D=f(P,V,T) I/Os (1.6GHz) SLCB Bus Logic (1.6GHz) Foxton µc (1.0GHz) VID Icore VID=f(Power,T) Core Logic (.504*Fmax Fcore Fmax) MVR VCORE (dynamic) 15
16 Montecito Clock System Floorplan RVDs PLL / translation table / clock control CORE 0 Core DFDs FSB DFDs Foxton Controller DFD Bus Logic DFD FSB DFDs CORE 1 16
17 Clock System Modes Fixed Frequency (FFM) Cores/Uncore are frequency and phase aligned Cores/Uncore interfaces synchronous Variable Frequency (VFM) Core supply modulated by Foxton Controller to manage power envelope Core frequencies track Vcore via Regional Voltage Detector (RVD) V-F curves Respond to Foxton modulation and local transients V-F curves match worst-scaling paths on chip Core/Uncore interfaces asynchronous 17
18 RVD Delay Line in FINE R F F R odd coarse_sel R R COARSE F F F F F F F R R Dynamic Mux R R R 1.60E-09 RVD Delay Element FET 1.40E E-09 in 1 0 out 1.00E E E-10 metal1 resistor 4.00E E
19 DFD Output Clock Example VFC Supply Droop Response Clock period increased No Adjust needed this cycle Vcore RVD Delay Line Clock Droop increases RVD delay line delay Increased delay asserts period UP for one cycle Period UP to DFD 19
20 Speed gains from Adaptive Frequency 7.0% Speed Gain From VFC 6.0% 5.0% 4.0% 3.0% 2.0% 1.0% 0.0% Test 1 Test 2 Test 3 20
21 Summary Foxton is a system comprised of several key components Accurate power and temperature measurement Fine grained voltage control Dynamic fast-response frequency control A micro-controller to manage the system It can be wrapped around any processor or ASIC which can be virtually unchanged except: An asynchronous interface to the rest of the system Must support a wider range of operating voltages The result is a self-optimizing chip dynamically delivering greatly improved performance/watt 21
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