Application of Foldy-Lax Multiple Scattering Method To Via Analysis in Multi-layered Printed Circuit Board

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1 DesignCon 2008 Application of Foldy-Lax Multiple Scattering Method To Via Analysis in Multi-layered Printed Circuit Board Xiaoxiong Gu, IBM T. J. Watson Research Center Mark B. Ritter, IBM T. J. Watson Research Center

2 Abstract The authors applied Foldy-Lax multiple scattering equations to analyze signal and ground vias in a multi-layered printed circuit board. The Foldy-Lax method solves multiple via coupling between two power/ground planes. It also takes into account physical dimensions of via structures including drill size, anti-pad size and via spacing. Compared with the via models that we presented previously, the Foldy-Lax method is not limited by the shape of power/ground planes. This method produces a network parameter model for each plane pair through which the vias pass. Good model-to-hardware correlation is demonstrated up to 40GHz.

3 Author(s) Biography Xiaoxiong Gu received the B.S. degree from Tsinghua University, Beijing, China, in 2000, the M.S. degree from the University of Missouri, Rolla, in 2002, and the Ph.D. degree from the University of Washington, Seattle, in 2006, all in electrical engineering. He is currently a Research Staff Member with the IBM T. J. Watson Research Center, Yorktown Heights, NY. His research interests include characterization of high-speed interconnect and microelectronic packaging, signal integrity and computational electromagnetics. Mark B. Ritter received a B.S. degree in physics from Montana State University in 1981 and M.S., M.Phil. and Ph.D. degrees in Applied Physics from Yale University in His work at IBM has focused on high-speed I/O circuit and package design, with work including Fibre Channel, 10 Gb/s Ethernet, and 40 Gb/s analog front end circuits as well as interconnect structures for high-speed data transmission. Dr. Ritter presently manages a group focusing on high-speed I/O subsystems, including electromagnetic characterization, link modeling, and subsystem analysis with an eye to optimizing I/O link performance metrics, whether electrical or optical. Dr. Ritter was the recipient of the 1982 American Physical Society Apker Award.

4 1. Introduction Vias in multilayered printed circuit boards have been widely studied in the literature. Signal propagation through vias has been studied through electromagnetic simulation and frequency and time domain measurements. Although full-wave finite element electromagnetic simulations are accessible to package designers, there is still considerable interest in developing physical or physics-based equivalent circuit via models, which are simpler in nature and allow physical insight. As a consequence, such models are more useful for design optimization, sensitivity analysis, and scaling. In DesignCon contributions during the past two years, we introduced physical models for single-ended vias and coupled vias in printed circuit boards [1], [2]. Accurate measurements of hardware showed that relatively simple equivalent circuit models can represent complex via behavior up to high frequencies. The models were concise and had a one-to-one relationship between circuit elements and real-world features. The key element in these models is the analytic parallel-plane input impedance which models the electromagnetic behavior of the parallel-plane cavities in printed circuit boards. One limitation of such a cavity-mode via model is that the analytic formulas of parallelplane input impedance are only available for some certain shapes such as rectangular or circular planes. Furthermore, when multiple neighboring vias are present, the coupling among local vias between the parallel planes becomes more and more important. A method is needed to be able to directly compute the local via interactions given by different via geometries. In this paper, we introduce an alternative physical via model and extend the approach to more complex scenarios including many coupled signal and ground return vias. This is done by utilizing the Foldy-Lax multiple scattering equations to solve electromagnetic wave scattering among the cylindrical vias. Tsang et al. first introduced Foldy-Lax approach to the via problem [3-6]. They applied the equivalence principle to via anti-pad apertures to decompose the transmission line and via structures into interior and exterior sub-problems. The exterior problem includes the transmission line and vertical via transition. The interior problem only includes the vertical vias. For the interior problem, Foldy-Lax multiple scattering equations were used to solve the scattering of many vias viewed as perfectly electrical conducting (PEC) cylinders. In [7], a fast algorithm was developed to further expedite Foldy-Lax based solution for thousands of interior vias. More recently, Ong demonstrated using Foldy-Lax to analyze ball grid array multilayered via structures by analytically cascading network solutions of each layer [8]. On the other hand, it is the full-wave solution of the exterior problem (which models transmission lines and via transitions numerically using Method of Moments) that becomes the computational bottleneck and significantly slows down the entire solution [9]. In this paper we show how to incorporate the Foldy-Lax interior via structure approach into an equivalent circuit model in order to develop a via model which is computationally efficient, yet allows physical insight for scaling and optimization.

5 2. Equivalent Circuit Via Model Formulation The two distinctive features of the via equivalent circuit models introduced in [1] and [2] were the addition of the parallel plane self-impedance into the signal path to model the return path of the vias themselves, and the capacitance between the via barrel and the anti-pad rim, as shown in Figure 1. In the proposed Foldy-Lax via model, the behavior of a via passing through parallel planes has been incorporated into the formulation of interior problem as the multiple scattering equations are developed by assuming a pair of infinitely large PEC parallel planes. The via-to-plane capacitance is also taken into account in the solution of interior problem by placing equivalent magnetic frill currents on the via anti-pad apertures as radiation sources. Details are explained in this section below. Figure 1: Relating equivalent circuit elements of cavity-mode model to geometrical features. Only the parallel plane pair P 2 -P 3 is considered here. A more complex model would take into account pairs P 1 -P 2 and P 3 -P 4 as well. Exterior and Interior Problems Figure 1 shows the cavity-mode equivalent circuit model for a typical via interconnect structure on printed circuit board. As briefly mentioned above, C 1 represents the capacitance between via and plane P 2, and C 2 represents the capacitance between via and plane P 3, respectively. The Z pp block stands for the parallel plane impedance between P 2 and P 3 given by the boundary conditions of planes P 2 and P 3. The transmission lines are modeled by simple scalable models. A similar circuit can describe coupled vias [2]. To develop an alternative model using scattering theory, we consider the planes as perfectly electric conductors and place equal but opposite magnetic frill currents on top and bottom side of each via anti-pad aperture. Based on the equivalence principle, the entire via structure is decomposed into two separate regions as shown in Figure 2, where the interior problem consists of vertical vias between two planes and the exterior problem consists of transmission line and via transition perpendicular to the parallel plane.

6 Figure 2: Decompose the via structure into exterior and interior problems with equivalent magnetic currents on the via anti-pad aperture. The interior problem is analyzed using Foldy-Lax multiple scattering equations [3]. The vias are considered as PEC cylinders. The Foldy-Lax method is a full 3-D characterization of the fields due to the multiple scattering among the vias in between the parallel planes excited by the magnetic current sources on the anti-pad aperture of each via. Figure 3 shows the magnetic current on one aperture assuming a static symmetric transverse electromagnetic (TEM) field distribution. V is the port voltage across the via antipad. Figure 3: Expression and coordinates of magnetic frill current on via anti-pad aperture assuming static TEM field distribution. Such magnetic sources excite cylindrical waves between two parallel planes. Multiple scattering among vias occurs when multiple vias are present. The Foldy-Lax multiple scattering equations are derived by using cylindrical expansion of the excited wave and requiring the total field to meet PEC boundary conditions on each via surface. The final solution of the interior problem are given in terms of the currents going into or out of vias on the top and bottom sides of the parallel planes and the port voltages across each via anti-pad. For example, with a unit voltage across the anti-pad, the z-dependence and the waveguide modes can be seen from the following expression for the surface current on cylinder p:

7 I ( p) TM ( p) 4cos[ k ( z ± d / 2) ] = zˆ m= L, l= 0,1,2, L w l, m ηh zl ( 2 ) ( k a) m ρl e jmφp (1) where w l,m are unknown coefficients solved by the Foldy-Lax multiple scattering equations, η is the characteristic impedance of the medium surrounding the via, a is the radius of the via, k zl = lπ/d and d is the separation between the reference planes, 2 2 ( 2) kρ l = k k zl and k is the wave number in the dielectric medium. H m is the m th order Hankel function of the second kind, φ p is the azimuthal angle from origin to the center of via p. We see that the current is a summation over all the waveguide modes represented by l and azimuthal modes represented by m. The output of the analysis can be also summarized in an admittance Y matrix of size 2N x 2N where N is the number of vias (Figure 4): uu ub Y Y Y = bu bb Y Y. (2) The superscript u denotes upper and b denotes bottom. Y uu, Y ub, Y bu and Y bb are submatrices if there is more than one via in the interior problem. For multiple interior layers, the Y matrices can be cascaded by either first converting into ABCD matrices [8] or directly by cascading in a Spice-like simulator. Figure 4: Representing via structure of an interior problem with admittance Y matrix For the exterior problem, rather than relying on a computationally expensive full-wave analysis [5], [9] which requires discretization of entire long traces for the numerical solver like MoM to extract incident and reflected waves on the transmission line, we simplify the transmission line model with scalable equivalent circuit models. We also approximate the magnetic frill current on one side of the anti-pad aperture by a lumped capacitance assuming a static TEM mode field distribution as shown in Figure 5. Notice that this capacitance is equal to half value of the original via-to-plane capacitance because of the magnetic frill current on the opposite side of the plan is already accounted for in the interior Foldy-Lax solution. A table of capacitance values with different via drill and anti-pad sizes has been calculated using a static field approximation [1]. In this paper, we also employ these capacitance values in our equivalent circuit model of the exterior problem.

8 Figure 5: Representing via structure of an exterior problem with a scalable T-line model and half via-to-plane capacitance. By combining interior and exterior models, we arrive at an equivalent circuit model for the whole structure. For example, Figure 6 illustrates the Foldy-Lax model for the via interconnect in Figure 1. Notice that the reference points in the model are associated with the top and bottom planes respectively. Figure 6: A simple through-hole via interconnect model using Foldy-Lax scattering solution for the interior via and equivalent circuit for exterior transmission line and via transition. Figure 7: Network representations in Foldy-Lax model for two vias in a parallel plane pair with 4 different signal/ground/power connections.

9 Model for Multi-layered Via Structures Real boards and modules typically have multiple signal and ground/power vias passing through a number of parallel planes. Figures 7(a)-(d) illustrate four typical two-via coupling scenarios modeled by the Foldy-Lax approach. Here, the two vias between plane P 1 and plane P 2 are modeled by a 2-by-2 Y network generated by the Foldy-Lax model. Via 1 is a signal via. Via 2 is a ground or power via whose connection to the reference plane is represented by connecting its corresponding Y network port to the reference point in the circuit model as shown in Figure 7 (b)-(d). Particularly, if via 2 connects to both planes of a parallel plane structure as shown in Figure 7 (d) which means no voltage across both upper and lower ports of that via, we can delete those Y matrix elements corresponding to the ports of via 2 to reduce the matrix size and the complexity of the equivalent circuit model (Figure 8). Figure 8: Reducing size of Y matrix if one via connects to both parallel planes. Using this topology, we can cascade networks of each parallel plane structure to simulate multi-layered via structures with multiple vias. Figure 9 illustrates an example for the interior problem of a four-plane board (P 1, P 2, P 3, P 4 ). Via 1 is a through-hole via, via 2 connects P 2 and P 4, and via 3 connects P 1 and P 3. Similarly, the model can be readily generalized to apply to multi-layered boards with many more signal and power/ground vias. Figure 9: Network topology for an interior problem with three vias in a four-plane board.

10 3. Numerical Results and Model-to-Hardware Correlation Single-ended Via with Ground Via Cage We previously designed a 16 layer test board (8 signal layers and 8 ground layers) with different via configurations to validate the cavity-mode via model [1]. The recessed probe launch technique [10] in combination with a vector network analyzer was used to measure the S-parameters of each configuration. We selected two test sites on the same test board, henceforth referred as test site 30 and 33 as shown in Figure 10, to validate the new Foldy-Lax model. The test sites consist of a through via with striplines on layer 3 and on layer 14, as well as a stub via with a stripline only on layer 14 (Figure 11). The signal via was enclosed in a square region realized with many ground vias emulating a PEC boundary condition along the perimeter. The relative position of the signal vias with respect of lower left corner was [0.5a, 0.8a] where a is the parameter along the side of the square and is approximately 340 mils long. Figure 10: A through via (test site 33) and a stub via (test site 30) with ground via cage. Figure 11: Layer stacks and via geometries for test site 30 and 33.

11 Equivalent circuit models for both two test sites (Figure 12) were constructed following the methodology described in the previous section. The Y matrices between each pair of two adjacent ground planes were computed by the Foldy-Lax model, which took into account the single signal via and the 40 ground vias forming the PEC cage. The dielectric permittivity is For test site 33, the signal initially propagates on a 50 Ω transmission line on layer 3, then it continues its path along a via passing through 5 parallel plane structures characterized by PEC boundary condition and finally it propagates on a 50 Ω transmission line on layer 14. For test site 30, the signal propagates on a 50 Ω transmission line on layer 3 with a via stub passing through 6 parallel plane structures. The transmission line to via transitions on layers 3 and 14 as well as the thickness of ground planes were neglected. The parasitic capacitances were calculated using the static field approximation [1] (0.5*C 1 = 0.5*C 2 = 60 ff). The S-parameters obtained from the equivalent circuit model simulations are compared to measurements in Figures 13 and 14, respectively. Figure 12: Equivalent circuit models for test site 30 and 33: vias in the parallel plane structures are characterized by the Foldy-Lax multiple scattering method. For test site 33 with a through via, the correlation between the circuit modeling results and the measured data suggests that the signal transmission is impeded at the frequencies corresponding to the cavity resonance with PEC boundary condition. In the cavity-mode model, these frequencies correspond to the poles or modes of the parallel plane impedance Z pp (i.e., where the magnitude of Z pp has maxima). In the Foldy-Lax model, such cavity resonance behavior is also captured because all ground and signal vias between two ground planes are accounted for in the solution for the interior layers. To compare with the analytic formula of Z pp in the cavity-mode model [1], we plot the input signal via impedance (inverse of the admittance element computed by the Foldy-Lax model) for a 12-mil thick parallel plane structure (P 4 -P 6 ) in Figure 13 which shows the overall match with the analytic formula up to 40 GHz. For test site 30 with a stub via, the notches of the signal via insertion loss (S 21 ) curve correspond to the stub resonance frequencies which depend on the layer thickness, dielectric properties, as well as the parallel plane cavity with certain boundary condition (approximately PEC boundaries in this case). The good correlation between simulation

12 results and measurement data indicates that the stub resonances are well characterized in the Foldy-Lax model by taking into account the scattering among all signal and ground vias. Figure 13: Comparison of measured transmission with circuit model simulation results for test site 33. Figure 14: Comparison of measured transmission with circuit model simulation results for test site 30. Figure 15: Comparison of signal via input impedance of a 12- mil thick parallel plane structure computed by Foldy-Lax model with analytic formula results.

13 Single-end Via with Multiple Adjacent Ground Vias For via fields on a typical board, especially beneath connectors or an IC package, the signal vias are normally placed next to neighboring ground vias which often do not form well defined shapes such as rectangular or circular boundary conditions, and yet those ground vias have a strong impact on the signal via through coupling between the two parallel planes. To study such coupling effect due to adjacent ground vias, we designed two test sites, referred as test site 19 and 20, which have stub vias from S1 layer to top layer and also differ in the arrangement of neighboring ground vias. In both structures, a group of four ground vias is symmetrically located around the signal via. In site 19, the radial spacing is 50 mils and in site 20, it is increased to 100 mils. Recessed probe launches were designed and used for S-parameters measurement. Although there are ground vias associated with the probe launches, our intent was that the four ground vias should be the closest structures to the signal via and dominate its behavior. Pictures of this arrangement are shown below in Figure 16. Figure 16: Close-up view of top side of test site 19 showing GND via placement (left) and via arrangements in test site 19 and 20 (right). Figure 17: Layer stacks and via geometries for test site 19 and 20: a via stub above S1 layer (left) and via stub is removed by milling from top side (right).

14 The layer stack is shown in Figure 17. Notice that each dielectric layer is built with differential material and thus has different dielectric constant. For both test sites, the via drill radius is 6 mils for the center signal via and 11 mils for the 4 ground vias. The antipad radius of the signal via is 17.5 mils. We first measured the S-parameters for the two sites with via stub configuration shown in the left. Then, we milled the top via stub (33 mils down from the top) on both sites and re-measured the S-parameters. The measurement data for the stubless case serves as the reference for model-to-hardware correlation. Figure 18: Equivalent circuit model for test site 19 and 20. Figure 19: Comparison of measured S-parameters with circuit model simulation results for test site 19 and 20.

15 The equivalent circuits for two sites with via stubs are shown in Figure 18. The capacitances in the circuit model were computed using the static field approximation (0.5*C 1 = 0.5*C 2 = 26.7 ff). Notice that because the thickness of the ground planes accounts for a considerable portion of the via stub length, it must also be taken into account in the model. Here, the ground plane with finite thickness was modeled by a coaxial transmission line [11], which has characteristic impedance of 37 Ω (given by inner radius = a, outer radius = b, dielectric constant = 3.7). For the stubless via configuration, the model is simply two 250-mil transmission lines connected together, shown as the left part of Figure 18. The S-parameters obtained from equivalent circuit simulation results are compared with measurement data in Figures 19. The first stub resonances for site 19 and 20 are clearly different in the insertion loss curve (29GHz and 17GHz, respectively) even if the via stub lengths are the same. This shows that the coupling between signal via and adjacent ground vias have to be carefully considered in order to accurately model the via stub effect. In this example, we demonstrated that we were able to characterize the via coupling between signal and ground vias for each interior layer using Foldy-Lax model and therefore captured the via stub effect accurately in the model. Analysis of Layout for Differential Via Pairs The Foldy-Lax scattering method can be used to optimize the via layout as it accounts for the actual via geometries and solving the scattering equations generally takes much less time than 3-D full-wave simulations. Consider, for example, two differential via pairs and two ground vias with 2:1 signal to ground ratio are laid out in a multilayered board in four configurations as shown in Figure 20. The spacing between two adjacent vias is 1 millimeter. The drill radius of signal vias and ground vias are 3 mils and 4 mils, respectively. The anti-pad radius of signal vias is 14 mils. The thickness of the dielectric layer (dielectric constant = 3.6) between two parallel ground planes is 10 mils. In this example, we consider that there are 12 such dielectric layers comprising the board. To analyze the cross-talk between via pairs for these different configurations, we first built and solved the Foldy-Lax scattering equations for all 4 signal vias and 2 ground vias with the geometry parameters specified above for each parallel plane structure. Then, we converted the 8-port Y matrices of the interior problem solution into transfer ABCD matrices and cascaded all 12 ABCD matrices together. Finally, we converted the ABCD matrix into S-parameters assuming all signal vias are terminated with 50 Ω. The near-end differential mode cross-talk (NEXT) and far-end differential mode cross-talk (FEXT) are plotted in the Figure 21. Notice that the differential mode cross-talk varies significantly depending on the relative locations of the signal and ground vias. The closer the distance between two via pairs, the greater was the cross-talk we observed. The differential mode return loss and insertion loss for a given pair, on the other hand, did not vary as much as the cross-talk does (Figure 22). Also, because the Foldy-Lax method is computationally efficient (approximately 9 seconds to generate S-parameters for each configuration for 200 frequencies points on a dual-core machine), it can be applied to more complex via array structures for analysis and optimization, which will be discussed in a separate paper.

16 Figure 20: Four layout configurations for two differential via pairs and two ground vias in a 12- layered board. Figure 21: Differential mode far-end cross-talk (FEXT) and near-end cross-talk (NEXT) between two signal via pairs. Figure 21: Differential mode return loss and insertion loss for via pair 1.

17 Conclusions and Outlook In this paper, we introduced an alternative equivalent circuit model for via structures on multi-layered PCBs using the Foldy-Lax multiple scattering method. The new model computes the coupling among signal and ground vias accurately by taking into account actual via geometries. Good model-to-hardware correlation was also demonstrated. This computationally-efficient via model can be further applied to via array layout optimization, sensitivity analysis, and power and signal integrity co-analysis due to via coupling. We will pursue research in those directions in the future. Acknowledgements The authors would like to thank Bruce Archambeault, Albert Ruehli, James Drewniak, Giuseppe Selli, Christian Schuster, Leung Tsang, Boping Wu for their insightful discussions and Young Kwark for his help with measurement. This work was supported in part by DARPA, under the IBM contract number HR C References [1] C. Schuster, Y. Kwark, G. Selli, P. Muthana, "Developing a Physical Model for Vias," IEC DesignCon, Santa Clara, CA, USA, February 6-9, [2] G. Selli, C. Schuster, Y. Kwark, M. Ritter, J. Drewniak, "Developing a Physical Model for Vias - Part II: Coupled and Ground Return Vias," IEC DesignCon, Santa Clara, CA, USA, Jan 29 - Feb 1, [3] L. Tsang, H. Chen, C.-C. Huang, V. Jandhyala, "Modeling of multiple scattering among vias in planar waveguides using Foldy-Lax equations," Microwave Opt. Technol. Lett., vol. 31, pp , Nov [4] L. Tsang et al, "Methods for modeling interactions between massively coupled multiple vias in multilayered electronic packaging structures," US Patent Number B2, filed May 30, [5] H. Chen, Q. Li, L. Tsang, C.-C. Huang, V. Jandhyala, "Analysis of a large number of vias and differential signaling in multilayered structures," IEEE Trans. Microwave Theory Tech., vol. 51, pp , Mar [6] C.-C. Huang, K. L. Lai, L. Tsang. X. Gu, C.-.J. Ong, "Transmission and scattering on interconnects with via structures," Microwave Opt. Technol. Lett., vol. 46, pp , Sep [7] C.-C. Huang, L. Tsang, C. H. Chan, "Multiple scattering among vias in lossy planar waveguides using the SMCG method," IEEE Trans. Advanced Packaging, vol. 25, pp , May 2002.

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