Digitally-Controlled RF Self- Interference Canceller for Full-Duplex Radios

Transcription

1 Digitally-Controlled RF Self- nterference Canceller for Full-Duplex Radios Joose Tamminen 1, Matias Turunen 1, Dani Korpi 1, Timo Huusari 2, Yang-Seok Choi 2, Shilpa Talwar 2, and Mikko Valkama 1 1 Dept. of Electronics and Communications Engineering, Tampere University of Technology, Finland 2 ntel Corporation EUSPCO 2016 Aug. 31, 2016

2 Outline ntroduction Full-duplex device architecture RF cancellation principle Prototype implementation Measurement results Conclusions

3 ntroduction Under typical circumstances, RF cancellation is needed in full-duplex devices to prevent saturating the receiver Unless using a very high-isolation antenna arrangement n this work, we describe a prototype implementation of a three-tap RF canceller utilizing a digital control algorithm

4 Full-duplex device architecture Transmitter chain BPF Wideband RF cancellation circuit CONTROL PA VGA Mixer LPF DAC LO Receiver chain LNA Mixer LPF VGA ADC Nonlinear DSP Σ Digital cancellation CONTROL Transmit data To detector The RF canceller is designed especially for a single-antenna transceiver, where the TX and RX are separated by a circulator The control block of the RF canceller is digital, although the cancellation itself occurs in the RF domain Digital cancellation is not considered here To see how the digital canceller works with this RF canceller, see: tut.fi/full-duplex

5 RF cancellation principle TX to circulator From circulator τ n τ n n th Tap τ n n th Tap n th Tap VectorModulator Vector Modulator Vector Modulator Σ Σ Weight Weight Calculation Weight Calculation Calculation Feedback From PA RX Wideband RF cancellation circuit control DAC DAC control Tap coupler ʃ ʃ Feedback Coupler μ μ n th Tap ADC Σ Σ ADC ADC ADC Feedback Self-adaptive weight calculation PA output is used as a reference signal Three copies with different delays Their phases and amplitudes are controlled by a vector modulator The vector modulator is controlled by a digital control algorithm, which is running on an FPGA

6 RF cancellation principle Each tap signal is divided between a vector modulator and the digital control algorithm The former is used for actual cancellation, while the latter is used for weight calculation The cancelled signal is divided between the actual receiver and the digital control algorithm TX to circulator From circulator τ n τ n n th Tap τ n n th Tap n th Tap VectorModulator Vector Modulator Vector Modulator Σ Σ Weight Weight Calculation Weight Calculation Calculation Feedback From PA RX

7 RF cancellation principle The control algorithm has 8 input signals and components of three reference signals and one feedback signal t generates 6 output signals and control voltages for the three cancellation signals For efficiency, the step size is a negative power of two t can be implemented as a bit shift control DAC DAC control Tap coupler ʃ ʃ Feedback Coupler μ μ n th Tap ADC Σ Σ ADC ADC ADC Feedback

8 RF cancellation principle The observed S signal at the RF canceller input can be expressed as N S y t = h S,ix(t τ S,i) n(t) i=1 where x(t) is the PA output, h S,i are the channel coefficients and τ S,i are the unknown true delays The signal after RF cancellation can be correspondingly expressed as N C z t = y t w i x(t τ C,i) i=1 where w i are the controllable amplitudes and phases and τ C,i are the delays of the taps Note that in general τ S,i τ C,i, meaning that this is an interpolation problem this creates the need for a larger number of taps

9 RF cancellation principle Magnitude The RF canceller aims at reconstructing the strong direct leakage Circulator leakage antenna reflection Multipath components Time n a circulatorbased setup, it typically consists of two components

10 RF cancellation principle The learning is done in the digital domain with basic LMS, using an FPGA board The necessary signals are downconverted and digitized for this purpose The weight of the ith tap is updated as w i k 1 = w i k μx i k e k where μ is the learning parameter and e k is the cancelled signal. Note that this equation expresses the weight update in complex form in the real implementation the above expression is divided into its real and imaginary parts

11 Prototype implementation The prototype RF canceller was implemented on a PCB, using off-theshelf components The digital control algorithm was implemented on an FPGA

12 Measurement results Measurements are carried out with a N PXe-5645R vector signal transceiver, complemented by an external PA Transmit powers in the order of 6-8 dbm Single-antenna setup, where a circulator separates RX and TX 20 db passive isolation

13 Measurement results With a 20 MHz LTE signal, almost 50 db of active RF cancellation is achieved ncluding the passive isolation, the total amount of analog S attenuation is close to 70 db

14 Measurement results Doubling the bandwidth to 40 MHz, still 45 db of RF cancellation is achieved

15 Measurement results With 80 MHz transmit signal, the amount of RF cancellation is still over 40 db To the best of our knowledge, these are the highest reported amounts of RF cancellation for such a low number of taps

16 Measurement results As an example, this figure shows the convergence behaviour of the control voltages

17 Conclusions n this work, we presented the design and prototype implementation of a three-tap RF canceller t utilizes digital control algorithm to suppress the self-interference by as much as 48 db This type of an RF canceller can be used in full-duplex radios or in FDD devices as a flexible duplexer

18 Thank you uestions?