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1 dvanced Power MOSFET SFP9630 FETURES valanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating rea Lower Leakage Current : -10 µ = -200 Low R DS(ON) : Ω (Typ.) BS = -200 R DS(on) = 0.8 Ω I D = -6.5 TO bsolute Maximum Ratings S I D I DM E S I R E R dv/dt P D T J, T STG T L Drain-to-Source oltage Thermal Resistance Continuous Drain Current (T C =25 o C) Continuous Drain Current (T C =100 o C) Drain Current-Pulsed Gate-to-Source oltage Single Pulsed valanche Energy valanche Current Repetitive valanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (T C =25 o C) Linear Derating Factor Operating Junction and Characteristic alue Units Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8 from case for 5-seconds O 2 O 3 1.Gate 2. Drain 3. Source _ to mj mj /ns W W/ o C o C R θjc R θcs R θj Characteristic Typ. Max. Units Junction-to-Case Case-to-Sink Junction-to-mbient o C/W Rev. B 1999 Fairchild Semiconductor Corporation
2 SFP9630 P-CHNNEL Electrical Characteristics (T C =25 o C unless otherwise specified) Characteristic Min. Typ. Max. Units Test Condition BS B/ T J (th) I GSS I DSS Drain-Source Breakdown oltage Breakdown oltage Temp. Coeff. Gate Threshold oltage Gate-Source Leakage, Forward Gate-Source Leakage, Reverse Drain-to-Source Leakage Current / o C n µ =0,I D =-250µ I D =-250µ See Fig 7 =-5,I D =-250µ =-30 =30 =-200 =-160,T C =125 o C R DS(on) g fs C iss C oss C rss t d(on) t r t d(off) t f Q g Q gs Q gd Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain( Miller ) Charge Ω Ω pf ns nc =-10,I D =-3.3 O 4 =-40,I D =-3.3 O 4 =0, =-25,f =1MHz See Fig 5 =-100,I D =-6.5, R G =12Ω See Fig 13 O 4 O5 =-160, =-10, I D =-6.5 See Fig 6 & Fig 12 O 4 O5 Source-Drain Diode Ratings and Characteristics I S I SM SD t rr Q rr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward oltage Reverse Recovery Time Reverse Recovery Charge O 4 Min. Typ Max. Units ns µc Test Condition Integral reverse pn-diode in the MOSFET T J =25 o C,I S =-6.5, =0 T J =25 o C,I F =-6.5 di F /dt=100/µs O 4 Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature O 2 L=20mH, I S =-6.5, =-50, R G =27Ω*, Starting T J =25 o C O 3 I SD <_ -6.5, di/dt<_ 400/µs, <_ BS, Starting T J =25 o C O 4 Pulse Test : Pulse Width = 250 µs, Duty Cycle <_ 2% O5 Essentially Independent of Operating Temperature
3 P-CHNNEL SFP9630 Fig 1. Output Characteristics Fig 2. Transfer Characteristics Top : Bottom : µs Pulse Test 2. T C = 25 o C -, Drain-Source oltage [] 25 o C 150 o C - 55 o C 1. = 0 2. = µs Pulse Test , Gate-Source oltage [] R DS(on), [Ω] Drain-Source On-Resistance Fig 3. On-Resistance vs. Drain Current = -10 = Note : T J = 25 o C I DR, Reverse Drain Current [] Fig 4. Source-Drain Diode Forward oltage 150 o C 25 o C 1. = µs Pulse Test SD, Source-Drain oltage [] Capacitance [pf] Fig 5. Capacitance vs. Drain-Source oltage C iss C oss C rss C iss = C gs + C gd (C ds = shorted) C oss = C ds + C gd C rss = C gd 0 -, Drain-Source oltage [] 1. = 0 2. f = 1 MHz -, Gate-Source oltage [] 10 5 Fig 6. Gate Charge vs. Gate-Source oltage = -40 = -100 = -160 I D = Q G, Total Gate Charge [nc]
4 SFP9630 P-CHNNEL -BS, (Normalized) Drain-Source Breakdown oltage Fig 7. Breakdown oltage vs. Temperature 1. = 0 2. I D = -250 µ R DS(on), (Normalized) Drain-Source On-Resistance Fig 8. On-Resistance vs. Temperature 1. = I D = T J, Junction Temperature [ o C] T J, Junction Temperature [ o C] -I D, Drain Current [] 10 2 Fig 9. Max. Safe Operating rea Operation in This rea is Limited by R DS(on) 0.1 ms 1 ms 10 ms DC 1. T = 25 o C C 2. T = 150 o C J Fig 10. Max. Drain Current vs. Case Temperature Single Pulse , Drain-Source oltage [] T c, Case Temperature [ o C] Fig 11. Thermal Response Z θjc (t), Thermal Response D= single pulse 1. Z θjc (t)=1.79 o C/W Max. 2. Duty Factor, D=t 1 /t 2 3. T JM -T C =P DM *Z θjc (t) P. DM t 1ṫ t 1, Square Wave Pulse Duration [sec]
5 P-CHNNEL SFP9630 Fig 12. Gate Charge Test Circuit & Waveform 12 Current Regulator 50KΩ 200nF 300nF Same Type as -10 Q g Q gs Q gd -3m Current Sampling (I G ) Resistor R 1 R 2 Current Sampling (I D ) Resistor Charge Fig 13. Resistive Switching Test Circuit & Waveforms R L out t d(on) t on t r t off t t f d(off) R G in ( 0.5 rated ) in 10% -10 out 90% Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms L L 1 E S = L L I 2 2 S BS BS ary t p to obtain required peak I D ID t p Time R G C I D (t) (t) -10 I S t p BS
6 SFP9630 P-CHNNEL Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms + I S L Driver RG Compliment of (N-Channel) dv/dt controlled by R G I S controlled by Duty Factor D ( Driver ) Gate Pulse Width D = Gate Pulse Period 10 Body Diode Reverse Current I S ( ) I RM I FM, Body Diode Forward Current di/dt f ( ) Body Diode Forward oltage Drop Body Diode Recovery dv/dt
7 TRDEMRKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. DISCLIMER CEx CoolFET CROSSOLT E 2 CMOS TM FCT FCT Quiet Series FST FSTr GTO HiSeC ISOPLNR MICROWIRE POP PowerTrench QS Quiet Series SuperSOT -3 SuperSOT -6 SuperSOT -8 TinyLogic UHC CX FIRCHILD SEMICONDUCTOR RESERES THE RIGHT TO MKE CHNGES WITHOUT FURTHER NOTICE TO NY PRODUCTS HEREIN TO IMPROE RELIBILITY, FUNCTION OR DESIGN. FIRCHILD DOES NOT SSUME NY LIBILITY RISING OUT OF THE PPLICTION OR USE OF NY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONEY NY LICENSE UNDER ITS PTENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FIRCHILD S PRODUCTS RE NOT UTHORIZED FOR USE S CRITICL COMPONENTS IN LIFE SUPPORT DEICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN PPROL OF FIRCHILD SEMICONDUCTOR CORPORTION. s used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STTUS DEFINITIONS Definition of Terms 2. critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition dvance Information Preliminary No Identification Needed Formative or In Design First Production Full Production This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
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