SC4211. Very Low Input /Very Low Dropout 1 Amp Regulator With Enable POWER MANAGEMENT. Applications. Typical Application Circuits
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- Rodger Beasley
- 5 years ago
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1 Description The is a high performance positive voltage regulator designed for use in applications requiring very low Input voltage and very low dropout voltage at up to 1 amperes. It operates with a Vin as low as 1.4V, with output voltage programmable as low as 0.5V. The features ultra low dropout, ideal for applications where Vout is very close to Vin. Additionally, the has an enable pin to further reduce power dissipation while shutdown. The provides excellent regulation over variations in line, load and temperature. The is available in the SIC--EDP Exposed Die Pad) package. Depending on how the pin is configured, the output voltage can be either externally adjusted or fixed to either 0.5V or 1V. Typical Application Circuits Very Low Input /Very Low Dropout 1 Amp Regulator With Enable Features Input Voltage as low as 1.4V 400mV 1A Adjustable output from 0.5V ver current and over temperature protection Enable pin 10µA quiescent current in shutdown Full industrial temperature range Available in SIC--EDP Lead-free package, fully WEEE and RoHS compliant Applications Telecom/Networking cards Motherboards/Peripheral cards Industrial Applications Wireless infrastructure Set top boxes Medical equipment Notebook computers Battery powered systems 4 5 ABLE GND 7 R1 0.5 R1 + R2) R2 Volts C1 U1 C2 R2 ABLE GND V ABLE GND 5 7 1V C1 U1 C2 C1 U1 C2 Revision: November 0, 200 1
2 Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. peration outside of the parameters specified in the Electrical Characteristics section is not implied. Parameter Symbol Max Units Vin,, Vo, to GND 7 V Power Dissipation P D Internally Limited W 1) T hermal Resistance Junction to Ambient 1) T hermal Resistance Junction to Case Electrical Characteristics θ JA θ JC. 5 3 C/ W 5 C/ W perating Ambient Temperature Range T A -40 to +5 C perating Junction Temperature Range T J -40 to +125 C Storage Temperature Range T STG 5 to C Peak IR Reflow Temperature 10s to 30s) T P 20 C 2) E SD Rating Human Body Model) V SD E 2 kv Notes: 1) Calculated from package in still air, mounted to 3 x 4.5, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards, 2) Tested according to JEDEC standard JESD22-A114-B. Unless specified: V, V V, 1.40V to.0v, I 10µA to 1A. Values in bold apply over the full operating temperature range. Parameter Symbol Test Conditions Min Typ Max Units Supply Voltage Range V Quiescent Current I Q 3.3V, I 0A 3 ma.0v, V 0V µ A 1) utput Voltage V V + 0.5V, I 10mA -2% V + 2% V Fixed Voltage, V V.0V, I 10mA - 3% +3% ) F B 1) L ine Regulation 1) L oad Regulation 1)2) D ropout Voltage R EG LINE ) R EG LAD) V I 10mA %/ V I 10mA to 1A %/ V D I 500mA mv Semtech Corp. 2
3 Electrical Characteristics Cont.) Unless specified: V, V V, 1.40V to.0v, I 10µA to 1A. Values in bold apply over the full operating temperature range. Parameter Symbol Test Conditions Min Typ Max Units Cont.) 1)2) D ropout Voltage V D I 1A mv 3) M inimum Load Current I V + 0.5V 10 µ A 4) C urrent Limit Feedback 1) R eference Voltage 4) F eedback Pin Current I CL. 1 5) F eedback Pin Threshold V REF IA DJ 3.3V, V V Full I and V UT UT, IN V V EF A, I 10mA V Range R 0 V.05 TH) 200 na V Enable Enable Pin Current Pin Threshold ver Temperature Protection I N E V IH V IL V 0V, V 3.3V µ A IN 3.3V 1. V 3.3V 0. 4 High Trip level Hysteresis T YS T T HI 0 H 0 1 C 1 C Notes: 1) Low duty cycle pulse testing with Kelvin connections required. 2) V D -V when V decreases by 1.5% of its nominal output voltage with V +0.V. 3) Required to maintain regulation. Voltage set resistors R1 and R2 are usually utilized to meet this requirement. 4) Guaranteed by design. 5) When V exceeds this threshold, the Sense Select switch disconnects the internal feedback chain from the error amplifier and connects V instead Semtech Corp. 3
4 rdering Information Part Number Package Temp. Range T ) J 1)2) S C4211STRT EVB IC--ED P S -40 to +125 C Evaluation Board Notes: 1) nly available in tape and reel packaging. A reel contains 2500 devices. 2) Lead-free product. This product is fully WEEE and RoHS compliant. Pin Configuration Top View Bottom View GND GND GND Exposed Die Pad SIC--EDP-2 SIC--EDP-2 Pin Descriptions Pin # Pin Name Pin Desciption 2 Enable Input. Pulling this pin below 0.4V turns the regulator off, reducing the quiescent current to a fraction of its operating value. The device will be enabled if this pin is left open. Connect to if not being used. 3 Input voltage. For regulation at full load, the input to this pin must be between + 0.5V) and 5.5V. Minimum 1.4V. A large bulk capacitance should be placed closely to this pin to ensure that the input supply does not sag below 1.4V. Also a minimum of 4.7uF ceramic capacitor should be placed directly at this pin. The pin is this pin. the power output of the device. A minimum of 10uF capacitor should be placed directly at 7 When this pin is grounded, an internal resistor divider sets the output voltage to 1.0V. If connecte d to the Vo pin, the output voltage will be set at 0.5V. If external feedback resistors are used, the output voltage will be See Application Circuits on page 1): 0.5R1 + R2) Volts R2 G ND Reference ground. The GND pin and the exposed die pad must be connected together at the IC pin. 1,4,5 N C No Connection. THERMAL PAD heatsinking purposes. Pad for internally. Connect to ground plane using multiple vias. Not electrically connected 2007 Semtech Corp. 4
5 Block Diagram 1.5uA 0.5V V REF Marking Information Top View yyww xxxxx yyww Datecode Example: 0015) xxxxx Semtech Lot No. Example: 00101) 2007 Semtech Corp. 5
6 Typical Characteristics Region of Instability Stable Region Region of Instability Region of Instability Stable Region Region of Instability 2007 Semtech Corp.
7 Applications Information Introduction The is intended for applications where high current capability and very low dropout voltage are required. It provides a very simple, low cost solution that uses very little PCB real estate. Additional features include an enable pin to allow for a very low power consumption standby mode, and a fully adjustable output. Component Selection Input capacitor: A large bulk capacitance of about 10uF/A output load) should be closely placed to the input supply pin of the to ensure that Vin does not sag below 1.4V. Also a minimum of 4.7µF ceramic capacitor is recommended to be placed directly next to the Vin pin. This allows for the device being some distance from any bulk capacitance on the rail. Additionally, input droop due to load transients is reduced, improving load transient response. Additional capacitance may be added if required by the application. utput capacitor: A minimum bulk capacitance of 10µF/A output load), along with a 0.1µF ceramic decoupling capacitor is recommended. Increasing the bulk capacitance will improve the overall transient response. The use of multiple lower value ceramic capacitors in parallel to achieve the desired bulk capacitance will not cause stability issues. Although designed for use with ceramic output capacitors, the is extremely tolerant of output capacitor ESR values and thus will also work comfortably with tantalum output capacitors. Noise immunity: In very electrically noisy environments, it is recommended that 0.1µF ceramic capacitors be placed from IN to GND and UT to GND as close to the device pins as possible. Internal voltage selection: By connecting the pin to GND, an internal resistor divider will regulate the output voltage to 1.0V. If the pin is connected directly to the pin, the output voltage will be regulated to the 0.5V internal reference. Enable: Pulling this pin below 0.4V turns the regulator off, reducing the quiescent current to a fraction of its operating value. A pull up resistor up to 400khms should be connected from this pin to the pin in application where supply voltages of Vin < 1.9V is required. For applications with higher voltages than 1.9V, pin could be left open or connected to. Thermal Considerations The power dissipation in the is approximately equal to the product of the output current and the input to output voltage differential: P D UT ) I The absolute worst-case dissipation is given by: P DMAX) MAX) UT MIN) ) I MAX) + MAX) I QMAX) For a typical scenario, 3.3V ± 5%, V UT 2.V and I 1A, therefore: MAX) 3.45V, V UTMIN) 2.744V and I QMAX) 1.75mA, Thus P DMAX).722W. Using this figure, and assuming T AMAX) 70 C, we can calculate the maximum thermal impedance allowable to maintain T J 150 C: R TJMAX) TAMAX) ) ) THJ A)MAX) PDMAX) C/W This should be achievable for the SIC--EDP package using PCB copper area to aid in conducting the heat away, such as one square inch of copper connected to the ground pins of the device. Internal ground/power planes and air flow will also assist in removing heat. For higher ambient temperatures it may be necessary to use additional copper area. External voltage selection resistors: The use of 1% resistors, and designing for a current flow 10µA is recommended to ensure a well regulated output thus R2 50kΩ) Semtech Corp. 7
8 utline Drawing - SIC--EDP 2X E/2 ccc C 2X N/2 TIPS aaa C SEATING PLANE C N A 1 2 D F e D E1 E e/2 B A2 A A1 bxn bbb C A-B D DIMSINS DIM IHES MILLIMETERS MIN NM MAX MIN NM MAX A A A b c D E E.23 BSC.00 BSC e.050 BSC 1.27 BSC F H h L L1.041) 1.05) N aaa bbb ccc h EXPSED PAD H h H GAGE PLANE c SIDE VIEW 0.25 SEE DETAIL NTES: 1. CNTRLLING DIMSINS ARE IN MILLIMETERS ANGLES IN DEGREES). 2. DATUMS -A- AND -B- T BE DETERMINED AT DATUM PLANE -H- 3. DIMSINS "E1" AND "D" D NT ILUDE MLD FLASH, PRTRUSINS R GATE BURRS. 4. REFEREE JEDEC STD MS-012, VARIATIN BA. A L1) DETAIL A L Semtech Corp.
9 Land Pattern - SIC--EDP E D SLDER MASK THERMAL VIA Ø 0.3mm C) F P G Y X Z DIMSINS DIM IHES MILLIMETERS C.205) 5.20) D E F G P X Y Z NTES: 1. THIS LAND PATTERN IS FR REFEREE PURPSES NLY. CNSULT YUR MANUFACTURING GRUP T SURE YUR CMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFEREE IPC-SM-72A, RLP N. 300A. 3. THERMAL VIAS IN THE LAND PATTERN F THE EXPSED PAD SHALL BE CNNECTED T A SYSTEM GRUND PLANE. FAILURE T D S MAY CMPRMISE THE THERMAL AND/R FUTINAL PERFRMAE F THE DEVICE. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA Phone: 05) FAX 05) Semtech Corp. 9
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