SC mA Ultra Low Dropout Regulator with Low Noise Bypass. POWER MANAGEMENT Description. Features. Applications. Typical Application Circuit

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1 Description The SC43 is a low dropout linear regulator that operates from a +.V to +6.V input range and delivers up to m. PMOS pass transistor allows the low 7µ supply current to remain independent of load, making these devices ideal for battery operated portable equipment such as cellular phones, cordless phones and personal digital assistants. The SC43 has a bandgap reference bypass pin for very low noise operation - a nf (typ.) capacitor may be connected between this pin and ground. Other features include low powered shutdown, short circuit protection, thermal shutdown protection and reverse battery protection. The SC43 comes in the tiny lead SOT-3 package and the ultra-low profile lead TSOT-3. Typical pplication Circuit SC43 m Ultra Low Dropout Regulator with Low Noise Bypass Features 98/ compatible pinout Guaranteed m output current % output accuracy guaranteed over line, load and temperature Very small external components - designed to work with ceramic capacitors Low 6µV RMS output noise (.V option, C IN C µf, C BYP nf) Very low supply current Thermal overload protection Reverse battery protection Low power shutdown Full industrial temperature range Very low profile packaging available (mm max. height) Surface mount packaging ( pin SOT-3 and TSOT-3) vailable in Lead-free packages, fully WEEE and RoHS compliant pplications Battery Powered Systems Cellular Telephones Cordless Telephones Personal Digital ssistants Portable Instrumentation Modems PCMCI cards VIN U IN SC43 V C uf 3 4 EN GND BYP C3 uf C nf Revision: ugust 4, 6

2 SC43 bsolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Parameter Symbol Maximum Units Input Thermal Thermal Supply Voltage Resistance Junction to mbient Resistance Junction to Case V IN.6 to + 7 θ J 6 - V C/ W θ JC 8 C/ W Operating mbient Temperature Range T -4 to +8 C Operating Junction Temperature Range T J -4 to + C Storage Temperature Range Lead Temperature (Soldering) Sec. T ED ESD Rating T STG 6 to L - C 3 C ESD kv Electrical Characteristics Unless specified: V IN V + V, V EN V IN, I µ, C IN C µf, T C. Values in bold apply over full operating ambient temperature range. Parameter Symbol Conditions Min Typ Max Units IN Supply Voltage Range V IN. 6. V Supply Current I Q I m tom 7 3 µ 6 V IN 6.V, VEN V.. µ. ) O utput Voltage )() L ine Regulation ) L oad Regulation ( V IO UT m I m, V ( R EG ( V.V) ( LINE ) O UT(NOM ) ( R EG I ( LOD) m.% + V V N + V IN.V, I - V UT O.% + V I.V -.% +.% m. mv.m to m -3 - mv - 6 Semtech Corp.

3 SC43 Electrical Characteristics (Cont.) Unless specified: V IN V + V, V EN V IN, I µ, C IN C µf, T C. Values in bold apply over full operating ambient temperature range. Parameter Symbol Conditions Min Typ Max Units (Cont.) Current Limit ( )(3) D ropout Voltage V D IO UT I I LIM I O UT I 4 m m mv m 6 mv m m 7 mv 9 mv 3 Output Voltage Noise, C µ F O UT Output Voltage Noise, C µ F O UT Power BYP Supply Rejection Ratio e n e n PSRR Hz to khz, I m C nf, V.V B YP Hz to khz, I m C nf, V 3.3V B YP Hz to khz, I m C nf, V.V B YP Hz to khz, I m C nf, V 3.3V B YP f Hz, C B YP 6 V 4 µ RMS 3 V 9 µ RMS nf 6 db Start-up Rise Time t r C BYP nf. 3 ms EN Enable Input Threshold 4) E nable Input Bias Current Over Temperature Protection V IH V IL ( I EN.V V IN 6.V. 6 V.V V IN 6.V. 4 V V EN V N I µ High Trip Level Hysteresis T YS T T HI H C C Notes: () Low duty cycle pulse testing with Kelvin connections required. () V IN(MIN).V. (3) Defined as the input to output differential at which the output voltage drops mv below the value measured at a differential of V. Not measurable on.v and.8v parts due to minimum V IN constraints. (4) Guaranteed by design. 6 Semtech Corp. 3

4 SC43 Pin Configuration Top View Ordering Information Part Number ()() S C43ISK-XXXTR ()()(3) S C43ISK-XXXTRT ()(4) S C43ISK8TRT ()() S C43ITSK-XXXTR ()()(3) S C43ITSK-XXXTRT ()(4) S C43TSK8TRT Package SOT-3- TSOT-3- ) S C43EVB ( N/ (SOT-3- & TSOT-3-) Notes: () Where XXX denotes voltage options. vailable voltages are:.v (.),.8V (.8),.V (.),.7V (.7),.8V (.8),.9V (.9), 3.V (3.), 3.V (3.), 3.V (3.) and 3.3V (3.3). () Only available in tape and reel packaging. reel contains 3 devices. (3) Lead free packaging (ordered with suffix extension TRT ) is optional. Consult factory for availability. This product is fully WEEE and RoHS compliant. (4) Use when ordering SC43,.8V option, available in Lead-free packages only. This product is fully WEEE and RoHS compliant. () Evaluation board for SC43. Specify output voltage option when ordering. Pin Descriptions Pin # Pin Name Pin Function I N Input pin. G ND Ground pin. Can be used for heatsinking if needed. 3 E N ctive high enable pin. Connect to IN if not being used. 4 BYP Reference bypass. output noise. Connect a nf capacitor (typical) between this pin and GND to reduce O UT Regulator output, sourcing up to m. 6 Semtech Corp. 4

5 SC43 Marking Information Top Mark Bottom Mark x3xx yyww x package ( for SOT-3-, T for TSOT-3-) 3 SC43 XX voltage option (examples: 33 for 3.V option in SOT-3- yyww Date code (example: 8 for week 8 of ) Top Mark Bottom Mark BX yyww For SC43,.8V option: X L for SOT-3- and N for TSOT-3- yyww Date code (example: 8 for week 8 of ) Block Diagram 6 Semtech Corp.

6 SC43 pplications Information Theory Of Operation The SC43 is intended for applications where very low dropout voltage, low supply current and low output noise are critical. It provides a very simple, low cost solution that uses very little pcb real estate. Only three external capacitors are required for operation (two if a low noise output is not required). The SC43 contains a bandgap reference trimmed for optimal temperature coefficient which is fed into the inverting input of an error amplifier. The output voltage of the regulator is divided down internally using a resistor divider and compared to the bandgap voltage. The error amplifier drives the gate of a low R DS(ON) P-channel MOSFET pass device. n active high enable pin (EN) allows the regulator to be shut down. Pulling this pin low causes the device to enter a very low power shutdown mode, where it will draw typically.µ from the input supply. bypass pin (BYP) is provided to decouple the bandgap reference to reduce output noise and also to improve power supply rejection. This pin can be left open if low noise operation is not required. The regulator has its own current limit circuitry to ensure that the output current will not damage the device during output short, overload or start-up. The current limit is guaranteed to be greater than 4m to allow fast charging of the output capacitor and high initial currents for DSP initialization. The SC43 has a fast start-up circuit to speed up the initial charging time of the bypass capacitor to enable the output voltage to come up quicker (typically.3ms with C BYP nf). The SC43 includes thermal shutdown circuitry to turn off the device if T J exceeds C (typical), with the device remaining off until T J drops by C (typical). Reverse battery protection circuitry ensures that the device cannot be damaged if the input supply is accidentally reversed, limiting the reverse current to less than.m. Component Selection - General Output capacitor - Semtech recommends a minimum capacitance of µf at the output with an equivalent series resistance (ESR) of < Ω over temperature. While the SC43 has been designed to be used with ceramic capacitors, it does not have to be used with ceramic capacitors, allowing the designer a choice. Increasing the bulk capacitance will further reduce output noise and improve the overall transient response. Input capacitor - Semtech recommends the use of a µf ceramic capacitor at the input. This allows for the device being some distance from any bulk capacitance on the rail. dditionally, input droop due to load transients is reduced, improving overall load transient response. Bypass capacitor - Semtech recommends the use of a nf ceramic capacitor to bypass the bandgap reference. Increasing this capacitor to nf will further improve power supply rejection and overall output noise. C BYP may be omitted if low noise operation is not required. Thermal Considerations The worst-case power dissipation for this part is given by: P D(MX) ( VIN(MX) V(MIN) ) I(MX) + VIN(MX) IQ(MX) () For all practical purposes, equation () can be reduced to the following expression: P D(MX) ( VIN(MX) V(MIN) ) I(MX) () Looking at a typical application, 3.3V to.8v at m: V IN(MX) % 3.46V V (MIN).8V - %.744V I m T 8 C 6 Semtech Corp. 6

7 SC43 pplications Information (Cont.) Inserting these values into equation () gives us: ( ). 8mW P D (MX) Using this figure, we can calculate the maximum thermal impedance allowable to maintain T J C: θ ( TJ(MX) T(MX) ) ( 8) J (MX) PD(MX).8 37 C/ W With the standard SOT-3-/TSOT-3- Land Pattern shown at the end of this datasheet, and minimum trace widths, the thermal impedance junction to ambient for SC43ISK is 6 C/W. Thus no additional heatsinking is required for this example. The junction temperature can be reduced further (or higher power dissipation can be allowed) by the use of larger trace widths and connecting PCB copper to the GND pin (pin ), which connects directly to the device substrate. dding approximately one square inch of PCB copper to pin will reduce θ J to approximately 3 C/W and T J(MX) for the example above to approximately C for the SOT-3- package. The use of multi layer boards with internal ground/power planes will lower the junction temperature and improve overall output voltage accuracy. Layout Considerations While layout for linear devices is generally not as critical as for a switching application, careful attention to detail will ensure reliable operation. ) ttaching the part to a larger copper footprint will enable better heat transfer from the device, especially on PCBs where there are internal ground and power planes. ) Place the input, output and bypass capacitors close to the device for optimal transient response and device behaviour. 3) Connect all ground connections directly to the ground plane. If there is no ground plane, connect to a common local ground point before connecting to board ground. 6 Semtech Corp. 7

8 SC43 Typical Characteristics I Q (µ) Quiescent Current vs. Junction Temperature vs. Input Voltage I m V IN 6.V 8 V IN 3.8V 6 4 I Q(OFF) (n) 7 7 V IN 6.V V EN V Off-State Quiescent Current vs. Junction Temperature Output Voltage vs. Junction Temperature vs. Output Current. I m -. Line Regulation vs. Junction Temperature vs. Input Voltage Change I m V Deviation (%) I m m I m REG LINE (mv) V IN V + V to 6.V REG LOD (mv) -. V IN V + V V IN V + V I.m to m Load Regulation vs. Junction Temperature I LIM () V IN V + V to.v Current Limit vs. Junction Temperature vs. Input Voltage V IN 6.V V IN 3.8V Semtech Corp. 8

9 SC43 Typical Characteristics (Cont.) 7 Dropout Voltage vs. Junction Temperature vs. Output Current 7 Dropout Voltage vs. Output Current vs. Junction Temperature V D (mv) I m 7 I m Bypass Start-up Rise Time vs. Junction Temperature vs. Input Voltage I (REV BT) (m) t r (ms).8 C BYP nf.7.6. V IN 3.8V V IN 6.V Reverse Battery Protection vs. Junction Temperature. V IN V EN -6.V V D (mv) V EN (V) e n (µv/ Hz) Top to bottom: T J C T J C T J -4 C 7 I (m) Enable Input Threshold Voltage vs. Junction Temperature vs. Input Voltage V V IN 6.V V V IN 3.8V V V IN 6.V V V IN 3.8V Output Spectral Noise Density vs. Frequency vs. Output Voltage, C µf V IN V + V I m C IN µf C BYP nf T J C. Top to bottom: V 3.3V V 3.V. V.8V V.V V.8V V.V... f (khz) 6 Semtech Corp. 9

10 SC43 Typical Characteristics (Cont.) e n (µv/ Hz) Output Spectral Noise Density vs. Frequency vs. Output Voltage, C µf V IN V + V I m C IN µf C BYP nf T J C. Top to bottom: V 3.3V V 3.V V.8V. V.V V.8V V.V... f (khz) Output Spectral Noise Density vs. Frequency vs. Bypass Capacitance C BYP nf C BYP nf C BYP nf C BYP µf e n (µv/ Hz) Output Spectral Noise Density vs. Frequency vs. Output Capacitance Left to right: C µf C 44µF C µf C µf C µf. V.V V IN.V. I m C BYP nf C IN µf T J C... f (khz) Output Spectral Noise Density vs. Frequency vs. Output Current Top to bottom: I m I m I m I m e n (µv/ Hz). V.V V IN.V. I m C IN µf C µf T J C... f (khz) e n (µv/ Hz). V.V V IN.V. C IN µf C BYP nf C µf T J C... f (khz) Power Supply Rejection Ratio vs. Frequency Power Supply Rejection Ratio vs. Frequency vs. Output Voltage, C BYP nf vs. Output Voltage, C BYP nf PSRR (db) V IN V + V C IN C µf C BYP nf I m T J C Top to bottom: V.V V.8V V.V V.8V V 3.V V 3.3V.. f (khz) PSRR (db) V IN V + V C IN C µf C BYP nf I m T J C Top to bottom: V.V V.V V.8V V.8V V 3.V V 3.3V.. f (khz) 6 Semtech Corp.

11 SC43 Evaluation Board Schematic J RIPPLE MON J IN MON J3 IN C C R4 U SC43 IN 3 4 EN GND BYP R C3 C4 R R3 J4 MON J J6 EN J8 3 EN IQ MON C J7 FLG J GND J GND J GND J3 GND J4 GND J GND J6 3 LOD DRV EN J9 LOD DRV Q 8 S D 7 3 S D 6 4 S D G D Si44 Evaluation Board Bill of Materials Quantity Reference Part/Descriptio n Vendor Notes C, C4 Not placed C, C3 C µf ceramic Murata GRM4-6X7RK nf ceramic J 3 J - J4 BNC socket Test pin V ripple monitor Red J Test pin White J6 Header, pin J7 Not placed J8, J6 Header, 3 pin J9 Test pin Orange 6 J - J Test pin V arious Black (J4 not placed) Q Si44 Vishay R, R R3 Not placed See next page R4 kω, /W U SC43ISK-X.X or SC43ITSK-XX Semtech 6 Semtech Corp.

12 SC43 Evaluation Board Gerber Plots Top Copper Bottom Copper Output Voltage Option (V) R3 Value/Siz e. Ω/.W.8 Ω/.W. 6Ω/.W.6 6Ω/.W.7 8Ω/.W.8 8Ω/.W.8 8Ω/.W Top Silk Screen.9 8Ω/.W 3. Ω/.W 3. Ω/.W 3. Ω/.W 3.3 Ω/.W 6 Semtech Corp.

13 SC43 Outline Drawing - SOT-3- X E/ ccc C X N/ TIPS aaa C SETING PLNE N B D e e EI D E DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MX MIN NOM MX b c D E E e. BSC.37 BSC.8 BSC.9 BSC e.7 BSC.9 BSC L L (.4) (.6) N - - aaa.4. bbb.8. ccc.8. C bxn bbb C -B D GGE PLNE H c. L (L) SIDE VIEW SEE DETIL DETIL NOTES:. CONTROLLING DIMENSIONS RE IN MILLIMETERS (NGLES IN DEGREES).. DTUMS -- ND -B- TO BE DETERMINED T DTUM PLNE -H- 3. DIMENSIONS "E" ND "D" DO NOT INCLUDE MOLD FLSH, PROTRUSIONS OR GTE BURRS. Land Pattern - SOT-3- X (C) P G Y Z DIM C G P X Y Z DIMENSIONS INCHES MILLIMETERS (.98) (.) NOTES:. THIS LND PTTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MNUFCTURING GROUP TO ENSURE YOUR COMPNY'S MNUFCTURING GUIDELINES RE MET. 6 Semtech Corp. 3

14 SC43 Outline Drawing - TSOT-3- X E/ ccc C X N/ TIPS SETING PLNE aaa C C N B D SIDE VIEW e bxn bbb e E D E C -B D SEE DETIL DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MX MIN NOM MX b c D E E e. BSC.37 BSC.8 BSC.9 BSC e.7 BSC.9 BSC L L (.4) (.6) N aaa.4. bbb.8. ccc.. GGE PLNE. H DETIL L (L) c NOTES:. CONTROLLING DIMENSIONS RE IN MILLIMETERS (NGLES IN DEGREES).. DTUMS -- ND -B- TO BE DETERMINED T DTUM PLNE -H DIMENSIONS "E" ND "D" DO NOT INCLUDE MOLD FLSH, PROTRUSIONS OR GTE BURRS. REFERENCE JEDEC STD MO-93, VRITION B. Land Pattern - TSOT-3- X (C) P G Y Z DIM C G P X Y Z DIMENSIONS INCHES MILLIMETERS (.87) (.) NOTES:. THIS LND PTTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MNUFCTURING GROUP TO ENSURE YOUR COMPNY'S MNUFCTURING GUIDELINES RE MET. Contact Information Semtech Corporation Power Management Products Division Flynn Road, Camarillo, C 93 Phone: (8)498- FX (8) Semtech Corp. 4