SEMICONDUCTOR TECHNICAL DATA KIA6419P/F DIP-8 FLP-8 LOW POWER AUDIO AMPLIFIER

Transcription

1 SEMICONDUCTOR TECHNICAL DATA KIA9P/F BIPOLAR LINEAR INTEGRATED CIRCUIT LOW POWER AUDIO AMPLIFIER The KIA9P/F is a low power audio amplifier integrated circuit intended (Primarily) for telephone applications, such as in speakerphones. It provides differential speaker outputs to maximize output swing at low supply voltages (. Volts minimum). Coupling capacitors to the speaker are not required. Open loop gain is db, and the closed loop gain is set with two external resistors. A chip disable pin permits powering down and/ or muting the input signal. The KIA9 is available in a standard pin DIP or a surface mount package. FEATURES Wide Operating Supply Voltage Range ( volts)allows Telephone Line Powered Applications. Low Quiescent Supply Current (.ma Typical) for Battery Powered Applications. Chip Disable to Power Down the IC. Low PowerDown Quiescent Current. (5 A Typical) Drives a Wide Range of Speaker Loads. ( Ohms and Up) Output Power Exceeds 5mW with 3 Ohm Speaker. Low Total Harmonic Distortion. (.5% Typical) Gain Adjustable from < db to> db for Voice Band. Requires Few External Components. D d P A 5 B G L H DIP T W DIM MILLIMETERS A 9. _. B.5 _. D.5. d G H L P T W Q _. _..5 MIN 3. _ _ / Q H T D P G L PIN CONNECTION CD FC 7 VO GND A 5 B B DIM A B B D G H L P T MILLIMETERS.5 _. 3.9 _.. _.3. _..5./.5.3 _..5 _..7../.5 FC 3 VCC V in 5 VO FLP (Top View) Revision No : /

2 BLOCK DIAGRAM AND TYPICAL APPLICATION CIRCUIT R 75kΩ f V CC Audio C i. Ri 3.kΩ V in FC 3 5 VO Speaker C.µF.kΩ.kΩ C * 5.µF FC 5kΩ 5kΩ VO 5kΩ Bias Circuit CD Chip Disable KIA9 7 GND * = Optional Differential Gain = Rf Ri MAXIMUM RATING (Ta=5 ) PARAMETER VALUE UNITS Supply Voltage. to Vdc Maximum Output Current at VO, VO 5 ma Maximum Voltage Vin, FC, FC, CD. V CC. Vdc Applied Output Voltage to VO, VO when disabled. V CC. Vdc Operating Temperature 7 Junction Temperature 55 Devices should not be operated at these values. The "Recommended Operating Limits" provide for actual device operation. RECOMMENDED OPERATING LIMITS PARAMETER SYMBOL MIN. TYP. MAX. UNITS Supply Voltage V CC. Vdc Load Impedance R L. Peak Load Current I L ma Differential Gain (5.kHz bandwidth) AVD db Voltage CD (Pin ) VCD V CC Vdc Ambient Temperature T A Revision No : /

3 ELECTRICAL CHARACTERISTICS (Ta=5 ) CHARACTERISTIC SYMBOL MIN. TYP. MAX. UNIT AMPLIFIERS (AC CHARACTERISTCIS) AC Resistance ( V IN ) r i >3 M Open Loop Gain (Amplifier #, f<hz) A VOL db Closed Loop Gain (Amplifier #) (V CC =.V, f=.khz, R L =3 ) A V db Gain Bandwidth Product GBW.5 MHz Output Power, V CC =3.V, R L =, THD % Pout3 55 V CC =.V, R L =3, THD % Pout 5 mw V CC =V, R L =, THD % Pout Total Harmonic Distortion (f=.khz) (V CC =.V, R L =3, Pout=5mW) (V CC 3.V, R L =., Pout=mW) (V CC V, R L =3, Pout=mW) THD % Power Supply Rejection (V CC =.V, (C=, C=. F) (C=. F, C=, f=.khz) (C=. F, C=5. F, f=.khz) V CC =3.V) PSRR 5 5 db Muting (V CC =.V,.kHz f khz, CD=.V) GMT >7 db AMPLIFIERS (DC CHARACTERISTCIS) Output DC Level VO, VO, V CC =3.V, R L = VO(3)..5.5 (Rf=75k) V CC =.V VO().5 Vdc V CC =V VO() 5.5 Output High Level (I OUT =75mA,.V V CC V) V OH V CC. Vdc Output Low Level (I OUT =75mA,.V V CC V) V OL. Vdc Output DC Offset Voltage (VOVO) (V CC =.V, Rf=75k, R L =3 ) V O 3 3 mv Bias Current V IN (V CC =.V) I IB na Equivalent Resistance FC (V CC =.V) R FC 5 k Equivalent Resistance FC (V CC =.V) R FC 5 k CHIP DISABEL (Pin ) VoltageLow V IL. Vdc VoltageHigh V IH. Vdc Resistance (V CC =V CD =V) R CD k Power Supply Power Supply Current (V CC =3.V, R L =, CD=.V) (V CC =V, R L =, CD=.V) (V CC =3.V, R L =, CD=.V) I CC3 I CC I CCD ma A Note) Currents into a pin are positive, currents out of a pin are negative Revision No : 3/

4 PIN DESCRIPTION SYMBOL PIN. DESCRIPTION CD FC Chip DisableDigital. A logic ""(<.V) sets normal operation. A Logic "" ( sets the power down mode. impedance is nominally 9k. A capacitor at this pin increases power supply rejection, and affects turnon time. This pin can be left open if the capacitor at FC is sufficient..v) FC 3 V IN Analog Ground for the amplifiers. A. F capacitor at this pin (with a 5. F capacitor at Pin ) provides (typically) 5dB of power supply rejection. Turnon time of the circuit is affected by the capacitor on this pin. This pin can be used as an alternate input. Amplifier. The input capacitor and resistor set low frequency rolloff and input impedance. The feedback resistor is connected to this pin and VO. VO 5 Amplifier Output #. The dc level is (V CC.7V)/. V CC DC supply voltage (. to volts) is applied to this pin. GND 7 Ground pin for the entire circuit. VO Amplifier Output #. This signal is equal in amplitude, but out of phase with that at VO. The dc level is (V CC.7V)/. TYPICAL TEMPERATURE PERFORMANCE ( <T A <7 ) SYMBOL Typical Change Units Bias Current ( V IN ) pa/ Total Harmonic Distortion (V CC =.V, R L =3, Pout=5mW, f=.khz).3 %/ Power Supply Current (V CC =3.V, R L =, CD=V) (V CC =3.V, R L =, CD=.V).5.3 A/ DESIGN GUIDELINES GENERAL The KIA5P is a low power audio amplifier capable of low voltage operation (V CC =.V minimum) such as that encountered in linepowered speakerphones. The circuit provides a differential output (VO=VO) to the speaker to maximize the available voltage swing at low voltages. The differential gain is set by two external resistors. Pins FC and FC allow controlling the amount of power supply and noise rejection, as well as providing alternate inputs to the amplifiers. The CD pin permits powering down the IC for muting purposes and to conserve power. AMPLIFIERS Referring to the block diagram. The internal configuration consists of two identical operational amplifiers. Amplifier # has an open loop gain of db (at f Hz), and the closed loop gain is set by external resistors Rf and Ri. The amplifier is unity gain stable, and has a unity gain frequency of approximately.5mhz. In order to adequately cover the telephone voice band (33Hz). a maximum closed leep gain of db is recommended. Amplifier # is internally set to a gain of. (db). The outputs of both amplifiers are capable of sourcing and sinking a peak current of ma. The outputs can typically swing to within. volts above ground and to within.3 volts below V CC. at the maximum current. See Figures and 9 for V OH and V OL curves. The output dc offset voltage (VOVO) is primarily a function of the feedback resistor(rf), and secondarily due to the amplifiers' input offset voltages. The input offset voltage of the two amplifiers will generally be similar for a particular Ic, and therefore nearly cancel each other at the outputs. Amplifier #'s bias current, however, flows out of V IN (Pin) and through Rf, forcing VO to shift negative by an amount equal to (R f IB ). VO is shifted positive an equal amount. The output offset voltage specified in the Electrical characteristics is measured with the feedback resistor shown in the typical application circuit, and therefore takes into account the bias current as well as internal offset voltages of the amplifiers. The bias current is constant with respect to V CC Revision No : /

5 FC and FC Power supply rejection is provided by the capacitors (C and C in the Typical Application Circuit) at FC and FC, C is somewhat dominant at low frequencies, while C is dominant at high frequencies, as shown in the graphs of Figures 7. The required values of C and C depend on the conditions of each application. A line powered speakerphone, for example, will require more filtering than a circuit powered by a well regulated power supply. The amount of rejection is a function of the capacitors, and the equivalent impedance looking into FC and FC (listed in the Electrical Characteristics as R FC and R FC ). In addition to providing filtering, C and C also affect the turnon time of the circuit at powerup, since the two capacitors must charge up through the internal 5k and 5k resistors. The graph of Figure indicates the turnon time upon application of V CC of. volts. The turnon time is % longer for V CC =3. volts, and % less for V CC =9. volts. Turnoff time is < S upon removal of V CC. 3 3 FIGURE TURN ON TIME versus C,C AT POWER ON TURNON TIME (ms) C=5.µF C=.µF V CC switching from to. volts..... C, CAPACITANCE (µf) CHIP DISABLE The chip disable (pin ) can be used to power down the IC to conserve power, or for muting or both when at a logic "" ( to. volts), the KIA9 is enabled for normal operation. When Pin is at a logic "" (. to V CC volts), the IC is disabled. If pin is open, that is equivalent to a logic "", although good design practice dictates that an input should never be left open. impedance at pin is a nominal 9k. The power supply current (when disabled) is shown in Figure 5. Muting, defined as the change in differential gain from normal operation to muted operation, is in excess of 7dB. The turnoff time of the audio output, from the application of the CD signal, is <. s, and turn ontime is 5 ms. Both times are independent of C, C and V CC. When the KIA9 is disabled, the voltages at FC and FC do not changes as they are powered from V CC The outputs, VO, and VO change to a high impedance condition, removing the signal from the speaker. If signals from other sources are to be applied to the outputs (while disabled), they must be within the range of V CC and ground Revision No : 5/

6 POWER DISSIPATION Figures indicate the device dissipation (within the IC) for various combinations of V CC, R L and load power. The maximum power which can safely be dissipated within the KIA9 is found from the following equation : P D =( T A )/ JA where T A is the ambient temperature ; and JA is the package thermal resistance ( /W for the standard DIP package, and /W for the surface mount package.) The power dissipated within the KIA9 in a given application, is found from the following equation : P D =(V CC I CC )(I RMS V CC )(R L I RMS ) where I CC is obtained from Figrue 5 ; and I RMS is the RMS current at the load ; and R L is the load resistance. Figures, along with Figures 3 (distortion curves), and a peak working load current of ma, define the operating range for the KIA9. The operating range is further defined in terms of allowable load power in Figure for loads of.,, and 3. The left (ascending) portion of each of the three curves is defined by the power level at which % distortion occurs. The center flat portion of each curve is defined by the maximum output current capability of the KIA9. The right (descending) portion of each curve is defined by the maxiumum internal power dissipation of the IC at 5. At higher ambient temperatures, the maximum load power must be reduced according to the above equations. Operating the device beyond the current and junction temperature limits will degrade long term reliability. LAYOUT CONSIDERATIONS Normally a snubber is not needed at the output of the KIA9 unlike many other audio amplifiers. However, the PC board layout, stray capacitances, and the manner in which the speaker wires are configured, may dictate otherwise. Generally the speaker wires should be twisted tightly, and be not more than a few inches in length Revision No : /

7 TYPICAL CHARACTERISTICS A VOL (db) FIGUREAMPLIFIER # OPEN LOOP GAIN AND PHASE Phase Gain 3 7 EXCESS PHASE (DEGREES) DIFFERENTIAL GAIN (db) 3 3 FIGURE3DIFFERENTIAL GAIN versus FREQUENCY R f =5k, R i =.k R f =75k, R i =3.k.µF Ri R f # # VO VO V out.k K K.M.K K K POWER SUPPLY REJECTION versus FREQUENCY FIGUREC=µF FIGURE5C=5.µF C.µF C.µF 5 C=.µF 5 C=.µF PSRR (db) 3 C= PSRR (db) 3 C=.K K K.K K K FIGUREC=.µF FIGURE7C= C=5.µF 5 C=.µF 5 C=5.µF PSRR (db) 3 C=.µF C= PSRR (db) 3 C=.µF C=.µF.K K K.K K K Revision No : 7/

8 FIGUREDEVICE DISSIPATION.Ω LOAD FIGURE9DEVICE DISSIPATION Ω LOAD DEVICE DISSIPATION (mw) V =V CC V CC=.V V CC =3.V DEVICE DISSIPATION (mw) V =V CC V CC=3.V V =V CC V CC =.V LOAD POWER (mw) LOAD POWER (mw) FIGUREDEVICE DISSIPATION 3Ω LOAD FIGUREDISTORTION versus POWER f=.khz,avd=3db DEVICE DISSIPATION (mw) V =V CC V CC =3.V V CC=V V CC=.V 3 5 THD (%) V CC=3.V, R L=Ω V CC=3.V, R L=.Ω V CC=.V, R L=3Ω V CC=V, R L=3Ω V CC=.V, R L=Ω V CC=V, R L=3Ω 3 5 LOAD POWER (mw) OUTPUT POWER (mw) FIGUREDISTORTION versus POWER f=3.khz,avd=3db V CC=3.V, R L=Ω V CC=3.V, R L=.Ω V CC=.V, R L=3Ω FIGURE3DISTORTION versus POWER f=,3.khz,avd=db V CC=3.V, R L=Ω V CC =3.V, R L=.Ω V CC=.V, R L=3Ω THD (%) V CC=V, R L=3Ω Limit THD (%) V CC=V, R L=3Ω Limit V CC =.V, R L=Ω Limit V CC=V, R L=3Ω V CC =.V, R L=Ω V CC=V, R L=3Ω OUTPUT POWER (mw) OUTPUT POWER (mw) Revision No : /

9 FIGUREMAXIMUM ALLOWABLE LOAD POWER FIGURE5POWER SUPPLY CURRENT 5 R =3Ω L. R = L LOAD POWER (mw) 3 R =. L R =Ω L I CC (ma) 3... CD= CD=V CC T A=5 CDerate at higher temperatures.... V CC (VOLTS) V CC (VOLTS) FIGURESMALL SIGNAL RESPONSE FIGURE7LARGE SIGNAL RESPONSE OUTPUT mv/div OUTPUT.V/Div INPUT.mV/Div INPUT mv/div µs/div s/div FIGUREV CC V versus LOAD CURRENT FIGURE9V versus LOAD CURRENT V CC V OH (VOLTS) T =5 C A.V V V CC V OL (VOLTS) T A=5 C V CC =.V V CC =3.V.9. V.V CC. LOAD CURRENT (ma) LOAD CURRENT (ma) Revision No : 9/

10 FIGUREINPUT CD (PIN ) FIGUREAUDIO AMPLIFIER WITH HIGH INPUT IMPEDANCE 75kΩ V CC I CD (µa) Valid for V CD VCC. 3.kΩ. 5.µF 3 5kΩ 5kΩ.kΩ.kΩ 5 Speaker.. V CD (VOLTS) 5kΩ KIA9 Differential Gain = 3dB Frequency Response : See Figure 3 Impedance = 5kΩ PSRR = 5dB 7 Gnd Bias Circuit Disable FIGUREAUDIO AMPLIFIER WITH BASS SUPPRESSION FIGURE3FREQUENCY RESPONSE OF FUGURE.5 5.kΩ.5 5.kΩ F 5kΩ 5kΩ 5kΩ 75kΩ KIA9 V CC.kΩ.kΩ 7 Bias Circuit 5 Speaker Disable DIFFERENTIAL GAIN (db) 3 3.K K K Gnd Revision No : /

11 FIGUREAUDIO AMPLIFIER WITH BANDPASS FIGURE5FREQUENCY RESPONSE OF FIGURE pf.5 5.kΩ.5 5.kΩ. 3 5.µF 5kΩ 5kΩ 5kΩ kω kω KIA9 V CC.kΩ.kΩ 7 pf Bias Circuit 5 Speaker Disable DIFFERENTIAL GAIN (db) 3 3 K K K Gnd FIGURESPLIT SUPPLY OPERATION R f 75kΩ Audio. 3.kΩ Vin C Ri FC 3 V CC (. to.v).kω.kω 5 VO Speaker FC 5kΩ 5kΩ VO 5kΩ KIA9 V EE (. to.v) Bias Circuit CD V CC kω 7 kω kω Chip Disable V EE NOTE : If V CC and V EE are not symmertrical about ground then FC must be connected through a capacitor to ground as shown on the front page Revision No : /