Single-Stage PFC Topology Employs Two-Transformer Approach For Improved Efficiency, Reliability, And Cost

Transcription

1 Sgle-Stage PFC opology Employs wo-ransformer Approach For Improved Efficiency, Reliability, And Cost ISSUE: December 2013 by Fuxiang L, Independent Researcher, Sydney, Australia and Fuyong L, Hua Qiao University, Mechanical Department, Xiamem, Fujian, Cha A new sgle-stage power factor correction (PFC) power supply topology uses two transformers. he ma transformer transfers energy from the primary circuit to the secondary circuit, while the auxiliary or forward transformer provides energy to correct the power factor (PF) of the put current waveform. he primary wdgs of these two transformers are connected series. his topology can be used all power supply topologies cludg sgle-switch power supply topologies such as the forward and flyback converters, and the half-bridge, full-bridge and LLC-resonant converters. For the flyback power supply, this circuit can be operated with universal put, because energy stored the ductor (flyback transformer) is related to current through the ductor. For the forward and half-bridge power supplies, this circuit can operate over an put voltage range of either 180 to 260 V ac or 90 to 150V ac. he three ma advantages of the new topology are its high efficiency, high reliability and lower cost. Limitations Of Existg opologies Generally, the dc output required for one dc load can be obtaed from a two-stage switchg power supply one ac-dc power converter or PFC stage connected to one dependently-controlled dc-dc post regulator. [1] he ma advantages of the two-stage switchg power supply are its high power factor and low source-current harmonics. Many different two-stage switchg power supplies have been proposed, which the first stage performs the PFC function and the subsequent dc-dc post regulator transfers power directly to the load to perform the required regulation. However, there are some disadvantages these structures, cludg poor efficiency due to two-stage power processg and large circuit structure resultg from the requirement for multiple switch components and the correspondg PWM controllers. he two-stage topology always uses dividual feedback circuits and controllers, which requires powerg of isolation circuits, error amplifiers, PWM controllers, and so on. herefore, the twostage topology has poor efficiency as the auxiliary power needed will be greater than that required the sglestage topology. In addition, the PFC power stage can suffer from poor efficiency if the controller for this stage is operatg the contuous conduction mode (CCM) due to power loss the fast-recovery diode. o overcome the drawbacks of the two-stage switchg power supply, many sgle-stage PFC power topologies have been proposed. [2] However, these sgle-stage designs do not improve the efficiency, because they use the same strategy as the two-stage PFC power supply. he only difference is that they use one switchg component to perform two functions, which creases the stress on that switch. o overcome the drawbacks of existg two-stage and sgle-stage PFC power supply topologies described above, a new topology for sgle-stage PFC power supplies is proposed. In this topology, only one power conversion stage is used to perform both power factor correction and dc output regulation. However, the ma difference this sgle-stage topology is that uses two transformers: one for transferrg power to the regulator output, and the other for correctg the put current waveform. Despite the addition of a second transformer, the topology actually enables cost reductions. hat s because the added component is a small, expensive part and savgs are achieved elsewhere the design through the use of a lower-cost ductor and lower-cost diodes. his new topology employs a series rather than parallel configuration. here are two advantages usg a series configuration: One is that the energy drawn from the put is proportional to the output energy. he other advantage is that the recycled energy for correctg the put current waveform is only a small fraction of the power chargg the storage capacitor the primary circuit. hat s because most of the power for chargg the capacitor is drawn from the put How2Power. All rights reserved. Page 1 of 11

2 he operatg prciples, ductor design, and forward transformer design for this new sgle-stage PFC power supply topology are explaed this article. In addition, experimental results are presented that verify the functionality and feasibility of the proposed topology. Analysis Of he New opology he proposed sgle-stage switchg power supply is shown Fig. 1 where the topology is implemented as a flyback converter. In the followg analysis, all components are assumed to be ideal. Because the switchg frequency is much higher than the le frequency, the source voltage is considered constant with one switchg period. he PFC ductor current operates discontuous mode (DCM) to reduce the voltage stress on the fast-recovery diodes D20 and D22. Prciples of Operation Fig. 1. he proposed sgle-stage PFC switchg power supply implemented as a flyback converter. 22 is the ma transformer, while 20 is the forward (or auxiliary) transformer. When the switchg component Q20 is switched on, the circuit operates as shown Fig How2Power. All rights reserved. Page 2 of 11

3 Fig. 2. his model depicts operation of the proposed PFC power supply when MOSFE Q20 is conductg. he current dischargg from the capacitor C22 conducts through the forward transformer 20 s first primary wdg and the ma transformer 22 s primary wdg. As a result, there is an duced voltage Vt20s the second primary wdg of the forward transformer 20. his duced voltage with the rectified put voltage V forces a current to conduct through the ductor L20 and diode D20 to charge the capacitor C22. If the voltage across the capacitor is Vc, then from Kirchhoff s voltage law (KVL) the followg equation is derived for determg the put current I: L di dt - t2 Vc (1) When the switchg component Q20 is switched off, as represented Fig. 3, there is an duced voltage VL the ductor L20 and this voltage VL with V forces a current to conduct contuously through the ductor L20 and charge the capacitor C22. Aga, usg KVL, the followg equation is: L di V - Vc (2) dt 2013 How2Power. All rights reserved. Page 3 of 11

4 Fig. 3. Operation of the proposed PFC power supply when MOSFE Q20 is turned off. he duced voltage V t20 changes accordg to the put voltage V. If the put voltage is high and (L di/dt) is lower than V, the duced voltage Vt2 decreases accordgly. If the put voltage is low and (L di/dt ) is higher than V, the duced voltage Vt2 creases accordgly. Given that we are assumg ideal components and there is conservation of energy, the supplied energy is equal to the load energy, so that the energy through the primary wdg of the forward transformer is equal to the energy drawn from the correction wdg of this transformer. herefore, when the put voltage creases, then Vt2 i creases, but the Vt2 i is limited by the power through the first primary wdg of the forward transformer 20 and this results the duced voltage Vt2 decreasg. When the put voltage decreases, then the put current i deceases and the Vt2 i decreases, but the power through the first primary wdg of the forward transformer 20 is kept steady. his results the duced voltage Vt2 creasg. his can be expressed by followg diagram (Fig. 4). Fig.4 his simplified circuit illustrates how the put current chargg capacitor C22 causes Vt2 to vary versely with changes the put voltage. he second wdg duced voltage changes accordg to the put voltage as shown Fig How2Power. All rights reserved. Page 4 of 11

5 Fig. 5. V t2 versus V. he Half-Bridge And LLC Circuit he new topology can also be implemented a half-bridge LLC circuit as shown Fig. 6. Fig.6 he sgle-stage PFC power supply topology implemented usg the half-bridge LLC circuit. he prciples of operation for this circuit are as follows. When the upper switch Q21 is turned on, the current discharged from the capacitor C22 conducts through the path that is the load of the half-bridge power supply circuit. his circuit consists of the primary wdg of the ma transformer 22, the first primary wdg 21p of the forward transformer 21 and the capacitor C24. As a result of the current flowg through 21p, a voltage is duced the second wdg 21c1 and a voltage of equal amplitude but opposite polarity is duced the third wdg 21c2 of the forward transformer 21. (Note: the c 21c1 and 21c2 refers to correction wdg.) his duced voltage combation with the put voltage forces an put current to flow through the path consistg of the ductor L20 and the first diode D21, chargg the storage capacitors C22 and C How2Power. All rights reserved. Page 5 of 11

6 When the upper switch Q21 is switched off, a voltage is duced the ductor L20. his duced voltage and put voltage force a current through the path consistg of the third wdg 21c2 of the forward transformer and the second diode D22, chargg the storage capacitors C22 and C23. When the lower switch Q22 is switched on, the current discharged from the capacitor C23 conducts through the route that consist of the capacitor C24, the first primary wdg 21p of the forward transformer 21 and the primary wdg of the ma transformer 22. As a result of the current flowg through 21p, a voltage is duced the second wdg 21c1 and the third wdg 21c2 of the forward transformer 21. his duced voltage and the put voltage force a current to conduct through the path that consists of the ductor L20 and the second diode D22 to charge the storage capacitors C22 and C23. When the lower switch Q22 is switched off, there is an duced voltage the ductor L20. his duced voltage together with the put voltage forces a current to flow through the path formed by the second wdg 21c1 of the forward transformer and the first diode D21, chargg the storage capacitors C22 and C23. Analysis And Design Considerations he put energy can be analyzed terms of the energy associated with the output power, Pout, and the energy transferred the forward transformer 20 Fig. 1, Precycle. hese two power parameters can be defed: P out = I V + I V L and P recycle = I V t2 (3) For a half cycle of the put ac voltage with period. If I I Ldt P out 0 (4) then the voltage on the capacitor C22 is kept steady. But if I I Ldt P out 0 (5) then the voltage on the capacitor C22 is kept at the peak value of the put voltage. he shortage stored energy is supplied by put voltage directly chargg the capacitor. And if I I Ldt P out 0 (6) then voltage on capacitor C22 is creased to rebalance both sides of equation 4, creasg the recycle energy Precycle= I *Vt2 and decreasg the I V + I V L power until I I Ldt P out 0 (7) 2013 How2Power. All rights reserved. Page 6 of 11

7 he selection of the first primary wdg of the forward transformer 20 Fig. 1 and the ductor is the key to this design. he number of turns on the first primary wdg of the forward transformer depends on the ductance of the primary wdg of the ma transformer 22. he higher the ductance of the primary wdg of the ma transformer, the higher the number of turns required on the first primary wdg of the forward transformer. he value of ductor L20 is selected based on the value of the voltage across the capacitor. he higher the voltage, the higher the ductance value. In general, the voltage across the capacitor is selected to be about 10 to 20 V above the peak value of the put voltage for the flyback power supply. he ductance value of the ductor is selected to be less than 0.30 mh. By selectg the proper first primary wdg of the forward transformer and the proper ductance value of the ductor, a very good put current waveform is obtaed and the PF can be as high as For the forward and half-bridge LLC power supplies, the voltage across the primary bulk capacitor is selected to be about 5 to 10 V above the peak value of the put ac voltage. While the magnetics design is more complex than existg PFC topologies, this complexity does not crease design cost, but rather works to reduce it. he cost of addg the forward transformer is small estimated to be <2 yuan Cha or <$0.33 U.S. because it is only needed to transfer a small amount of power. Most power is putted to the buck capacitor C22 when the put is near its peak voltage and only a small amount of power (duced voltage the forward transformer) is used for this transformation. Near the zero voltage value of put voltage, only a small amount of put power needs to be transferred to the buck capacitor. he current amplitude through the forward transformer wdg and the ductor is actually smaller than the current amplitude through the ductor of the two-stage PFC topology. herefore, the new topology can use fast-recovery diodes with lower current ratgs, reducg diode cost, and a smaller ductor. he ductor cost is estimated to be less than 0.4 yuan or <$0.07 U.S. Analyzg PFC Power Loss he average duced voltage is set to be less than half of the average put voltage, so that the recycle power Precycle <one third of output power Pout. In general, for a forward power supply, the MOSFE s switchg loss is less than 2% of the total output power. For example, for 200-W output power, the switchg loss is <4 W. Suppose the recycle power Precycle is a third of the output power Pout. hen the switchg loss for the recycle power Precycle is <1.3 W and the total power loss for the PFC function is Ploss = 1.3 W + the power loss the forward transformer 20 + the power loss the fast-recovery diodes D20 and D22 + the power losses the ductor and the forward transformer. he flyback power supply applies the same rule as above because the forward transformer has little leakage ductance and adds only a small amount of MOSFE switchg loss. For the half-bridge, full-bridge and LLC power supplies, the switchg power losses are a small percentage of the output power, especially for the LLC power supply, the switchg power loss can be only 1% of output power. In this case, the MOSFE s switchg loss for power factor correction is 0.33% of the output power. Experimental Results o verify operation of the proposed sgle-stage PFC topology and its various circuit implementations, several prototypes were built and tested. One was the 70-W, 22.5-V output flyback pictured Fig. 7. Operatg from a supply voltage of 250 V ac and loaded for 50 W of output, this supply produced the put waveform shown Fig. 8. In this test, output current was measured at 2.1 A and put current was measured at A with a power factor of Under these conditions, the prototype achieved 91% efficiency. At full load and no load, the primary voltage across the bulk capacitor C20 was 365 V and 375 V, respectively. A measure of power factor at almost full load was performed usg Voltcraft s Energy Monitor 3000 with the results shown Fig How2Power. All rights reserved. Page 7 of 11

8 Fig.7 A 70-W flyback power supply prototype. Fig.8. Input current waveform for 70-W flyback power supply at 50-W output How2Power. All rights reserved. Page 8 of 11

9 Fig. 9. Measurement of put power and power factor for the 70-W flyback prototype. Another prototype was built of a 250-W computer power supply. For this design, the voltage at the primary bulk capacitor was measured to be 355 V for outputs varyg from from 0 W to 250 W. A photo of this prototype appears Fig. 10 with a measurement of its put current waveform shown Fig. 11. Fig W computer power supply prototype. Fig. 11. Input current waveform produced by 250-W computer power supply at 220-W output How2Power. All rights reserved. Page 9 of 11

10 Fally, a third prototype of the new PFC topology was built as a 210-W LLC V power supply. A photo of the prototype and its put waveform is shown Fig. 12. Conclusion Fig W sgle-stage LLC power supply prototype for television application. he sgle-stage PFC topology described this article can be used all kds of power supply topologies. Specifically for high-power applications, it is the better option for implementg PFC because it produces smooth put current and the time for chargg the storage capacitor is longer than the boost PFC topology. It is simple, highly efficient, reliable and lower cost. Experimental results confirm the quality of the put waveform and the high efficiency of power supplies built usg this topology. References 1. A comparison of high power sgle-phase power factor correction pre-regulators, by F. Beltrame, L. Roggia, L. Schuch and J. R. Pheiro, IEEE International Conference on Industrial echnology (ICI), Va del Mar, Chile, 2010, pp Cost-effective boost converter with reverse-recovery reduction and power factor correction by Jung-M Kwon, Woo-Young Choi, and Bong-Hwan Kwon, IEEE ransactions on Industrial Electronics, 55 (1) (2008), pp About he Authors Fuxiang L currently lives Sydney, Australia where he has been engaged research on power factor correction and ways to improve power supply efficiency sce Prior to that L worked at Yongxiang Electronic Ltd as electronics engeer and, before that, as an electronics technician at Acon echnology Ptd, after movg to Australia Previously, he worked as an electrical engeer Cha from 1985 to L received a BE degree from South Cha University of echnology 1985 and an ME degree from Zhejiang University He can be reached at frankmailid@yahoo.com or by phone at How2Power. All rights reserved. Page 10 of 11

11 Fuyong L is a professor at the Institute of Mechanical and Electrical Engeerg, Huaqiao University, Xiamen, Fujian, Cha. He received a BE Degree From Agriculture University of Fujian Provce, an MS Degree from South Cha University of echnology, and a Ph.D from ianj university. L can be reached at fyl@hqu.edu.cn. For further readg on power factor correction, see the How2Power Design Guide, select the Advanced Search option, go to Search by Design Guide Category and select Power Factor Correction the Popular opics category How2Power. All rights reserved. Page 11 of 11