Digital-Controlled Power Factor Corrector with Transition Current Mode Control without Zero Current Detection

Transcription

1 PEDS009 Digital-Controlled Power Factor Corrector wi Transition Current Mode Control wi Zero Current Detection Chia-An Yeh, Kung-M Ho, Yen-Sh ai Center for Power Electronics Technology, National Taipei University of Technology Taipei, Taiwan, R.O.C. Abstract -It is well known at transition current mode control for power factor corrector can reduce e reversal recovery loss for e diode. This meod can be realized usg discrete control tegrated circuit which requires zero-crossg detection circuit. In is paper, a novel control technique for digital-controlled power factor corrector to achieve transition current mode control is proposed. The switchg period to reta zero current switchg is predicted and e turn-on period is determed by e voltage controller. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is wi 00 V/AC put and 400 V/DC put. Its power ratg is 50 W. Experimental results show at e power factor is higher an 0.98, efficiency is greater an 94% and current total harmonics distortion (THDi) is smaller an 4% under full load condition and confirms e above-mentioned claims very well. Keywords-power factor corrector; transition current mode; digital control Fumikazu Takahashi, Masahiro Hamaogi Hitachi Computer Peripheral Co. td., Japan Japan current equal to zero and ereby reducg e reversal recovery loss of diode. The power device is turned at e begng of every switchg period, retaed durg e on-time period which is controlled by voltage loop controller, and turned when e ductor current becomes zero. I. INTRODUCTION Power factor correction technique has been widely used AC to DC switchg mode power system to meet e requirement of ternational standards. The PFC can reduce e harmonics of le current and improve power factor by unity power factor control. In order to achieve unity power factor and high efficiency, several topologies and control meods are analyzed [-9]. The reduction of reversal recovery loss of diode is one of e most tensive research topics. One way is to use silicon carbide diode at e expense of more cost [3-4]. An alternative approach is to turn-on e power device wi zero current switchg by transition current mode control [5-8]. For conventional transition current mode control as shown Fig., zero-current detection is required conventional analog implementation. Zero-crossg detection can be achieved usg -series resistor, Hall sensor, or coupled ductor. For transition current mode control meod, e ductor current and duty are shown Fig. As shown Fig., e power device is turned on as ductor Fig. Conventional transition current mode controlled PFC converter Fig. Typical ductor current and duty waveforms 98

2 Digital control is wi some advantages, cludg less discrete-component count, no agg issue for e compensator components, higher flexibility and fast time-to-market. Therefore, digital power has received more and more attention for research and dustrial applications [9]. In is paper, a novel control technique for digital-controlled power factor corrector to achieve transition current mode control wi zero-current detection is proposed. The switchg period to achieve zero current switchg is predicted and e turn-on period is determed by e voltage controller. Experimental results derived from a DSP-based controller are presented for confirmation. II. PROPOSED DIGITA-CONTROED TRANSITION CURRENT MODE Figure 3 shows e proposed digital-controlled transition current mode PFC boost converter system. As shown Fig.3, e voltage error between e reference and its feedback value gives e on-time command via PI controller. The switchg period will be predicted by proposed control meod and e duty cycle can be determed accordg to predicted switchg period and on-time command. (n) -time shown (3). T [ n+ ] T [ n] (3) In order to achieve zero current switchg, e control function can be derived from Fig.4: Ton[ n] I[ n] + m mt[ n] = 0 (4) where I T T m m [ n] = e n sampled average ductor current on[ n] = e n on time [ n] = e n time = on-time current slope = -time current slope The (n) -time can be obtaed by (4) as: m T n = I n + T n (5) [ ] [ ] on[ ] m m PEDS009 Accordg to (3) e (n+) -time can be derived as: m T n + = I n + T n (6) [ ] [ ] on[ ] m m The (n+) switchg period can be determed by: m Ts[ n + ] I[ n] ( ) Ton[ n] m + + m (7) Fig. 3 Digital controlled PFC converter Fig.4 shows e relationship among sampled current ( I [n] ), samplg stant and duty. As shown Fig. 4, an error between e reference and ductor current (solid le) under transient condition can be removed by controllg e switchg period properly. More details of e deduction of e predictive duty are as follows. Under steady state, e (n+) on-time command is e same as at of its previous one as shown by: T [ n+ ] = T [ n] () on on Sce e switchg frequency for PFC control is greater an e le frequency, e followg condition can be assumed as: T[ n+ ] T[ n] () s s By () and (), e (n+) -time is e same as at of e In PFC boost converter, e current slopes are: Vˆ s ωt V [ n ] m = = (8) V ˆ V s ωt V [ n ] V [ n ] m = = (9) Where V ˆ = peak value of put voltage V n = [ ] n sampled put voltage V n = [ ] n sampled put voltage = put ductor By (7)-(9), e switchg period for transition current mode control is given by: 99

3 Ts[ n+ ] = I[ n] V [ n] V [ n] V[ n] + [ + ] Ton[ n] ( V [ n] V [ n]) (0) As shown (0), e predictive switchg period is determed by put voltage ( V ), put voltage ( V ), put ductor ( ) and average ductor current ( I ). PEDS009 stant of carrier counter, t n+, as shown Fig.5. Therefore, e carrier command, V m [n+], derived by (0)-() can be rewritten as: CK Ts [ n + ] Vm[ n+ ] = CK = I[ n] ( V[ n] V[ n]) V[ n] + ( + ) Ton _ com[ n] ( V [ n] V [ n]) (3) V V V m m = = i () t Fig. 4 Relationship between sampled current ( I [n] ) and samplg stant under transition current mode IV. DSP-BASED IMPEMENTATION OF PROPOSED CONTRO TECHNIQUE In is section, e maximum value of carrier will be defed. Fig.5 shows e relationship among carrier, duty, ductor current and samplg stant under transition current mode. As shown is Fig.5, triangular modulation is used to produce e duty cycle and e peak value of carrier for triangular modulation is: CK Ts[ n] Vm[ n] = () The on-time command derived from e voltage loop control is: CK Ton[ n] Ton _ com[ n] = () Where Ton[ n] = on-time value, e n sample T [ n] = on-time command, e n sample on _ com Vm[ n] = DPWM counter peak value, e n sample CK = DSP clock frequency = 50MHz For DSP-based implementation, e carrier command, V m, and on-time command, T on_com, should be calculated by e restart Fig.5 Relationship between carrier, duty, ductor current and samplg stant under transition current mode V. EXPERIMENTA SYSTEM AND RESUTS The specifications of e digital-controlled AC/DC converter are shown Table I. The put voltage is 00 V AC and e put voltage is 400 V DC. The switchg frequency varies from 30 khz to 00 khz. Fig. 6 shows e block diagram of e experimental system and e photo of e experimental system. A digital signal processor is used as e digital controller to realize e transition current mode PFC control software. Table I Specifications of PFC converter Specification Input Voltage Output Voltage Output Power Switchg Frequency Inductor value Capacitor value Control device 00Vac/50Hz 400Vdc 50W 30kHz ~ 00kHz 40μH 330μF TMS30F8 3 00

4 PEDS009 (A) Block diagram (A) (B) Photo of experimental system Fig. 6 Experimental system Fig. 7(A) shows e experimental results, cludg put voltage, ductor current and PWM signal waveforms under half load condition. As shown Fig. 7 (B), e ma switch is turned on as ductor current is zero. As shown Fig. 7 (C), e put current and voltage are phase confirmg good power factor. Similarly, Fig. 8 shows e experimental results under full load condition confirmg e effectiveness of e proposed digital-controlled TCM PFC. The measured power factor is shown Fig. 9 (A). As shown Fig. 9 (A), e power factor is greater an 0.99 under full load condition. Fig. 9 (B) shows e measured results of efficiency. The efficiency is greater an 93% under various kds of load conditions. Fig. 9(C) shows e measured results of current THD. The current THD is smaller an 4% under full load condition. These experimental results demonstrate e effectiveness of e proposed digital-controlled TCM PFC converter. (B) (C) Fig.7 Experimental results, Ch: Input voltage, Ch: Inductor current, Ch3: Switchg signal for (A) and (B); Ch: Input voltage, Ch3: Input current, Ch4: Output voltage for (C) (V=00V, V=400V, P=5W) 4 0

5 PEDS009 Power factor Output power (W) (A) Power factor (A) Efficiency (%) Output power (W) (B) Efficiency (B) THDi(%) Output power (W) (C) THDi Fig.9 Experimental results (C) Fig.8 Experimental results, Ch: Input voltage, Ch: Inductor current, Ch3: Switchg signal for (A) and (B); Ch: Input voltage, Ch3: Input current, Ch4: Output voltage for (C) (V=00V, V=400V, P=50W) VI. CONCUSION This paper proposes a predictive control technique for digital-controlled power factor corrector to achieve transition current mode control. The special features of e proposed predictive control technique cludes not requirg 5 0

6 zero-crossg detection of current and no need of fast A/D converter and samplg of current for current sensg. Moreover, an on-time compensation technique is also proposed is paper to cope wi e current sharg issue caused by e parameter variation between terleaved TMCPFC. Experimental results derived from a DSP-based controller are presented for confirmation. The power factor corrector is wi 00 V/AC put and 400 V/DC put. Experimental results show at for sgle phase, e power factor is higher an 0.98, efficiency is greater an 94% and current total harmonics distortion (THDi) is less an 4% under full load condition. PEDS009 ACKNOWEDGEMENT This work is sponsored by Hitachi Computer Peripheral Co. td. and Hitachi Research ab., Japan. REFERENCE [] B. Sgh, B.N. Sgh, A. Chandra, K. Al-Haddad, A. Pandey and D.P. Koari, A review of sgle-phase improved power quality AC-DC converters, IEEE Trans. on Industrial Electronics, Vol. 50, No.5, pp.96 98, OCT., 003 [] M. M. Jovanovic, and Y. Jang, State-of-e-Art, Sgle-Phase, Active Power-Factor-Correction Techniques for High-Power Applications An Overview. IEEE Trans. on Industrial Electronics, Vol. 5, No.3, pp , June, 005 [3] P. Das, A. Mousavi, G. Moschopoulos and P. Ja, A study of ac-dc ZVS-PWM boost converters wi silicon carbide diodes, IEEE APEC, pp.58 64, Feb., 009. [4] M. Janicki, D. Makowski, P. Kedziora,. Starzak, G. Jablonski and S. Bek, Improvement Of PFC Boost Converter Energy Performance Usg Silicon Carbide Diode, IEEE MIXDES, pp.65 68, June, 006. [5] T.F. Wu, J.R. Tsai, Y.M. Chen and Z.-H. Tsai, Integrated Circuits of a PFC Controller for terleaved critical mode boost converters, IEEE APEC, pp , Mar., 007. [6]. Huber, B. T. Irvg and M. M. Jovanovic, Open-loop control meods for terleaved DCM/CCM boundary boost PFC converters, IEEE Trans. on Power Electronics, Vol. 3, No. 4, pp , July, 008. [7] J. W. Kim, S. M. Choi and K. T. Kim, Variable on-time control of e critical conduction mode boost power factor correction converter to improve zero-crossg distortion, IEEE PEDS, pp , Nov., 005. [8] J. Zhihong and. Hui, DSP Control of terleavg critical PFC module for high power application, IEEE IECON, pp. 7-76, Nov., 008. [9] Z. Z. Ye and M. M. Jovanovic, Implementation and performance evaluation of DSP-based control for constant-frequency discontuous-conduction-mode boost PFC front end, IEEE Trans. on Industrial Electronics, Vol. 5, pp.98 07, Feb.,