Enhanced Variable On-time Control of Critical Conduction Mode Boost Power Factor Correction Converters

Transcription

1 890 Journal of Power Electronics, Vol. 4, No. 5, pp , September 04 JPE ISSN(Print): / ISSN(Online): Enhanced Variable On-time Control of Critical Conduction Mode Boost Power Factor Correction Converters Jung-Won Kim *, Je-Hyun Yi, and Bo-Hyung Cho ** * Engineering Research Institute, Seoul National University, Seoul, Korea ** Department of Electrical and Computer Engineering, Seoul National University, Seoul, Korea Abstract Critical conduction mode boost power factor correction converters operating at the boundary of continuous conduction mode and discontinuous conduction mode have been widely used for power applications lower than 300W. This paper proposes an enhanced variable on-time control method for the critical conduction mode boost PFC converter to improve the total harmonic distortion characteristic. The inductor current, which varies according to the input voltage, is analyzed in detail and the optimal on-time is obtained to minimize the total harmonic distortion with a digital controller using a TMS30F8335. The switch on-time varies according to the input voltage based on the computed optimal on-time. The performance of the proposed control method is verified by a 00W PFC converter. It is shown that the optimized on-time reduces the total harmonic distortion about 5% (from 0.48% to 5.5%) at 0V when compared to the variable on-time control method. Key words: Critical conduction mode, Digital control, Power factor correction, Total harmonic distortion, Variable on-time control I. INTRODUCTION Along with the remarkable developments in power electronics, the usage of non-linear loads has drastically increased. The increase usage of non-linear loads generates more harmonic current than in the past. The harmonic components of an input current are not involved in power transfer, but just circulate through transmission lines and increase the RMS value of the input current, which increases the conduction losses of the transmission lines and generates heat []. Because of these problems, international regulations on harmonic currents such as IEC have been established. To satisfy these regulations, AC-DC converters should contain power factor correction (PFC) circuits as a pre-regulator. For power applications less than 300W, a critical conduction mode (CRM) boost PFC converter has been widely used []-[5]. The main advantages of the CRM boost Manuscript received Feb. 5, 04; accepted Jun. 0, 04 Recommended for publication by Associate Editor Yan Xing. Corresponding Author: yijh058@snu.ac.kr Tel: , Fax: , Seoul National University * Engineering Research Institute, Seoul National University, Korea ** Dept. of Electrical and Computer Eng., Seoul National University, Korea PFC converter, when compared to the continuous conduction mode (CCM) boost PFC converter, are that it has no reverse recovery problem in the diode and it is easy to achieve zero voltage switching (ZVS) or quasi-zvs without auxiliary circuits. When compared to the discontinuous conduction mode (DCM) boost PFC converter, it has less current stresses on the active and passive components, and a smaller input filter. The current mode control method has been widely used to control CRM boost PFC converters. The current mode control method senses the rectified line voltage and generates a current reference signal by multiplying the sensed information with the output voltage of the error amplifier [6]. Then the current reference signal is compared with the sensed inductor current information to make the peak inductor current follow the waveform of the rectified line voltage. This is the best way for the power factor correction, because the inductor current is directly controlled to follow the sinusoidal reference waveform. The most popular control IC using the current mode control for the CRM boost PFC converter is the 656/ from STMicroelectronics. However, many semiconductor companies have started developing control ICs using the voltage mode control method for CRM boost PFC converters to reduce both the external components and 04 KIPE

2 Enhanced Variable On-time Control of 89 the power loss [7]-[9]. The voltage mode CRM PFC control IC compares a ramp signal with the output voltage of the error amplifier and then the switch on-time is controlled to be constant irrespective of the line voltage. Because the inductor current is zero when the switch is turned on, the peak inductor current is proportional to the rectified line voltage. Therefore, the line current can follow the line voltage waveform achieving a unity power factor. In addition, the voltage mode CRM PFC control IC does not need a multiplier to generate the sinusoidal reference that is necessary for the current mode control IC. Because of this benefit, the internal IC circuit is simpler and the external circuit design is easier than those of the current mode CRM PFC ICs. Therefore, many applications including CD TVs and notebook adapters are using the voltage mode CRM PFC IC and the number of applications adopting the voltage mode CRM PFC IC is increasing. The conventional control method of the voltage mode CRM boost PFC converter is a constant on-time (COT) control. Fig. shows a voltage mode CRM boost PFC converter circuit, which determines the switch turn-off instant by comparing the internal ramp signal and the output voltage of the error amplifier. Theoretically, the input current should follow the input line voltage waveform if the switch is turned on right after the inductor current reaches zero. However, there is some delay time before the switch is turned on because of the zero current detection (ZCD) circuit. The ZCD circuit is necessary to sense the instant that the inductor current reaches zero and an auxiliary winding coupled with the inductor is used for zero current detection. As shown in the waveforms of Fig., the switch output capacitor (C oss ) starts to be discharged resonating with the inductor after the diode is turned off. Then, the auxiliary winding voltage drops starting from n (V o -V in ). If this voltage is lower than the threshold voltage (V ON_ZCD ), the switch is turned on. The ZCD circuit introduces some delay time before the switch is turned on after the inductor current reaches zero and this delay time can be controlled to achieve zero voltage switching (ZVS) or quasi-zvs by using R ZCD and C ZCD as shown in Fig.. However, this delay time causes some distortion of the input line current. Several methods have been proposed to solve this problem [6], [0]-[6]. However, some of these methods are empirical and one method is analytical. However, it cannot be applicable to wide input voltage applications. This paper first describes some of the existing methods in section II. Then, an enhanced variable on-time (evot) control method is proposed in section III. Unlike the conventional control methods, the proposed method computes the switch on-time by analyzing key waveforms of the CRM boost PFC converter. The switch on-time is derived from the computation for compensating the zero-crossing distortion and the input current shaping at every switching + - Fig.. Voltage mode CRM boost PFC converter circuit. Fig.. ZCD circuit related waveforms. instant. The performance of the proposed method is verified with a 400V, 00W boost PFC rectifier controlled by a digital signal controller (DSC) in section IV. Section V provides some conclusions. II. EXISTING CONTRO METHODS TO IMPROVE CURRENT DISTORTION A. Variable On-Time (VOT) Control Method The CRM boost PFC converter circuit shown in Fig. is analyzed when the input voltage has a positive value. As the CRM boost PFC converter has a zero-crossing detection (ZCD) circuit to detect the turn-on instant, the switching frequency of the CRM boost PFC converter is variable depending on the input voltage and the output power. The ZCD circuit is set when the inductor current is zero. A switch SW is turned on at every zero-crossing event and is turned off when the ramp signal meets the output voltage of the error amplifier. In the CRM boost PFC converter, the input current over a switching period is expressed as (). Iin = i, peak = t () on

3 89 Journal of Power Electronics, Vol. 4, No. 5, September 04 If the on-time of the switch, t on, is constant, the input current follows the waveform of the input voltage as shown in (). This allows for a unity power factor with a sinusoidal input voltage. However, to achieve ZVS or quasi-zvs, the turn-on instant of the switch is delayed until the switch drain-source voltage reaches zero or valley to minimize the switching loss. Because the delay time is almost constant and the t off shown in Fig. decreases as the input voltage decreases, the effect of the delay time is dominant around the zero crossing of the input voltage so that the THD of the input current can increase. A variable on-time control (VOT) method has been proposed to improve the THD of the input current by controlling the switch on-time as shown in Fig. 3 [6]. It simply adds a resistor R between the auxiliary winding and the MOT pin. The MOT pin is for setting the internal ramp slope to control the on-time. The voltage of the MOT pin, V MOT, is constant and if a resistor R is used, an internal current source that is proportional to V MOT /R charges an internal capacitor to make a ramp signal. Without R, the ramp slope is constant and the switch on-time is controlled to be constant. However, if R is used, (V MOT -V AUX )/R current is added to V MOT /R. Then, the internal ramp slope changes according to the input voltage because V AUX is negatively proportional to the input voltage when the switch is turned on. The ramp signal generated by I varies according to the input voltage, and this signal is added to the constant ramp signal generated by I as shown in Fig. 4. The internal ramp signal consists of the constant ramp signal and a ramp signal that varies according to the input voltage as shown in (). I + I ton VMOT VMOT ton n VRamp = ton = ( + ) + () C C R R C R Ramp Ramp Ramp where, C Ramp is the internal capacitor for ramp generation, and n is the turn ratio of the inductor. As the input voltage decreases, the on-time increases from t on to t on3. Therefore, t on is at its maximum near the AC line zero crossing point and is at its minimum at the AC line peak point. This method is very simple and effective. However, R should be obtained based on experiments to find the value that minimizes the THD. B. Perturbation On-Time (POT) Control Method Another variable on-time control method has been proposed as shown in Fig. 5 [6]. The inductor current information and the internal ramp signal are added to be compared with the output voltage of the error amplifier. This method is another implementation of [6], because the inductor current information is proportional to the input voltage. In addition, the current limiting circuit might be triggered if too high a R CS is used to improve the THD performance. This method is also empirical. C. Analytical On-Time Adjustment Scheme Fig. 3. Variable on-time CRM boost PFC converter. Fig. 4. Internal ramp signal of the VOT control method. + - Fig. 5. Perturbation on-time CRM boost PFC converter. There is an attempt to adjust the on-time analytically in [4]. This scheme senses the switch v ds voltage to determine the ZVS instant. However, it cannot be applicable if the input voltage is higher than half of the output voltage, because the switch voltage does not become zero after the inductor current reaches zero. In addition, the analysis is performed only when the input voltage is lower than half of the output voltage. III. PROPOSED CONTRO METHOD Several methods have been proposed to improve the THD performance of the voltage mode CRM boost PFC converter but the methods are empirical and the analysis does not cover

4 Enhanced Variable On-time Control of 893 all the operating conditions as described in section II. In this section, a new control method is proposed based on an analysis of the input current. A. Analysis of the Input Current An analysis of the inductor current is necessary to determine the variations of the switch on-time. The waveform of the inductor current during the ZCD delay time varies according to the rectified input voltage. If the rectified input voltage of the CRM boost PFC converter is higher than half of the output voltage V o, the energy stored in the inductor when the current is negative is not sufficient to make the switch voltage v ds zero. On the other hand, if the rectified input voltage of the CRM boost PFC converter is lower than half of the output voltage, the inductor is charged sufficiently so that the switch voltage drops to zero. This results in a difference in the waveform of the inductor current and the compensated on-time is determined by separate equations according to the magnitude of the input voltage. Fig. 6 shows the waveforms of the switch gating signal, the inductor current i, the inductor voltage v, and the MOSFET drain-source voltage v ds during one switching period, when V in is higher than V o /. As shown in Fig. 6, the switch is turned on when the drain-source voltage reaches the valley by resonance between the switch parasitic capacitor and the boost inductor to achieve the minimum voltage switching. In this condition, the inductor current during one switching period is divided into three periods; the switch conduction period (t 0 -t ), the diode conduction period (t -t ) and the C resonance period (t -t 3 ). The input current of the CRM boost PFC converter is equal to the average inductor current over one switching period. The average input current considering the delay time is expressed as (3). æ ö Iin = i = i dt = t T on ( ton + toff ) - S (3) neg s T òt ç s s Ts è ø where, S neg is the area of the inductor current for t d. S neg is obtained from the integral of the inductor current over a half of the resonance period after the inductor current has become zero. S neg is obtained by (4). Coss Sneg = ò ( Vo - ) sinwrt dt = Coss ( Vo - ) td (4) where, t d is one-half of the resonance period, p, and w r is the frequency of the resonance, / C. oss C oss Equation (5) can be obtained by substituting (4) into (3) to get the average input current over one switching period. Iin = ( ton ( ton + toff ) - 4Coss ( M -)) (5) ton + toff + td where, M=V o /V in. When V in is lower than V o /, the waveforms of the switch gating signal, the inductor current i, the inductor voltage v, and the MOSFET drain-source voltage v ds during one switching period are shown in Fig. 7. Fig. 6. Key waveforms when V in > V o /. The waveforms in Fig. 7 have one more mode when compared to Fig. 6. While the drain-source voltage falls down to the valley at t 3 when V in >V o /, it reaches zero at t 4 when V in <V o /. After t 4, the MOSFET body diode starts conducting and the inductor current increases linearly during t 4 -t 6. The time duration from t to t 4, the instant that the drain-source voltage reaches zero, is given by (6). cos - tres = æ ç ö wr è -Vo ø And the inductor current at t 4 is obtained by (7). oss i ( t4) = - C Vo ( Vo - ) (7) Because the magnitude and the slope of the inductor current when the inductor current increases linearly are known, the instant that the inductor current reaches zero can be obtained. The period when the inductor current increases linearly is shown in (8). t lin V ( ) o -V æ in - æ V öö C in ossvo Vo - = Coss sin cos V ç ç = in V è è - o øø (8) where, t lin is the period from t 4 to t 6. Therefore, when the (6)

5 894 Journal of Power Electronics, Vol. 4, No. 5, September 04 input voltage is lower than half of the output voltage, the area that the inductor current has a negative value, S neg, is divided into two parts; the C-resonance period (t -t 4 ) and the linearly increasing period (t 4 -t 6 ). The area of the inductor current during t res (t -t 4 ) is C S i t dt ( V V ) t dt C V t4 oss res = ò ( ) = o in sin t ò - - wr = oss o tres and during t lin (t 4 -t 6 ), it is shown in (0). Vo Slin = i ( t4) tlin = Coss ( M - ) (0) Then, the total area when the inductor current has a negative value is obtained by (). Sneg = Sres + Slin = CossVo M () The total area that the inductor current has a negative value increases as the input voltage decreases. Substituting S neg into (3) instead of S neg results in (). ( ( ) ( )) (9) Iin = ton ton + toff - CossM () T s In addition, because the period that the inductor current increases linearly is infinite when the input voltage is close to zero as shown in (8), energy is seldom transferred in this region. For these reasons, the input current distortion deteriorates especially near the AC line zero crossing point. Therefore, a proper variable on-time control is necessary for the control of the CRM boost PFC converter to alleviate the current distortion. B. Enhanced Variable On-Time Control Method In this section, based on the analysis of the inductor current in the previous section, a proper on-time for the CRM boost PFC converter is computed. In (5) and (), the variable k is defined as follows. Equation (3) is a quadratic equation related to t on. By applying this variable in (5) and (), the relationship between the input voltage and the input current can be obtained by (4). ( ( ) ( )) ì ton ton + toff - 4Coss M - when > Vo / ïton + toff + td k = í ï ( ton ( ton + toff ) - ( CossM )) when < Vo / ï î ton + toff + td where, t d =π C, t d = C ( q + ( M - )sin q. OSS I in OSS V = k = R in eq (3) (4) where, R eq is /k. If the variable k is constant, the waveform of the input current follows that of the input voltage. The resulting on-time of the CRM boost PFC converter is computed using (3). By solving (3), the on-time is obtained as shown in (5). Fig. 7. Key waveforms when V in <V o /. On time(s) 4.5 x On-time Scaled time(s) x 0-3 Fig. 8. Computed on-time and scaled input voltage of the CRM boost PFC converter over half of line period.

6 n: Enhanced Variable On-time Control of 895 t on ì æ ö æ 4td ö ï k + k + 4ç - ç k + ( M - ) td ï è M ø è p ø when > Vo / ï = í ï æ ö æ td ö ï k + k + 4ç - ç k + M t d M p ï è ø è ø when < Vo / î (5) For the COT control, k can be obtained from (6) using (4) because the on-time is proportional to the output voltage of the error amplifier, v c [7]. P k = = t = a v O h, RMS on c (6) The same equation can be applied to the evot control, because v c is almost constant over one AC line period and it changes according to the output load condition. Fig. 8 shows the calculated on-time of the CRM boost PFC converter controlled by the evot control method when the output power is 00W. When applying the evot control method, it is necessary to limit the maximum switch on-time because the compensated on-time goes infinite if there is no limiter in (5). Therefore, the on-time is limited to be less than 40ms in Fig. 8. As shown in Fig. 8, the on-time variation near the AC line zero crossing point is much larger than the variation when the input voltage is higher than half of the output voltage. In addition, it looks like that the on-time is almost constant when the input voltage is higher than half of the output voltage. The variation of the switch on-time is 6.4% when the input voltage is higher than half of the output voltage and that of the switch on-time is 639% when the input voltage is lower than half of the output voltage. The effect of the on-time compensation when the input voltage is higher than half of the output voltage is little when compared to the effect when the input voltage is lower than half of the output voltage. IV. EXPERIMENTA RESUTS The proposed control method is verified by a 00W prototype, as shown in Fig. 9. The circuit parameters for the prototype are listed in Table I. In Table I, C oss is 380pF, which includes the MOSFET and diode junction capacitances. The line voltage is universal and the frequency is 60Hz. The maximum on-time is 40ms. When the input voltage is close to zero, the switch off-time is reduced and the switching period can be shorter than the computation time of the DSC. Therefore, it is necessary to reduce the computation time of the DSC so that it is as short as possible. In the evot control method, a phase extraction and trigonometric function for the switch on-time calculation increase the computation time of the DSC. To solve this problem, t d in equation (5) can be approximated as below if it is assumed that t res is p/. v in f C f R V cc V cc D + + D br v C f rect Co R v o _ v gs _ v in _ rect t k = a v c = f ( k, v ) on in _ rect Fig. 9. Experimental circuit diagram. P o V o C oss C f C f C o V in TABE I CIRCUIT PARAMETERS R signal R v R v v c v e v o 00W 400V 380pF 430μH (n=8) 470nF 33nF 00μF 90V~64V p Vo - td = Coss ( + ) (7) Fig. 0 shows the error between the exact delay time and the approximate delay time, and Fig. shows the error between the exact switch on-time and the switch on-time while adopting the approximate delay time. Although the error between the exact delay time and the approximate delay time has a maximum value of 8%, the switch on-time error has a maximum value of 4.7% and it is reasonable to use the approximate delay time. Fig., Fig. 3, and Fig. 4 show the waveforms of a CRM boost PFC converter controlled by the COT, VOT, and evot control methods respectively when the AC line voltage is 0V. The periods during which the zero crossing distortion exists are about.48ms,.7ms, and 0.66ms, respectively. Fig. 5, Fig.6 and Fig. 7 show the line voltage and current of a PFC converter controlled by the COT, VOT, and evot control methods when the AC line voltage is 0V. When the line voltage is 0V, the periods during which the line current has zero value are about.8ms,.07ms, and 0.43ms, respectively. As mentioned previously, this period is caused because the switch on-time is not enough to transfer power to the load. Therefore, to improve the distortion, the switch on-time should be increased near the AC line zero crossing point.

7 896 Journal of Power Electronics, Vol. 4, No. 5, September 04 0 Error of delay time Error(%) ine voltage(v) Fig. 0. Error between the exact delay time and the approximate delay time. Fig. 3. Waveforms of input current and input voltage with VOT control at 0V. 5 Error of switch on-time Error(%) Fig. 4. Waveforms of input current and input voltage with evot control at 0V ine voltage(v) Fig.. Error between the exact on-time and the approximate on-time. Fig. 5. Waveforms of input current and input voltage with COT control at 0V. Fig.. Waveforms of input current and input voltage with COT control at 0V. Fig. 8 shows the measured switch on-time of a CRM boost PFC converter controlled by the COT, VOT, and evot control methods near the AC line zero crossing point when the voltage is 0V and 0V. As shown in Fig. 8, the switch on-time near the AC line zero crossing point is longest when the evot control method is applied. This result shows that the proposed evot control Fig. 6. Waveforms of input current and input voltage with VOT control at 0V.

8 Enhanced Variable On-time Control of 897 Fig. 7. Waveforms of input current and input voltage with evot control at 0V. Fig. 8. Measured switch on-time near zero crossing point of AC line voltage when AC line voltage is 0V and 0V. TABE II THD OF THE CRM BOOST PFC CONVERTER USING EACH CONTRO METHOD AT 00W Input Voltage COT VOT evot 65V.0% 7.67% 7.4% 0V 3.59% 0.48% 5.50% 0V 3.5% 6.87% 3.74% 90V.39% 6.04% 3.67% method compensates the zero crossing distortion of the input current properly. Table II shows the THD of the CRM boost PFC converter controlled by the COT, VOT, and evot control methods when the output power is 00W. The THD of the CRM boost PFC converter controlled by the proposed evot control method shows superior performance when compared to those by the COT and VOT control methods. The THD of the evot control method is minimized by experiments. In low power applications, using a TMS30F8335 is not reasonable because it is too expensive. In Fig. 9, the operation time of the DSC is shown and compared with the gate signal near the zero crossing point of the AC line voltage. During T, an analog-to-digital converter (ADC) Fig. 9. Operation period of DSC near zero crossing point of AC line voltage. converts the analog signal to digital data. After T, a toggle is set and the DSC operator computes the next gate signal on-time based on the data of the ADC during T. After the DSC operation, the toggle is set to off and the DSC stands by during T 3. As shown in Fig. 9, the DSC can be replaced by a cheaper one. Because the million instructions per second (MIPS) of the TMS30F8335 is 50, a DSC whose MIPS is over 30 can replace the TMS30F8335. V. CONCUSIONS This paper proposes an enhanced variable on-time control method for CRM boost PFC converters to improve the current distortion. Because of the delay time of ZVS or quasi-zvs after the diode is turned-off in the CRM boost PFC converter, the input current distortion deteriorates especially near the AC line zero crossing point. To compensate this distortion, the optimized on-time is computed based on an analysis of the inductor current waveform. The performance of the CRM boost PFC converter controlled by the evot control method is demonstrated with experimental results. It is shown that the optimized on-time reduces the total harmonic distortion by about 5% (from 0.48% to 5.5%) at 0V and by 54% (from 6.87% to 3.74%) at 0V when compared to the variable on-time control method. REFERENCES [] IEEE Recommended Practices and Requirements for Harmonic Control in Electrical Power System, IEEE Std 59-99, 99. [] J. S. ai and D. Chen, Design consideration for power factor correction boost converter operating at the boundary of continuous conduction mode and discontinuous conduction mode, in Proc. IEEE Appl. Power Electron. Conf. (APEC), pp , 993. [3] K. De Gusseme, D. M. Van de Sype, A. P. M. Van den Bossche, and J. A. Melkbeek, Input current distortion of

9 898 Journal of Power Electronics, Vol. 4, No. 5, September 04 CCM boost PFC converters operated in DCM, IEEE Trans. Ind. Electron., Vol. 54, No., pp , Apr [4]. Huber, Brian T. Irving, and M. Jovanovic, ine current distortions of DCM/CCM boundary boost PFC converter, in Proc. IEEE Appl. Power Electron. Conf. (APEC), pp , 008. [5]. Huber, B. T. Irving, and M. Jovanovic, Effect of valley switching and switching-frequency limitation on line-current distortions of DCM/CCM boundary boost PFC converters, IEEE Trans. Power Electron., Vol. 4, No., pp , Feb [6] J. W. Kim, S. M. Choi, and K. T. Kim, Variable on-time control of the critical conduction mode boost power factor correction converter to improve zero-crossing distortion, in Proc. IEEE Power Electron. Drive Syst. Conf., pp , Nov [7] Boundary Mode PFC Controller, Fairchild Semiconductor Co., FAN696 Datasheet, Rev..0.3, 009. [8] Critical Conduction Mode PFC Controller Utilizing a Transconductance Error Amplifier, ON Semiconductor, NCP608 Datasheet, Rev. 3, Jun. 00. [9] FA560 Application Note, Fuji Electric Co., td., AN-066E, Rev.0.3, Apr. 0. [0] A. A. Nostwick and B.. Hesterman, Power factor correction circuit, U.S. Patent , Mar. 5, 997. [] C. Y. Bernd and R. iang, Power factor correction with reduced total harmonic distortion, U.S. Patent , Oct. 3, 000. [] J. W. Kim and D. H. Kim, Power factor correction circuit, U.S. Patent 7,538,55, May 6, 009. [3] J. H. ee, Power factor correction circuit for reducing distortion of input current, U.S. Patent 8,30,44, Nov. 7, 0. [4] S.-H. Tang, D. Chen, C.-S Huang, C.-Y. iu, and K. H. iu, A new on-time adjustment scheme for the reduction of input current distortion of critical-mode power factor correction boost converters, in Proc. IEEE International Power Electron. Conf. (IPEC), pp , 00. [5] M. Marvi and A. F-Ahmady, A fully ZVS critical conduction mode boost PFC, IEEE Trans. Power Electron., pp , Apr. 0. [6] J.-C. Tsai, C.-. Chen, Y.-T. Chen, C.-. Ni, C.-Y. Chen, and K.-H. Chen, Perturbation on-time (POT) technique in power factor correction (PFC) controller for low total harmonic distortion and high power factor, IEEE Trans. Power Electron., Vol. 8, No., pp. 99-, Jan. 03. Jung-Won Kim received his B.S., M.S., and Ph.D. degrees in Electrical Engineering from Seoul National University, Seoul, Korea, in 994, 996, and 00, respectively. He was a Senior Engineer with Fairchild Korea Semiconductor, td. He was a Vice President of Silicon Mitus, Inc. from 007 to July 03. He is currently a Senior Researcher in the Engineering Research Institute of Seoul National University. His current research interests include power factor correction, converter parallel operation, modular converter systems, distributed power systems, and soft switching converters. Je-Hyun Yi received his B.S. degree in Electrical Engineering from Seoul National University, Seoul, Korea, in 0, where he is currently pursuing his Ph.D. degree. His current research interests include high power DC DC converters, power factor correction circuits, and DC distribution systems. Bo-Hyung Cho received his B.S. and M.S. degrees from the California Institute of Technology, Pasadena, CA, USA, and his Ph.D. degree from Virginia Polytechnic Institute and State University (Virginia Tech), Blacksburg, VA, USA, all in Electrical Engineering. Prior to his research at Virginia Tech, he was a member of the Technical Staff with the Department of Power Conversion Electronics, TRW Defense and Space System Group, USA. From 98 to 995, he was a Professor with the Department of Electrical Engineering, Virginia Tech. In 995, he joined the School of Electrical Engineering, Seoul National University, Seoul, Korea, where he is currently a Professor. His current research interests include power electronics, modeling, analysis, and control of spacecraft power processing equipment, and distributed power systems. Dr. Cho is a member of Tau Beta Pi. He was a recipient of the 989 Presidential Young Investigator Award from the National Science Foundation. He chaired the 006 IEEE Power Electronics Specialists Conference.