POWER FACTOR CORRECTION USING AN IMPROVED SINGLE-STAGE SINGLE- SWITCH (S 4 ) TECHNIQUE

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1 International Journal of Power Systems and Microelectronics (IJMPS) Vol. 1, Issue 1, Jun 2016, TJPRC Pvt. Ltd POWER FACTOR CORRECTION USING AN IMPROVED SINGLE-STAGE SINGLE- SWITCH (S 4 ) TECHNIQUE K. VINOD KUMAR 1, B. PRAVEENA 2 & NKV. SAI SUNIL 3 1 Assistant Professor, Department of EEE, GITAM University, Visakhapatnam, Andhra Pradesh, India 2 Assistant Professor, Department of EEE, GVP CEW Visakhapatnam, Andhra Pradesh, India 3 Research Scholar, GITAM University, Visakhapatnam, Andhra Pradesh, India ABSTRACT Regulated power supplies are needed for most analog and digital electronic systems such as microprocessors, computers, telecommunication systems, LCD monitors and robotics, and thereby forms major share of the load on utility. Most power supplies are designed to meet some requirements like regulated output or isolation or multiple outputs. In addition to these requirements, common objectives are to reduce power supply size, weight and improve their efficiency. Traditionally, linear power supplies have been used. Traditional SMPS consists of a diode bridge rectifier followed by a capacitor filter, if isolation and variable output voltage required, a flyback or a forward converter is used as output stage. These power supplies suffer from peaky input currents because of the diode bridge and a capacitor filter at the input stage, resulting in low order harmonics. Passive filters can reduce harmonics but size of these filters will be high. Also, performance decreases with supply frequency variations and ageing. Single-stage converters are suitable for low power applications. In these converters PFC stage and output stage are integrated into one-stage. Single-stage PFC converters with DC bus voltage feedback, are popular. These converters reduce DC bus (bulk capacitor) voltage to below 450 V. The main objective is to integrate the feedback winding with the primary of the output converter stage itself. The resulting PFC AC/DC converter should have higher efficiency and more compact than the existing PFC AC/DC converter. Original Article KEYWORDS: Regulated Power Supply, SMPS, Harmonics, Passive Filters, Single-Stage Converters Received: Mar 05, 2016; Accepted: Mar 12, 2016; Published: Mar 16, 2016; Paper Id.: TJPRC: IJPSMJUN20165 INTRODUCTION Traditional diode rectifiers used in front of the electronic equipment result in distorted line current waveforms, with high harmonic content. Typically, these converters have a power factor less than 0.65, which results in poor utilization of the capacity of the power source. More stringent international requirements, such as IEC , have been introduced to limit the line current harmonics. In compliance with these standards, a variety of passive and active Power Factor Correction (PFC) techniques have been proposed in recent years. Due to large size of line frequency inductors and capacitors, the passive techniques are preferred only in low power applications, typically less than 25 W. Active PFC techniques are used in majority of applications due to their superior performance over passive techniques [1].However, unlike in the two-stage approach, the DC voltage on the energy storage capacitor in a single-stage PFC converter is not regulated. As a result, in universal-line applications ( Vac), the energy storage capacitor voltage varies with load and line voltage. This increases the stress on the semiconductor devices. DC bus voltage feedback concept was proposed to reduce voltage stress on devices. Single-stage PFC converter with DC bus voltage feedback not only has reduced voltage stress, but also it could meet the IEC class D requirements.

2 46 K. Vinod Kumar, B. Praveena & NKV. Sai Sunil SINGLE STAGE SINGLE SWITCH PFC TECHNIQUES The active PFC converters can be implemented using either the two-stage approach or the single-stage approach. The two-stage PFC approach uses an Input Current Shaping (ICS) converter (PFC cell) in front of a converter as shown in Fig.1. The two converters are controlled independently to achieve high quality input current and fast output voltage regulation. Usually both converters are operated in CCM to get high efficiency. The two-stage approach is a cost effective approach in high power applications, its cost effectiveness is diminished in low power applications due to additional power semiconductor switches and complex control circuitry. A low cost alternative solution to this problem is to integrate the active PFC input-stage with the isolated outputstage as shown in Fig.1. In single-stage, PFC cell is operated in DCM to have inherent PFC action and converter is operated in CCM. i in PFC stage Bulk capacitor (C B ) stage v in S V B 1 S 2 V o PFC controller Two-stage controller v in i in Bulk capacitor (C B ) PFC cell S V B cell V o Single-stage Controller Figure 1: Integration of Two-Stage PFC Converter into a Single-Stage PFC Converter Number of active single-stage PFC techniques have been introduced in recent years. Any single-stage PFC converter belongs to one of the following categories. 1) Single-stage PFC with energy storage capacitor in series to energy flow [2].2) Single-stage PFC with energy storage capacitor in parallel to energy flow [3]. ANALYSIS OF S 4 AC/DC CONVERTERS Fig. 2 shows the relationship between the input power and the duty cycle in the PFC stage, and between the output power and the duty cycle in the stage [4]. The typical inherent PFC converter is the DCM boost converter, while the stage can operate either in

3 Power Factor Correction Using an Improved Single-Stage Single- Switch (S 4 ) Technique 47 DCM or CCM. There are two practical combinations: DCM PFC + CCM DCM PFC + DCM P in PFC stage P in PFC stage D d D d P o stage P o stage d d D D (a) (b) Figure 2: Relation between Input Power, Output Power and Duty Cycle of (a) DCM PFC + CCM (b) DCM PFC + CCM DCM PFC + CCM Since the stage operates in CCM, the duty cycle doesn t change with the load variation according to Fig.2 (a). When the load becomes light, which means the output power decreases. The duty cycle doesn t change immediately, because of the CCM operation in the stage. Thus, the input power remains the same as that of the heavy load. There exists an unbalanced power between the input and the output. This unbalanced power has to be stored in the bulk capacitor C B, causing the DC bus voltage to increase. As a result, the output voltage will increase too. To compensate for the output voltage increase due to the increase of the bus voltage, the voltage feedback loop is operated to regulate the output voltage constant. So the duty ratio has to decrease, and the input power also decreases correspondingly. This dynamic process will not stop until the input power equals the output power, and a new power equilibrium is reached. It is obvious that the power balance at light load is reached at the penalty of significant bus voltage stress. In universal line applications ( V ac ), the bulk capacitor voltage goes above 600 V, and results in severe stress of switching devices. Therefore, the converter needs higher rating devices and capacitors. DCM PFC + DCM If both the PFC and operate in DCM, then the duty cycle has to decrease when the load becomes light, based on Fig.2(b). It can be seen that the input power also decreases because the duty ratio decreases. Therefore, the input power decreases when the output power is reduced. There is no unbalanced power between the input and the output. It is concluded that there is no DC bus voltage issue for single-stage DCM PFC + DCM converters.

4 48 K. Vinod Kumar, B. Praveena & NKV. Sai Sunil CHALLANGES IN EXISTING S 4 TOPOLOGY Several efforts, such as variable frequency control [5], DC bus voltage feedback scheme and the development of new topologies have been reported to solve some of the problems mentioned above. Variable frequency control reduces the bulk capacitor voltage, but controlling below 450 V is difficult even with ten times the control frequency range [6]. This causes problems with the design of inductors and capacitors. An alternative is to operate the output stage in DCM. In this mode, when the output power demand decreases, the duty ratio and, hence, the input power decrease automatically (stated earlier). Also, the bulk capacitor voltage depends on the ratio of magnetizing inductance to boost inductance and the line voltage. But DCM operation results in higher RMS current (i.e. switch with higher current rating is required) and increased ripple in the output voltage.yet another, more efficient, alternative is to feedback a fraction of the DC bus voltage to control the bulk capacitor voltage. This can be achieved by having a negative voltage feedback through the feedback winding, N 2 in the power stage [Fig.3], which enables the PFC stage to automatically reduce the input power under light load conditions. Thus, the DC bus voltage can be controlled below 450 V. The single-stage PFC converter with DC bus voltage feedback not only has reduced bulk capacitor voltage stress, but can also meet the IEC class D requirements. L i D 1 D 3 v in i in C B + V B _ N 1 N 3 C o + R Vo _ D 2 N 2 S Figure 3: The Existing S 4 -PFC AC/DC Converter Topology based on DC bus Voltage Feedback [6] The feedback winding turns required to reduce the bulk capacitor voltage below 450 V, and to satisfy class-d requirements, are in the range of 60-70% of primary turns [6]. So, losses and size of the output stage are more as compared to a single-stage converter without feedback due to dedicated feedback winding in the existing topology. Here, it is important to note that even a small increment in the efficiency of these converters would result in high energy savings due to bulk usage of these power supplies in personal computers and telecommunications across the world. Thus, it is desirable to improve the efficiency. THE PROPOSED MODIFIED TOPOLOGY The figure below shows the improved converter with DC bus voltage feedback. It consists of a front end boost converter and a flyback converter, merged into a single stage. The main difference between the existing topology [Fig.3] and improved topology is the integration of N 2 winding with N 1 itself. The feedback winding N 2 is selected in such a way that it complies with harmonic standard IEC

5 Power Factor Correction Using an Improved Single-Stage Single- Switch (S 4 ) Technique 49 Figure 4: The Improved Topology with the DC Bus Voltage Feedback Winding Integrated with the Primary of the Flyback Transformer Figure 5: Various Modes of Operation of the Improved Configuration SIMULATION RESULTS AND OBSERVATIONS Various waveforms of the existing topology and the improved topology are shown in Fig.6 and 7. Fig.8 and 9 show the variation of the bulk capacitor voltage and output voltage with sudden change in the load from full load to 10 % of full load respectively. From these waveforms, it can be observed that the current through the feedback winding is lower in the improved topology as compared to the existing topology. N 2 turns of the primary winding are saved, resulting in reduced losses in this winding. A comparison of the improved topology with the existing topology is given in Table-1. The currents in different windings are shown. The RMS value of the current in the feedback winding is less in the improved converter, which is the basis for selection of the conductor size. Further, N 2 portion of primary turns is saved, i..e. efficiency of the improved converter is high. From these points, it can be concluded that the overall size of the improved converter is smaller than the existing converter. Table 1: RMS Value of Currents in Various Windings obtained using Simulations Existing topology Primary winding ( N 1 ) A Feedback winding ( N 2 ) 0.73 A No saving of turns Line current 0.96 A Improved Topology Upper primary (N 1 -N 2 ) A Feedback winding ( N 2 ) 0.62 A Saving of N 2 turns 0.96 A

6 50 K. Vinod Kumar, B. Praveena & NKV. Sai Sunil Figure 6: Circuit Waveforms for the Existing Topology Figure 7: Circuit Waveforms for the Improved Topology Figure 8: Variation of Capacitor Voltage with Load

7 Power Factor Correction Using an Improved Single-Stage Single- Switch (S 4 ) Technique 51 S te p L o a d c h a n g e ( % to 1 0 % ) Output voltage T i m e i n s e c o n d s Figure 9: Variation of Output Voltage with Load CONCLUSIONS & FUTURE SCOPE OF WORK An efficient S 4 -PFC AC/DC converter has been presented, which integrates the feedback winding with the primary winding of the output converter stage itself, eliminating the dedicated feedback winding requirement. The number of turns, N 2 is selected appropriately in order to meet IEC , class D requirements. The simulation and hardware results show identical trend but differ in actual values due to practical non-idealities. With proper care and professional design, this deviation can be minimized and the practical converter would show better performance. The improved converter has high potential in the fields of telecommunications, personal computers and electronic systems. The major advantages of the improved converter are summarized below: N 2 turns are saved. Current through the feedback winding is less. The converter is more compact and the overall cost is reduced. There is a 1.4% increase in efficiency. The following points are considered for future scope of work, The leakage inductance effect is not taken into consideration in simulation. With leakage inductance the difference in simulation and experimental can be minimized. By using professional made flyback transformer, the results can be improved. Fine tuning of controller is required. REFERENCES 1. R. Oruganti and R. Srinivasan, Single phase power factor converters- A review, in AES, Sadhana, vol. 22, Part 6, pp , Dec M. Madigan, R. Ericson, and E. Ismail, Integrated high quality rectifier regulators, in IEEE PESC, 1992, pp R. Redl, L. Balogh, and N. O. Sokal, A new family of single-stage isolated power factor correctors with fast regulation of the output voltage, in IEEE PESC, 1994, pp J. Qian, Q. Zhao, and F. C. Lee, Single-stage single-switch power factor correction ac/dc converters, IEEE Trans. on Power Electronics, vol. 13, no. 6, pp , Nov M. M. Jovanovic, D. M. Tsang, and F. C. Lee, Reduction of voltage stress in integrated high-quality rectifier-regulators by variable frequency control, in IEEE APEC, 1994, pp

8 52 K. Vinod Kumar, B. Praveena & NKV. Sai Sunil 6. Q. Zhao, F. C. Lee, and F. Tsai, Voltage and current stress reduction in single-stage power factor correction AC/DC converters with bulk capacitor voltage feedback. IEEE Trans. on Power Electronics, vol. 17, no. 4, pp , July 2002.