Voltage Balancing Control of Improved ZVS FBTL Converter for WECS

Transcription

1 Voltage Balancing Control of Improved ZVS FBTL Converter for WECS Janani.K 1, Anbarasu.L 2 PG Scholar, Erode Sengunthar Engineering College, Thudupathi, Erode, Tamilnadu, India 1 Assistant Professor, Erode Sengunthar Engineering College, Thudupathi, Erode, Tamilnadu, India 2 Abstract This project proposes a newly developed three level dc-dc converter which is designed with zero voltage switching technique for the purpose of reducing conduction loss and frequent switching of the switches used in the converter. A passive filter is used to reduce the primary voltage stress of medium frequency transformer and to improve the performance of the converter. A modulation strategy, including two operation modes, is proposed for the IFBTL dc/dc converter. Furthermore a voltage balancing control strategy is also proposed for the improved ZVS full bridge three level DC-DC converter. With the passive filter and the modulation strategy, the voltage stress of the transformer in the Improved ZVS FBTL DC/DC converter can be effectively reduced, which is very significant in the medium-voltage and high-power application. It is performed by designing a full bridge three level converter with ZVS technique and a passive filter and the converter is simulated using MATLAB SIMULINK. Keywords ZVS, Passive filter, MFT, FBTL converter, WECS I. INTRODUCTION Power converters play a vital role in the integration of wind power into the electrical grid. Multilevel converters can obtain high voltage level with low cost, easy available of low-voltage devices which reduces the size and cost of the filters and increases the performance of the converter due to the characteristics of the staircase shaped outputs. And also the convenient way of reducing the voltage stress of the converter is by using the multilevel technology which is good one for high voltage and high frequency applications. When the full bridge two level and half bridge three level converters are been considered, the voltage change rate, dv/dt is high which may cause large electromagnetic interference. And also the number of switches used is more; voltage sensors are been required for few converter types. The offshore wind turbines may be directly connected into a DC grid to deliver dc power to a medium- or high-dc voltage network. Normally, the voltage level of the dc network would be dozens of kilovolts which is much higher than the input voltage of the dc-dc converter. Hence, a medium frequency transformer (MFT) operated at hundreds of hertz to several kilohertz would be installed in the dc/dc converter, which not only ensures that the input voltage can be boosted to a desired high output voltage, but also achieves the galvanic isolation between source and grid. Besides, owing to the high-voltage level in the dc network, the usage of the diode bridges in the dc/dc converters could be advantageous. Moreover the voltage balancing control is not possible for two level converters and complicated for sub module based one. Hence full bridge three level converters have a simpler circuit structure and less number of switching devices. In order to reduce the voltage stress and the switching losses in the device, an improved ZVS (Zero Voltage Switching) full bridge three level DC-DC converter is proposed. The converter is capable of achieving zero voltage switching for all the power switches and the voltage stress is also reduced. Zero Voltage Switching means that the power to the load is switched on or off only when the output voltage is zero volts. Zero Voltage Switching can extend the life of a controller and of the load being controlled. Varying from other converter design a passive filter is introduced which improves the performance of the converter. The alternating voltage which is obtained from the inverter is fed through the passive filter which reduces the stress and can effectively overcome the problems which occurs due to the non linear characteristics of the semiconductor devices which results in the distorted waveforms. This voltage is fed to the medium frequency transformer (MFT) which in turn steps up the voltage and is been fed to the converter which is essential for a power Copyright to IJIRSET

2 converter in high power applications. FBTL converter has simple circuit structure and less number of switching devices with improved dynamic response. In this project, an improved ZVS FBTL DC-DC converter is proposed with a voltage balancing control strategy. II. PAGE LAYOUT DC-DC converters comprising of an inverter system to invert the DC input voltage with IGBT switches and a transformer to step up the inverted AC voltage and a rectifier system to convert the inverted voltage is used in the wind energy conversion system. Fig 1 Full Bridge Three Level DC-DC Converter Fig 1 shows the circuit diagram for Full Bridge Three Level DC-DC Converter. The circuit comprises of the foresaid inverter system to invert the DC input voltage, a transformer which helps to step up the inverted AC voltage. Stepped up AC voltage is then fed to the rectifier system and converted as DC voltage. Though the converter comprises of less number of switches, conduction loss is high and also voltage stress is present in the inverted voltage. Considering these two factors Improved ZVS FBTL Converter is designed which ZVS technique for switching operation which reduces the conduction loss and a passive filter is used to reduce the voltage stress of the inverted voltage. Fig 2 Circuit Diagram For Improved ZVS Full Bridge Three Level Dc-Dc Converter Fig 2 shows the circuit diagram for Improved ZVS FBTL converter where the circuit is composed of eight switches (S 1 S 8 ), eight freewheeling diodes (D 1 D 8 ), four clamping diodes (D 9 D 12 ),an MFT, four rectifier diodes (D r1 D r4 ), a passive filter (L s and C s ), an output filter inductor L d, an output capacitor C o,and two voltage divided capacitors (C i1 and C i2 ), which are used to split the dc bus voltage V i into two equal voltages V c1 and V c2.different from the FBTL dc/dc converter, zero voltage switching is been employed across the switches in the converter to reduce the switching losses and a passive filter is inserted into the IFBTL dc/dc converter to improve the performance of the dc/dc converter, which can effectively overcome the problem that the nonlinear characteristics of semiconductor devices result in distorted waveforms associated with harmonics and reduce the voltage stress of the MFT, which is very significant for the power converter in the high-power application. A. Proposed Modulation Strategy The switches S1 S8 are switched complementarily in pairs with a pulse width modulation (PWM), i.e., pairs S 1 S 3, S4 S 2, S5 S 7, and S 8 S 6, respectively. The duty cycle for S 1 is D. The way of phase shifting the PWM for other switch pairs results in the different operation modes as follows. 1) Operation Mode I: The PWM waveform for the pairs S 8 S 6, S 5 S 7, and S 4 S 2 lags behind that for pair S 1 S 3 by(d D c )Ts /2, Ts /2, and (D Dc + 1)Ts /2 respectively and T s is the switching cycle. The overlap time between S 1 S 3 and S 8 S 6 is DC Ts /2, which is also for S 4 S 2 and S 5 S 7. D C is defined as the overlap duty ratio. 2) Operation Mode II: The PWM waveform for pair S 8 S 6 leads before that for pair S 1 S 3 by (D D c )T s /2,and the PWM waveform for pairs S 4 S 2 and S 5 -S 7 lags behind that for the pair S 1 S 3 by (1 D + D c )T s /2and T s /2, respectively. The overlap time between S 1 S 3 and S 8 S 6 and between S 4 S 2 and S 5 S 7 is also both D C Ts /2. The main difference between the two operation modes is the capacitor charge and discharge situations in each half cycle. In operation mode I, capacitor C i2 discharges more energy than capacitor C i1 in each half cycle while capacitors C i1 and the C i2 exchange their situations in operation mode II. In operation mode II, capacitor C i1 discharges more energy than capacitor C i2 in each half cycle. The two operation modes can be Copyright to IJIRSET

3 alternatively used for the adaptive voltage balancing control. The steady-state operations of the converter under the proposed modulation strategy are explained with the assumption that C i1 = C i2 Voltages V ab, V t1, V t2 and currents i Ls, i t1, i t2 are all periodic waveforms with period T s. Currents i c1, i c2, and i Ld are with the period Ts /2.Owing to the passive filter in the IFBTL dc/dc converter, the performance of voltages V t1, V t2 and currents i t1, i t2 associated with the MFT is effectively improved, which is significant for the IFBTL dc/dc converter in the applications of the medium-voltage and high-power system. III. COMPARISON BETWEEN BASIC FBTL AND IMPROVED ZVS FBTL CONVERTER The need of ZVS operation and passive filters for the converters used in wind energy conversion system can be brought down by comparing a FBTL converter and an Improved ZVS FBTL converter. Simulation is carried out with the following parameters for the converter for input voltage rating of 250V. Both the converters have same parameters and IGBT switches are used. The only difference between the converters is that in the Improved ZVS FBTL converter passive filter and ZVS technique are been used and the experiment is carried using simulation. TABLE I CONVERTER PARAMETERS S.No Parameter Value 1 Capacitors C i1,c i2 (µf) Inductance, L s (mh) Capacitance, C s (µf) 3 4 Turn Ratio of MFT 1:2.6 5 Inductance, L d (mh) 0.4 is composed of eight switches (S 1 S 8 ), eight freewheeling diodes (D 1 D 8 ), four clamping diodes (D 9 D 12 ),an MFT, four rectifier diodes (D r1 D r4 ), an output filter inductor L d, an output capacitor C o,and two voltage divided capacitors (C i1 and C i2 ), which are used to split the dc bus voltage V i into two equal voltages V c1 and V c2. The working of this converter is normal to that of a power converter where the input ideal DC voltage is converted into alternating voltage and fed into a medium frequency transformer. Due to the switching operation, the losses due to switching reduce the efficiency of the alternating voltage and the voltage stress will also be high. The alternating voltage is then fed to the medium frequency transformer which steps up the input voltage with the presence of voltage stress. The stepped up alternating voltage is fed to a diode converter which converts the alternating voltage to DC voltage. Fig 3 Alternating Voltage Obtained from FBTL Converter Fig 3 shows the output waveform obtained from the inverter when a 250V DC input voltage is fed to it. The switches conduct providing two operation modes as mentioned above and due to the conduction of the switches losses occur. And also the stress in the voltage is been produced. For a 250V input DC voltage the inverted output from a FBTL converter is about 200V. This is only due to the conduction loss and voltage stress. 6 Capacitance, C o (µf) DC network voltage, V o (v) DC network inductance (mh) DC network resistance(ω) 1 For experimental purpose an input voltage of 250V ideal DC voltage is been fed to the FBTL converter which Fig 4 DC Output Voltage Obtained from FBTL Converter Obtained alternating voltage is fed to a medium frequency transformer which steps up the fed alternating Copyright to IJIRSET

4 voltage and is been converted into DC voltage with the help of diode rectifier. For the given input of 250V, after boosting up the voltage the output DC voltage obtained from a FBTL converter is about 530V. To overcome the switching losses Zero Voltage Switching technique has to be implemented. the DC voltage is supplied to the converter it gets split when passing through the capacitors and the voltage passes through the switches. Due to the switching operation, with zero voltage switching, the losses are been reduced and the passive filter reduces the voltage stress. Fig 5 Block Diagram for Proposed System For the voltage supply of 250V DC voltage, obtained alternating voltage from the converter is about 200V and the above figure clearly shows that the obtained waveform contains no voltage stress and the waveform is accurately sinusoidal. This is due to the reason that, when Obtained alternating voltage is fed to a medium frequency transformer which steps up the fed alternating voltage and is been converted into DC voltage with the help of diode rectifier. For the given input of 250V, after boosting up the voltage the output DC voltage obtained from Improved ZVS FBTL converter is about 620V. The switching losses are been eliminated by implementing ZVS technique and the voltage stress is reduced by using passive filter. The output voltage obtained is much higher than the output obtained from a FBTL converter with a big difference of about 100V. Fig 6 Alternating Voltage Obtained from Improved ZVS FBTL Converter the primary voltage fed to the Medium Frequency Transformer. Moreover the switching operation is carried out using ZVS technique which reduces the switching losses and hence therefore the output is efficient. IV. VOLTAGE BALANCING CONTROL STRATEGY A voltage balancing control strategy is proposed for the Improved ZVS FBTL dc/dc converter in this section, which can be realized by alternating the operation modes I and II. Fig 7 DC output voltage obtained from Improved ZVS FBTL converter Obtained DC output voltage shows a major difference from the normal FBTL converter where the difference between the voltages is about 100V. This is due to reason that the performance of the converter is improved by using passive filter which eliminates the voltage stress of Fig 8 Block diagram of the proposed voltage balancing control for Improved ZVS FBTL converter I) Operation Mode I: Here both the capacitor currents i c1 and i c2 are with the period of Ts /2. In the first half cycle, the charge or discharge situations for capacitors C i1 and C i2 in stages A, C, and E are the same. In stage B, current i c2 is more than i c1, while i c2 is far less than i c1 in stage D. Owing to that, of stages B and D are (D Dc) Ts /2. Suppose V c1 =V c2 =V i /2; C i2 would provide more energy to the load than C i1 in the first half cycle under the operation mode I. The situation in the second half cycle is similar to that in the first half Copyright to IJIRSET

5 cycle. Consequently, voltage V c1 would be increased and voltage V c2 would be reduced in operation mode I, which would result in the trend that voltage V c1 would be more than V c2 in operation mode I. 2) Operation Mode II: The same to operation mode I, the charge and discharge situations for capacitors C i1 and C i2 in stages A, C, and E are the same as in the first half cycle. The only difference is that current i c2 is less than i c1 in stage D, while i c2 is far more than i c1 in stage B in operation mode II, which is contrary to that in operation mode I. The periods for stages Band D are both (D Dc) Ts /2. Suppose V c1 = V c2 = V i /2; C i1 would provide more energy to the load than C i2 in the first half cycle under the operation mode II. The situation in the second half cycle is similar to the first half cycle. Therefore, voltage V c1 would be reduced and voltage V c2 would be increased in operation mode II, which would result in the trend that voltage V c1 would be less than V c2 in operation mode II. V. SIMULATION CIRCUIT The simulation circuit for voltage balancing control of the capacitor is shown in the Fig 9 where the voltage balancing control block is attached to the designed Improved ZVS FBTL Converter. operation mode I is selected in the next half cycle when V c1 is less than V c2. Fig 10 Balanced capacitor voltages VI. CONCLUSION This paper has presented the control of the Improved ZVS FBTL dc/dc converter for the wind turbine system to facilitate the integration of wind turbines into a dc grid. The corresponding modulation strategy, including operation modes I and II, are proposed for the Improved ZVS FBTL dc/dc converter. The proposed two operation modes are discussed in detail. A voltage balancing control strategy is proposed for the Improved ZVS FBTL dc/dc converter, where the alternation of the proposed two operation modes can keep the capacitor voltage balanced. With the passive filter and the modulation strategy, the voltage stress of the transformer in the Improved ZVS FBTL dc/dc converter can be effectively reduced, which is very significant in the medium-voltage and high-power application and ZVS technique has reduced the switching losses in the switch. The converter is designed and simulated using MATLAB SIMULINK. REFERENCES Fig 9 Simulation Circuit for Voltage Balancing Control of Improved ZVS FBTL Converter VI. RESULT OBTAINED FROM VOLTAGE BALANCING CONTROL CIRCUIT Based on the aforesaid analysis, V c1 would be more than V c2 in operation mode I, and V c1 would be less than V c2 in operation mode II. Consequently, a control strategy is proposed for the capacitor voltage balancing where a comparator is used here with two input voltages V c1 and V c2.if V c1 is more than V c2, the operation mode in the next half cycle is selected as II. On the contrary, the [1] J. Robinson, D. Jovcic, and G. Jo os, Analysis and design of an offshore wind farm using a MV DC grid, IEEE Trans. Power Delivery, vol. 25 no. 4, pp , Oct [2] F. Blaabjerg, Z. Chen, and B.S.Kjaer, Power electronics as efficient interface in dispersed power generation systems, IEEE Trans. Power Electron., vol. 19, no. 5, pp , Sep [3] N. Y. Dai, M. C.Wong, and Y. D. Han, Application of a threelevel NPC inverter as a three -phase fourwire power quality compensator by generalized 3DSVM, IEEE Trans. Power Electron., vol. 21, no. 2, pp , Mar [4] X. Ruan, B. Li, Q. Chen, S. C. Tan, and C. K. Tse, Fundamental considerations of three level dc-dc converters: Topologies, analyses,and control, IEEE Trans. Circuits Syst. I, Reg. Paers, vol. 55, no. 11, pp ,Dec [5] Z. Zhang and X. Ruan, ZVS PWM full-bridge three-level converter, in Proc. 4th Int. Power Electron. Motion Control Conf., 2004, pp [6] P. M. Barbosa, F. Canales, J. M. Burd ıo, and F. C. Lee, A threelevel converter and its application to power factor correction, IEEE Trans. Power Electron., vol. 20, no. 6, pp , Nov [7] J. R. Pinheiro and I. Barbi, The three- level ZVS -PWM dcto-dc converter, IEEE Trans. Power Electron., vol. 8, no. 4, pp , Oct Copyright to IJIRSET