Data Sheet, Rev. 1.1, Nov BTN7960. High Current PN Half Bridge NovalithIC. Automotive Power

Transcription

1 Data Sheet, Rev. 1.1, Nov High Current PN Half Bridge NovalithIC Automotive Power

2 Table of Contents 1 Overview Block Diagram Block Diagram Terms Pin Configuration Pin Assignment Pin Definitions and Functions General Product Characteristics Absolute Maximum Ratings Functional Range Thermal Resistance Block Description and Characteristics Supply Characteristics Power Stages Power Stages - Static Characteristics Switching Times Power Stages - Dynamic Characteristics Protection Functions Overvoltage Lock Out Undervoltage Shut Down Overtemperature Protection Current Limitation Short Circuit Protection Electrical Characteristics - Protection Functions Control and Diagnostics Input Circuit Dead Time Generation Adjustable Slew Rate Status Flag Diagnosis With Current Sense Capability Truth Table Electrical Characteristics - Control and Diagnostics Application Information Application Example Layout Considerations Half-bridge Configuration Considerations Package Outlines PG-TO PG-TO PG-TO Revision History Data Sheet 2 Rev. 1.1,

3 NovalithIC B P S 1 Overview Features Path resistance of max C (typ C) High Side: max C (typ C) Low Side: max C (typ C) (for B (SMD)) Low quiescent current of typ C PWM capability of up to 25 khz combined with active freewheeling Switched mode current limitation for reduced power dissipation in overcurrent Current limitation level of 33 A min. / 47 A typ. (low side) Status flag diagnosis with current sense capability Overtemperature shut down with latch behaviour Overvoltage lock out Undervoltage shut down Driver circuit with logic level inputs Adjustable slew rates for optimized EMI Green Product (RoHS compliant) AEC Qualified Description The is a integrated high current half bridge for motor drive applications. It is part of the NovalithIC family containing one p-channel highside MOSFET and one n-channel lowside MOSFET with an integrated driver IC in one package. Due to the p-channel highside switch the need for a charge pump is eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the integrated driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection against overtemperature, overvoltage, undervoltage, overcurrent and short circuit. The provides a cost optimized solution for protected high current PWM motor drives with very low board space consumption. PG-TO PG-TO PG-TO Type Package Marking B PG-TO B P PG-TO P S PG-TO S Data Sheet 3 Rev. 1.1,

4 Block Diagram 2 Block Diagram The is part of the NovalithIC family containing three separate chips in one package: One p-channel highside MOSFET and one n-channel lowside MOSFET together with a driver IC, forming a integrated high current half-bridge. All three chips are mounted on one common lead frame, using the chip on chip and chip by chip technology. The power switches utilize vertical MOS technologies to ensure optimum on state resistance. Due to the p-channel highside switch the need for a charge pump is eliminated thus minimizing EMI. Interfacing to a microcontroller is made easy by the integrated driver IC which features logic level inputs, diagnosis with current sense, slew rate adjustment, dead time generation and protection against overtemperature, overvoltage, undervoltage, overcurrent and short circuit. The can be combined with other to form H-bridge and 3-phase drive configurations. 2.1 Block Diagram VS Undervolt. detection Overvolt. detection Current Sense Overcurr. Detection HS IS IN Overtemp. detection Digital Logic Gate Driver HS LS off HS off Gate Driver LS OUT INH SR Slewrate Adjustment Overcurr. Detection LS GND Figure 1 Block Diagram 2.2 Terms Following figure shows the terms used in this data sheet. V S I VS, -I D(HS) V DS (HS ) I IN IN VS V IN V INH I INH I SR INH SR OUT I OUT, I L V SD(LS ) V OUT V SR V IS I IS IS GND I GND, I D(LS) Figure 2 Terms Data Sheet 4 Rev. 1.1,

5 Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Figure Pin Assignment B, P and S (top view) Pin Definitions and Functions Pin Symbol I/O Function 1 GND - Ground 2 IN I Input Defines whether high- or lowside switch is activated 3 INH I Inhibit When set to low device goes in sleep mode 4,8 OUT O Power output of the bridge 5 SR I Slew Rate The slew rate of the power switches can be adjusted by connecting a resistor between SR and GND 6 IS O Current Sense and Diagnostics 7 VS - Supply Bold type: pin needs power wiring Data Sheet 5 Rev. 1.1,

6 General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) = -40 C to +150 C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. Voltages Supply Voltage V S V Logic Input Voltage V IN V V INH Voltage at SR Pin V SR V Voltage between VS and IS Pin V S -V IS V Voltage at IS Pin V IS V Currents HS/LS Continuous Drain Current 2) I D(HS) A T C < 85 C I D(LS) switch active A T C < 125 C switch active HS/LS Pulsed Drain Current 2) I D(HS) A T C < 85 C I D(LS) t pulse = 10ms single pulse A T C < 125 C t pulse = 10ms single pulse HS/LS PWM Current 2) I D(HS) A T C < 85 C I D(LS) f = 1kHz, DC = 50% A T C < 125 C f = 1kHz, DC = 50% A T C < 85 C f = 20kHz, DC = 50% A T C < 125 C f = 20kHz, DC = 50% Temperatures Junction Temperature C Storage Temperature T stg C ESD Susceptibility ESD Susceptibility HBM kv HBM 3) V ESD IN, INH, SR, IS OUT, GND, VS 1) Not subject to production test, specified by design 2) Maximum reachable current may be smaller depending on current limitation level 3) ESD susceptibility, HBM according to EIA/JESD22-A114-B (1.5 kω, 100 pf) Data Sheet 6 Rev. 1.1,

7 General Product Characteristics Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as outside normal operating range. Protection functions are not designed for continuous repetitive operation. Maximum Single Pulse Current I max [A] ,0E-03 1,0E-02 1,0E-01 1,0E+00 1,0E+01 t pulse [s] Figure 4 Maximum Single Pulse Current (T C < 85 C) This diagram shows the maximum single pulse current that can be driven for a given pulse time t pulse. The maximum reachable current may be smaller depending on the current limitation level. Pulse time may be limited due to thermal protection of the device. Data Sheet 7 Rev. 1.1,

8 General Product Characteristics 4.2 Functional Range Pos. Parameter Symbol Limit Values Unit Conditions Min. Max Supply Voltage Range for Nominal Operation V S(nom) 8 18 V Extended Supply Voltage Range for Operation Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table. 4.3 Thermal Resistance V S(ext) V Parameter Deviations possible Junction Temperature C Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max Thermal Resistance Junction-Case, Low Side Switch 1) R thjc(ls) = Δ(LS) / P v(ls) R thjc(ls) K/W Thermal Resistance R thjc(hs) K/W Junction-Case, High Side Switch 1) R thjc(hs) = Δ(HS) / P v(hs) Thermal Resistance R thjc K/W Junction-Case, both Switches 1) R thjc = max[δ(hs), Δ(LS) ] / (P v(hs) + P v(ls) ) Thermal Resistance Junction-Ambient 1) R thja 20 K/W 2) 1) Not subject to production test, specified by design 2) Specified R thja value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (chip+package) was simulated on a 76.2 x x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Data Sheet 8 Rev. 1.1,

9 Block Description and Characteristics 5 Block Description and Characteristics 5.1 Supply Characteristics V S = 8 V to 18 V, = -40 C to +150 C, I L = 0 A, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. General Supply Current I VS(on) 2 3 ma V INH = 5 V V IN = 0V or 5V R SR = 0 Ω DC-mode normal operation (no fault condition) Quiescent Current I VS(off) 7 12 µa V INH = 0 V V IN = 0V or 5V < 85 C 65 µa V INH = 0 V V IN = 0V or 5V 25 I VS(off) [µa] T [ C] Figure 5 Typical Quiescent Current vs. Junction Temperature Data Sheet 9 Rev. 1.1,

10 Block Description and Characteristics 5.2 Power Stages The power stages of the consist of a p-channel vertical DMOS transistor for the high side switch and a n-channel vertical DMOS transistor for the low side switch. All protection and diagnostic functions are located in a separate top chip. Both switches can be operated up to 25 khz, allowing active freewheeling and thus minimizing power dissipation in the forward operation of the integrated diodes. The on state resistance R ON is dependent on the supply voltage V S as well as on the junction temperature. The typical on state resistance characteristics are shown in Figure 6. High Side Switch Low Side Switch R ON(HS) [mω] R ON(LS) [mω] = 150 C = 150 C 10 = 25 C = -40 C V S [V] 10 = 25 C = -40 C V S [V] Figure 6 Typical ON State Resistance vs. Supply Voltage (B) Data Sheet 10 Rev. 1.1,

11 Block Description and Characteristics Power Stages - Static Characteristics V S = 8 V to 18 V, = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. High Side Switch - Static Characteristics ON State High Side Resistance 1) mω I OUT = 9 A; V S = 13.5 V R ON(HS) 1) Specified R ON value is related to normal soldering points; R ON values is specified for B: pin 1,7 to pin 8 (tab, backside) and for P/S: pin 1,7 to pin4 2) Due to active freewheeling, diode is conducting only for a few µs, depending on R SR B = 25 C = 150 C P = 25 C = 150 C S = 25 C = 150 C Leakage Current High Side I L(LKHS) 1 µa V INH = 0 V; V OUT = 0 V < 85 C 50 µa V INH = 0 V; V OUT = 0 V = 150 C Reverse Diode Forward-Voltage High Side 2) V DS(HS) Low Side Switch - Static Characteristics ON State Low Side Resistance 1) R ON(LS) V mω I OUT =-9A = -40 C = 25 C = 150 C I OUT =-9A; V S = 13.5 V B = 25 C = 150 C P = 25 C = 150 C S = 25 C = 150 C Leakage Current Low Side I L(LKLS) 1 µa V INH = 0 V; V OUT = V S < 85 C 10 µa V INH = 0 V; V OUT = V S = 150 C V Reverse Diode Forward-Voltage Low Side 2) SD(LS) V I OUT = 9 A = -40 C = 25 C = 150 C Data Sheet 11 Rev. 1.1,

12 Block Description and Characteristics Switching Times IN t dr(hs) t r(hs) t df(hs) t f(hs) t V OUT 90% 90% ΔV OUT ΔV OUT 10% 10% t Figure 7 Definition of switching times high side (R load to GND) IN t t df(ls) t f(ls) t dr(ls) t r(ls) V OUT 90% 90% ΔV OUT ΔV OUT 10% 10% t Figure 8 Definition of switching times low side (R load to VS) Due to the timing differences for the rising and the falling edge there will be a slight difference between the length of the input pulse and the length of the output pulse. It can be calculated using the following formulas: Δt HS = (t dr(hs) t r(hs) ) - (t df(hs) t f(hs) ) Δt LS = (t df(ls) t f(ls) ) - (t dr(ls) t r(ls) ). Data Sheet 12 Rev. 1.1,

13 Block Description and Characteristics Power Stages - Dynamic Characteristics V S = 13.5 V, = -40 C to +150 C, R load = 2 Ω, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. High Side Switch Dynamic Characteristics Slew Rate HS on 1) ΔV OUT / t r( HS) Switch on Delay Time HS t dr(hs) Fall-Time of HS t f(hs) Slew Rate HS off 1) -ΔV OUT / t f(hs) Switch off Delay Time HS t df(hs) 1 3 1) Not subject to production test, calculated value; ΔV OUT / t r(hs) or -ΔV OUT / t f(hs) µs V/µs µs µs V/µs µs R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω Data Sheet 13 Rev. 1.1,

14 Block Description and Characteristics V S = 13.5 V, = -40 C to +150 C, R load = 2 Ω, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Low Side Switch Dynamic Characteristics Slew Rate LS switch off 1) ΔV OUT / t r(ls) Switch off Delay Time LS t dr(ls) Fall-Time of LS t f(ls) Slew Rate LS switch on 1) -ΔV OUT / t f(ls) Switch on Delay Time LS t df(ls) 2 5 1) Not subject to production test, calculated value; ΔV OUT / t r(ls) or -ΔV OUT / t f(ls) µs V/µs µs µs V/µs µs R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω R SR = 0 Ω R SR = 5.1 kω R SR = 51 kω Data Sheet 14 Rev. 1.1,

15 Block Description and Characteristics 5.3 Protection Functions The device provides integrated protection functions. These are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as outside normal operating range. Protection functions are not to be used for continuous or repetitive operation, with the exception of the current limitation (Chapter 5.3.4). In a fault condition the will apply the highest slew rate possible independent of the connected slew rate resistor. Overvoltage, overtemperature and overcurrent are indicated by a fault current I IS(LIM) at the IS pin as described in the paragraph Status Flag Diagnosis With Current Sense Capability on Page 19 and Figure 12. In the following the protection functions are listed in order of their priority. Overvoltage lock out overrides all other error modes Overvoltage Lock Out To assure a high immunity against overvoltages (e.g. load dump conditions) the device shuts the lowside MOSFET off and turns the highside MOSFET on, if the supply voltage is exceeding the over voltage protection level V OV(OFF). The IC operates in normal mode again with a hysteresis V OV(HY) if the supply voltage decreases below the switchon voltage V OV(ON). In H-bridge configuration, this behavior of the will lead to freewheeling in highside during over voltage Undervoltage Shut Down To avoid uncontrolled motion of the driven motor at low voltages the device shuts off (output is tri-state), if the supply voltage drops below the switch-off voltage V UV(OFF). The IC becomes active again with a hysteresis V UV(HY) if the supply voltage rises above the switch-on voltage V UV(ON) Overtemperature Protection The is protected against overtemperature by an integrated temperature sensor. Overtemperature leads to a shut down of both output stages. This state is latched until the device is reset by a low signal with a minimum length of t reset at the INH pin, provided that its temperature has decreased at least the thermal hysteresis ΔT in the meantime. Repetitive use of the overtemperature protection impacts lifetime Current Limitation The current in the bridge is measured in both switches. As soon as the current in forward direction in one switch (high side or low side) is reaching the limit I CLx, this switch is deactivated and the other switch is activated for t CLS. During that time all changes at the IN pin are ignored. However, the INH pin can still be used to switch both MOSFETs off. After t CLS the switches return to their initial setting. The error signal at the IS pin is reset after 2 * t CLS. Unintentional triggering of the current limitation by short current spikes (e.g. inflicted by EMI coming from the motor) is suppressed by internal filter circuitry. Due to thresholds and reaction delay times of the filter circuitry the effective current limitation level I CLx depends on the slew rate of the load current di/dt as shown in Figure 10. Data Sheet 15 Rev. 1.1,

16 Block Description and Characteristics I L t CLS I CLx I CLx0 t Figure 9 Timing Diagram Current Limitation (Inductive Load) High Side Switch Low Side Switch = 25 C = -40 C I CLH [A] = 150 C I CLL [A] I CLH I CLL0 = 25 C = -40 C = 150 C di L /dt [A/ms] di L /dt [A/ms] Figure 10 Typical Current Limitation Level vs. Current Slew Rate di/dt Data Sheet 16 Rev. 1.1,

17 Block Description and Characteristics High Side Switch 70 Low Side Switch 70 I CL H [A] = -40 C = 25 C = 150 C I CL L [A] = -40 C = 25 C = 150 C V S [V] V S [V] Figure 11 Typical Current Limitation Detection Levels vs. Supply Voltage In combination with a typical inductive load, such as a motor, this results in a switched mode current limitation. This method of limiting the current has the advantage of greatly reduced power dissipation in the compared to driving the MOSFET in linear mode. Therefore it is possible to use the current limitation for a short time without exceeding the maximum allowed junction temperature (e.g. for limiting the inrush current during motor start up). However, the regular use of the current limitation is allowed as long as the specified maximum junction temperature is not exceeded. Exceeding this temperature can reduce the lifetime of the device Short Circuit Protection The device is short circuit protected against output short circuit to ground output short circuit to supply voltage short circuit of load The short circuit protection is realized by the previously described current limitation in combination with the overtemperature shut down of the device. Data Sheet 17 Rev. 1.1,

18 Block Description and Characteristics Electrical Characteristics - Protection Functions V S = 8 V to 18 V, = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Under Voltage Shut Down Switch-ON Voltage V UV(ON) 5.5 V V S increasing Switch-OFF Voltage V UV(OFF) V V S decreasing ON/OFF hysteresis V UV(HY) 0.2 V Over Voltage Lock Out Switch-ON Voltage V OV(ON) 27.8 V V S decreasing Switch-OFF Voltage V OV(OFF) V V S increasing ON/OFF hysteresis V OV(HY) 0.2 V Current Limitation Current Limitation Detection level I CLH A V S = 13.5 V High Side Current Limitation Detection level I CLL A V S = 13.5 V Low Side Current Limitation Timing Shut OFF Time for HS and LS t CLS µs V S = 13.5 V Thermal Shut Down Thermal Shut Down Junction SD C Temperature Thermal Switch ON Junction SO C Temperature Thermal Hysteresis ΔT 7 K Reset Pulse at INH Pin (INH low) t reset 4 µs Data Sheet 18 Rev. 1.1,

19 Block Description and Characteristics 5.4 Control and Diagnostics Input Circuit The control inputs IN and INH consist of TTL/CMOS compatible schmitt triggers with hysteresis which control the integrated gate drivers for the MOSFETs. Setting the INH pin to high enables the device. In this condition one of the two power switches is switched on depending on the status of the IN pin. To deactivate both switches, the INH pin has to be set to low. No external driver is needed. The can be interfaced directly to a microcontroller, as long as the maximum ratings in Chapter 4.1 are not exceeded Dead Time Generation In bridge applications it has to be assured that the highside and lowside MOSFET are not conducting at the same time, connecting directly the battery voltage to GND. This is assured by a circuit in the driver IC, generating a so called dead time between switching off one MOSFET and switching on the other. The dead time generated in the driver IC is automatically adjusted to the selected slew rate Adjustable Slew Rate In order to optimize electromagnetic emission, the switching speed of the MOSFETs is adjustable by an external resistor. The slew rate pin SR allows the user to optimize the balance between emission and power dissipation within his own application by connecting an external resistor R SR to GND Status Flag Diagnosis With Current Sense Capability The status pin IS is used as a combined current sense and error flag output. In normal operation (current sense mode), a current source is connected to the status pin, which delivers a current proportional to the forward load current flowing through the active high side switch. If the high side switch is inactive or the current is flowing in the reverse direction no current will be driven except for a marginal leakage current I IS(LK). The external resistor R IS determines the voltage per output current. E.g. with the nominal value of 8.5k for the current sense ratio k ILIS = I L / I IS, a resistor value of R IS = 1 kω leads to V IS = (I L / 8.5 A)V. In case of a fault condition the status output is connected to a current source which is independent of the load current and provides I IS(lim). The maximum voltage at the IS pin is determined by the choice of the external resistor and the supply voltage. In case of current limitation the I IS(lim) is activated for 2 * t CLS. Normal operation: current sense mode VS Fault condition: error flag mode VS ESD-ZD IS ESD-ZD IS I IS ~ I Load I IS ~ I Load IIS(lim) Sense output logic R IS V IS I IS(lim) Sense output logic R IS V IS Figure 12 Sense Current and Fault Current Data Sheet 19 Rev. 1.1,

20 Block Description and Characteristics I IS [ma] I IS(lim) lower kilis value higher kilis value Current Sense Mode (High Side) Error Flag Mode I CLx I L [A] Figure 13 Sense Current vs. Load Current Truth Table Device State Inputs Outputs Mode INH IN HSS LSS IS Normal Operation 0 X OFF OFF 0 Stand-by mode 1 0 OFF ON 0 LSS active 1 1 ON OFF CS HSS active Over-Voltage (OV) X X ON OFF 1 Shut-down of LSS, HSS activated, error detected Under-Voltage (UV) X X OFF OFF 0 UV lockout Overtemperature or Short 0 X OFF OFF 0 Stand-by mode, reset of latch Circuit of HSS or LSS 1 X OFF OFF 1 Shut-down with latch, error detected Current Limitation Mode 1 1 OFF ON 1 Switched mode, error detected 1) 1 0 ON OFF 1 Switched mode, error detected 1) 1) Will return to normal operation after t CLS ; Error signal is reset after 2*t CLS (see Chapter 5.3.4) Inputs Switches Status Flag IS 0 = Logic LOW OFF = switched off CS = Current sense mode 1 = Logic HIGH ON = switched on 1 = Logic HIGH (error) X = 0 or 1 Data Sheet 20 Rev. 1.1,

21 Block Description and Characteristics Electrical Characteristics - Control and Diagnostics V S = 8 V to 18 V, = -40 C to +150 C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Control Inputs (IN and INH) High level Voltage INH, IN Low level Voltage INH, IN V INH(H) V IN(H) Input Voltage hysteresis V INHHY V INHY V V INH(L) V IN(L) V mv Input Current high level I INH(H) I IN(H) µa V IN = V INH = 5.3 V Input Current low level I INH(L) I IN(L) µa V IN = V INH = 0.4 V Current Sense Current Sense ratio in static oncondition k ILIS = I L / I IS Maximum analog Sense Current, Sense Current in fault Condition k ILIS R IS = 1 kω I L = 30 A I L = 15 A I L = 5 A I IS(lim) ma V S = 13.5 V R IS = 1kΩ Isense Leakage current I ISL 1 µa V IN = 0 V or V INH = 0 V Isense Leakage current, active high side switch I ISH 1 80 µa V IN = V INH = 5 V I L = 0 A Data Sheet 21 Rev. 1.1,

22 Application Information 6 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 6.1 Application Example Microcontroller Voltage Regulator Reverse Polarity Protection XC866 I/O I/O I/O I/O I/O Reset Vdd Vss C Q 22µF C D 47nF WO RO Q D TLE 4278G GND I C S 470µF D Z1 10V R 1 1kΩ V S IPB 100P03P3L -04 R IN1 10kΩ R INH1 10kΩ R INH2 10kΩ R IN2 10kΩ INH VS C Sc1 470nF C Sc2 470nF VS INH IN IS OUT M OUT IN IS SR SR R IS12 470Ω R SR kΩ GND GND R SR kΩ High Current H-Bridge Figure 14 Application Example: H-Bridge with two Note: This is a simplified example of an application circuit. The function must be verified in the real application. 6.2 Layout Considerations Due to the fast switching times for high currents, special care has to be taken to the PCB layout. Stray inductances have to be minimized in the power bridge design as it is necessary in all switched high power bridges. The has no separate pin for power ground and logic ground. Therefore it is recommended to assure that the offset between the ground connection of the slew rate resistor, the current sense resistor and ground pin of the device (GND / pin 1) is minimized. If the is used in a H-bridge or B6 bridge design, the voltage offset between the GND pins of the different devices should be small as well. A ceramic capacitor from VS to GND close to each device is recommended to provide current for the switching phase via a low inductance path and therefore reducing noise and ground bounce. A reasonable value for this capacitor would be about 470 nf. The digital inputs need to be protected from excess currents (e.g. caused by induced voltage spikes) by series resistors in the range of 10 kω. Data Sheet 22 Rev. 1.1,

23 Application Information 6.3 Half-bridge Configuration Considerations Please note that, if the is used in a half-bridge configuration with the load connected between OUT and GND and the supply voltage is exceeding the Overvoltage Switch-OFF level V OV(OFF), the implemented Overvoltage Lock Out feature leads to automatically turning on the high side switch, while turning off the low side switch, and therefore connecting the load to V S ; independently of the current IN- and INH-pin signals (see also Truth Table on Page 20). This will lead to current flowing through the load, if not otherwise configured. It shall be insured that the power dissipated in the NovalithIC does not exceed the maximum ratings. For further explanations see the application note BTN79x0 Over Voltage (OV) Operation. Microcontroller Voltage Regulator Reverse Polarity Protection XC866 I/O I/O I/O I/O Reset Vdd Vss C Q 22µF C D 47nF WO RO Q D TLE 4278G GND I C S 470µF D Z1 10V R 1 1kΩ V S IPB 100P03P3L- 04 R IN 10kΩ R INH 10kΩ INH IN IS VS OUT C Sc 470nF M SR R IS 1kΩ R SR 0..51kΩ GND High Current Half-Bridge Figure 15 Application Example: Half-Bridge with a (Load to GND) Note: This is a simplified example of an application circuit. The function must be verified in the real application. Data Sheet 23 Rev. 1.1,

24 Package Outlines 7 Package Outlines 7.1 PG-TO (15) ±0.2 1 ± ± ) ) A 1.27 ±0.1 B ± ± x 0.6 ±0.1 6 x M A B 8 MAX. 0.5 ± B 1) Typical Metal surface min. X = 7.25, Y = 6.9 All metal surfaces tin plated, except area of cut. GPT09114 Footprint Figure 16 PG-TO (Plastic Green Transistor Single Outline Package) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: Dimensions in mm Data Sheet 24 Rev. 1.1,

25 Package Outlines 7.2 PG-TO ± ±0.2 A ) 1.27 ± ± ±0.3 1) ± ± ± ± ±0.3 7 x 0.6 ±0.1 C 3.7± ± x M A C 8.4 ± ±0.4 1) Typical Metal surface min. X = 7.25, Y = 12.3 All metal surfaces tin plated, except area of cut. Figure 17 PG-TO (Plastic Green Transistor Single Outline Package) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: Dimensions in mm Data Sheet 25 Rev. 1.1,

26 Package Outlines 7.3 PG-TO ± ±0.2 A B ) 1.27 ±0.1 17± ±0.3 1) ± ±0.2 C 11± ± ±0.1 7 x 0.6 ± x M A B C 1) Typical Metal surface min. X = 7.25, Y = 12.3 All metal surfaces tin plated, except area of cut. Figure 18 PG-TO (Plastic Transistor Single Outline Package) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: Dimensions in mm Data Sheet 26 Rev. 1.1,

27 Revision History 8 Revision History Revision Date Changes New packages added; Initial version Data Sheet Data Sheet 27 Rev. 1.1,

28 Edition Published by Infineon Technologies AG Munich, Germany 2007 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.