5-V Low-Drop Voltage Regulator TLE Bipolar IC
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1 5- Low-Drop oltage Regulator TLE 4267 Bipolar IC Features Output voltage tolerance ± 2 % 4 ma output current capability Low-drop voltage ery low standby current consumption Input voltage up to 4 Overvoltage protection up to 6 ( 4 ms) Reset function down to 1 output voltage ESD protection up to 2 Adjustable reset time On/off logic Overtemperature protection Reverse polarity protection Short-circuit proof Wide temperature range Suitable for use in automotive electronics Type Ordering Code Package TLE 4267 Q67-A9153-A83 P-TO TLE 4267 G Q676-A9169-A83 P-TO TLE 4267 S Q67-A9246-A84 P-TO TLE 4267 GM Q676-A9398 P-DSO-14-8 New type, SMD type Functional Description TLE 4267 is a 5- low-drop voltage regulator in a TO22-7 package. It supplies an output current of > 4 ma. The IC is shortcircuit-proof and incorporates temperature protection that disables the IC at overtemperature. P-TO P-TO P-TO (TO-22 AB/7, Option E318) P-DSO-14-8; -9 Data Sheet Rev
2 Application The IC regulates an input voltage I in the range 5.5 < I <4to Qrated = 5.. A reset signal is generated for an output voltage Q of < 4.5. The reset delay can be set with an external capacitor. The device has two logic inputs. It is turned-on by a voltage of > 4 on E2 by the ignition for example. It remains active as a function of the voltage on E6, even if the voltage on E2 goes Low. This makes it possible to implement a self-holding circuit without external components. When the device is turned-off, the output voltage drops to and current consumption tends towards µa. Design Notes for External Components The input capacitor C I is necessary for compensation line influences. The resonant circuit consisting of lead inductance and input capacitance can be damped by a resistor of approx. 1 Ω in series with C I. The output capacitor is necessary for the stability of the regulating circuit. Stability is guaranteed at values of 22 µf and an ESR of 3 Ω within the operating temperature range. Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturating of the power element. A comparator in the reset-generator block compares a reference that is independent of the input voltage to the scaled-down output voltage. If this reaches a value of 4.5, the reset-delay capacitor is discharged and then the reset output is set Low. As the output voltage increases again, the reset-delay capacitor is charged with constant current from Q = 4.5 onwards. When the capacitor voltage reaches the upper switching threshold, reset goes High again. The reset delay can be set within wide range by selection of the external capacitor. With the integrated turn-on/turn-off logic it is simple to implement delayed turn-off without external components. Data Sheet Rev
3 Truth Table for Turn-ON/Turn-OFF Logic E2, Hold Q Remarks Inhibit L X OFF Initial state, Inhibit internally pulled up H X ON Regulator switched on via Inhibit, by ignition for example H L ON Hold clamped active to ground by controller while Inhibit is still high X L ON Previous state remains, even ignition is shut off: self-holding state L L ON Ignition shut off while regulator is in self-holding state L H OFF Regulator shut down by releasing of Hold while Inhibit remains Low, final state. No active clamping required by external self-holding circuit (µc) to keep regulator shut off. Inhibit: Hold: E2 Enable function, active High E6 Hold and release function, active Low Data Sheet Rev
4 Pin Configuration (top view) P-TO P-TO P-TO Ι E2 R D E AEP1724 Ι E2 R D E6 Q AEP1481 Ι E2 R D E6 Q AEP2123 Pin Definitions and Functions Pin Symbol Function 1 I Input; block to ground directly at the IC by a ceramic capacitor 2 E2 Inhibit; device is turned-on by High signal on this pin; internal pulldown resistor of 1 kω 3 R Reset Output; open-collector output internally connected to the output via a resistor of 3 kω 4 Ground; connected to rear of chip 5 D Reset Delay; connect with capacitor to for setting delay 6 E6 Hold; see truth table above for function; this input is connected to output voltage across pullup resistor of 5 kω 7 Q 5- Output; block to with 22-µF capacitor, ESR < 3 Ω Data Sheet Rev
5 Pin Configuration (cont d) (top view) P-DSO-14-8 Ι E2 N.C. R 1 14 N.C Q E6 7 8 D AEP271 Pin Definitions and Functions Pin Symbol Function 1 I Input; block to ground directly at the IC by a ceramic capacitor 2 E2 Inhibit; device is turned-on by High signal on this pin; internal pulldown resistor of 1 kω 7 R Reset Output; open-collector output internally connected to the output via a resistor of 3 kω 3, 4, 5, 1, Ground; connected to rear of chip 11, 12 8 D Reset Delay; connect with capacitor to for setting delay 9 E6 Hold; see truth table above for function; this input is connected to output voltage across pullup resistor of 5 kω 13 Q 5- Output; block to with 22-µF capacitor, ESR < 3 Ω 6, 14 N.C. Not Connected Data Sheet Rev
6 Input Ι Temperature Sensor Saturation Control and Protection Circuit Q 5 Output Adjustment Bandgap Reference Control Amplifier Buffer Reset Generator D R Reset Delay Reset Output Turn-ON/Turn-OFF Logic E2 Inhibit E6 Hold AEB1482 Block Diagram Data Sheet Rev
7 Absolute Maximum Ratings T J = 4 to 15 C Parameter Symbol Limit alues Unit Notes min. max. Input oltage I oltage I 6 t 4 ms Current I I Limited internally Reset Output oltage R.3 7 Current I R Limited internally Reset Delay oltage d.3 42 Current I d Output oltage Q.3 7 Current I Q Limited internally Inhibit oltage E Current I E2 5 5 ma t 4 ms Hold oltage E6.3 7 Current I E6 ma Limited internally Current I.5 A Temperatures Junction temperature T J 15 C Storage temperature T stg 5 15 C Data Sheet Rev
8 Operating Range Parameter Symbol Limit alues Unit Notes min. max. Input voltage I see diagram Junction temperature T J 4 15 C Thermal Resistance Junction ambient R thja 65 K/W P-TO package Junction-case R thjc 6 K/W P-TO package Junction-case Z thjc 2 K/W T < 1 ms P-TO package Junction ambient R thja 7 K/W P-TO (SMD) package Junction-case R thjc 6 K/W P-TO (SMD) package Junction-case Z thjc 2 K/W T < 1 ms P-TO (SMD) package Junction ambient R thja 65 K/W P-TO package Junction-case R thjc 6 K/W P-TO package Junction-case Z thjc 2 K/W T < 1 ms P-TO package Junction ambient R thja 7 K/W P-DSO-14-8 package Junction-pin R thjp 3 K/W P-DSO-14-8 package Data Sheet Rev
9 Characteristics I = 13.5 ; 4 C < T J < 125 C; E2 > 4 (unless specified otherwise) Parameter Symbol Limit alues Unit Test Condition min. typ. max. Output voltage Q ma I Q 4 ma 6 I 26 Output voltage Q ma I Q 15 ma 6 I 4 Output-current limiting I Q 5 ma T J = 25 C Current consumption I q 5 µa Regulator-OFF I q = I I I Q Current consumption I q = I I I Q I q 1. 1 µa T J = 25 C IC turned off Current consumption I q = I I I Q I q ma I Q = 5 ma IC turned on Current consumption I q 6 ma I Q = 4 ma I q = I I I Q Current consumption I q = I I I Q I q 8 ma I Q = 4 ma I = 5 Drop voltage Dr.3.6 I Q = 4 ma 1) Load regulation Q 5 m 5 ma I Q 4 ma Supply-voltage regulation Q m I = 6 to 36 ; I Q = 5 ma Supply-voltage rejection SR 54 db f r = 1 Hz; r =.5 pp Longterm stability Q m 1 h 1) Drop voltage = I Q (measured when the output voltage Q has dropped 1 m from the nominal value obtained at I = 13.5 ) Data Sheet Rev
10 Characteristics (cont d) Parameter Symbol Limit alues Unit Test Condition min. typ. max. Reset Generator Switching threshold rt Reset High level 4.5 R ext = Saturation voltage R.1.4 R R = 4.7 kω 1) Pullup R R 3 kω Saturation voltage D,sat 5 1 m Q < RT Charge current I d µa D = 1.5 Delay switching threshold dt Delay t d 2 ms C d = 1 nf Switching threshold st.43 Delay t t 2 µs C d = 1 nf Inhibit Turn-ON voltage E2 3 4 IC turned-on Turn-OFF voltage E2 2 IC turned-off Pulldown R E kω Hysteresis E Input current I E µa IP2 = 4 Holding voltage E % Referred to Q Turn-OFF voltage E % Referred to Q Pullup R E kω Overvoltage Protection Turn-OFF voltage i,ov Turn-ON hysteresis i,ov 2 6 1) The reset output is Low between Q = 1 and RT Data Sheet Rev
11 Ι Ι Ι Q Ι Q 1 µ F 47 nf 22 µ F TLE kω Ι Ι E2 E2 Inhibit R Ι R Q D Ι d Ι E6 Hold R E2 C CD E6 AES1483 Test Circuit Input Ι Q 5 Output E2; eg from Terminal nf E2 Inhibit TLE 4267 R Reset To MC R 1 nf 22 µ F E6 E6 Hold From µ C AES1484 Application Circuit Data Sheet Rev
12 i E E2, ON E2, OFF Q <t t RT d t t dt ST d, sat R t d R, sat Power Reset on Thermal Shutdown oltage Drop at Input Undervoltage at Output Secondary Spike Load Bounce Shutdown AET1985 Time Response Data Sheet Rev
13 i E2 E2, ON E2, OFF 1) 5) E6 <1µ s < 1 µ s E6, rel E6, hold 2) 4) 6) 7) 1) Q Q, nom RT 8) d dt ST d, sat R t d t t R, sat 3) 9) 1) Enable active 2) Hold inactive, pulled up by 3) Power-ON reset 4) Hold active, clamped to by external µc 5) Enable inactive, clamped by int. pull-down resistor Q 6) 7) 8) 9) 1) Pulse width smaller than 1 µ s Hold inactive, released by µ C oltage controller shutdown Output-low reset No switch on via E6 possible after E6 was released toe6 > E6, rel for more than 4 µ s AET1986 Enable and Hold Behaviour Data Sheet Rev
14 Output oltage Q versus Temperature T j Drop oltage Dr versus Output Current I Q 5.1 AED AED1488 Q Ι = 13.5 Dr m T = 125 C j 3 T =25 j C C 16 T j ma 6 Ι Q Charge Current I d versus Temperature T j Delay Switching Threshold dt versus Temperature T j 22 AED AED1487 Ι d µ A dt Ι = Ι = 13.5 C = dt Ι d C 16 T j C 16 T j Data Sheet Rev
15 Current Consumption I q versus Output Current I Q 7 AED149 Current Consumption I q versus Input oltage I 15 AED1491 Ι q ma Ι = 25 Ω q ma R L 5 Ι = ma Ι Q Ι Output Current I Q versus Temperature T j Output Current I Q versus Input oltage I Ι Q 7 ma AED1489 Ι Q 7 ma 6 T j = 25 C AED = Ι T j = 125 C C 16 T j i Data Sheet Rev
16 Output oltage Q versus Inhibit oltage E2 Inhibit Current I E2 versus Inhibit oltage E2 6 AED AED1989 Q Ι E2 µa E2 E2 Data Sheet Rev
17 Package Outlines P-TO (Plastic Transistor Single Outline) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information Dimensions in mm Data Sheet Rev
18 P-TO (Plastic Transistor Single Outline) A B ± (1.3) ) x 1.27 = M AB 3.6 ± ) Shear and punch direction no burrs this surface Back side, heatsink contour All metal surfaces tin plated, except area of cut 5 +3 ± ± B (14.1) GPT5754 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information SMD = Surface Mounted Device Dimensions in mm Data Sheet Rev
19 P-TO (Plastic Transistor Single Outline) 9.9 ± ± A B ± ± ± ) 9.2 ±.2 C 12.5 ± x x.6 ±.1.25 M A B C.5 ± ) Shear and punch direction no burrs this surface. Back side, heatsink contour All metal surfaces tin plated, except area of cut. GPT5887 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information Dimensions in mm Data Sheet Rev
20 P-DSO-14-8 (Plastic Dual Small Outline) GPS9222 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book Package Information SMD = Surface Mounted Device Dimensions in mm Data Sheet Rev
21 Edition Published by Infineon Technologies AG, St.-Martin-Strasse 53, D München Infineon Technologies AG1999. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologiesis an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet Rev
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