Z-PACK 2mm FB 5 Row, Vertical Plug to Right Angle Receptacle

Transcription

1 ELECTRICAL PERFORMANCE REPORT EPR Issued: Z-PACK 2mm FB 5 Row, ertical Plug to Right Angle Receptacle ACD - AMP Circuits & Design A Division of AMP Circuits & Packaging Published by AMP Incorporated, Harrisburg, PA 17105

2 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR TABLE OF CONTENTS INTRODUCTION... iii What is an EPR?... iii Why use this EPR?... iii HOW TO USE AN EPR...iv The Simulation Page...v Simulation Graphs...v Input oltage...v Near & Far End Noise alues...vii MODEL OERIEW...viii The Single Line Model (SLM)...viii The Multi Line Model (MLM)...viii SINGLE LINE MODEL DATASHEET... ix SIMULATION DATA... 1 Z-PACK 2mm FB, 5 Row, ertical Plug to Right Angle Receptacle Electrical Interconnection Performance Information... 2 MODEL WIRING PATTERNS... 3 SIMULATION LOOK-UP TABLE... 4 SIMULATION LOOK-UP TABLE (Continued)... 5 SIMULATION LOOK-UP TABLE (Continued)... 6 Specifications subject to change. Consult AMP for latest design specifications. Copyright 1998 by AMP Incorporated All Rights Reserved. AMP is a registered trademark. ii Contents Printed on Recycled Paper

3 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR INTRODUCTION The first several pages of this Electrical Performance Report (EPR) are intended to give an overview of the AMP EPR. By understanding how to apply information from an AMP EPR, system designers will be able to select the best AMP product for their application. What is an EPR? EPRs (Electrical Performance Reports) are technical documents composed of electrical simulations of connector models. Each of these simulations varies in several system parameters. EPRs are used to assist system design engineers in the selection of potential connector solutions for their particular application. While there are several non-technical issues that enter into the connector selection decision, these electrical performance criteria are becoming very important. Why use this EPR? The EPR provides system designers with fundamental data relating to the electrical performance of a connector. This data, in turn, allows the system designer to decide if the connector under analysis is the proper interconnection device for his or her application. Criteria that impact the electrical performance of a connector include wiring patterns, edge rates, system impedances and logic families. The EPR permutes these criteria one step at a time, while holding all other parameters constant. This approach reveals the effects that each change may or may not cause. If used properly, an EPR can facilitate in choosing the proper connector for an application. Furthermore, the EPR can help in selecting wiring patterns, edge rates, system impedances, and logic families within an application. iii

4 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR HOW TO USE AN EPR Following a systematic method, pertinent information can be derived from the various EPR simulations. The parametric nature of simulations can best be explained by recognizing that various factors affect coupled noise: Wiring Pattern Logic Family (excitation) System Impedance (Z o ) Signal Risetime oltage Swing Connection Capacitance SIMULATION LOOK-UP TABLE Consolidates all simulations in the EPR to quickly find pertinent simulation(s). SIMULATION AND NOTES Defines Simulation Look-up Table fields. Can include graphics to relate. S Wiring patterns used for the simulations. Single-ended and differential patterns are simulated, where applicable. Select a representative model pattern that is similar to your application setup. Find the rows in the Simulation Look-Up Table that correspond to this wiring (model) pattern. In the table, you will see several parameters that vary given this model pattern. Note the simulation filename of interest, and go to that page to find graphs of electrical simulation data. iv

5 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR The Simulation Page The simulation page shows the graphical results of a simulation on a connector under defined system parameters. Referring to the figure below, it can be seen that the several parameters that effect the electro-dynamics of the connector are shown. Shows the connections to the connector model. SIMULATION GRAPHS Provide voltage versus time information. Graphs include Input oltage, Near and Far End Noise oltages. Defines connections to the connector model. SIMULATION Defines logic family, voltage swing, and rise time used in this simulation. Shows the simulation s system impedance, and the PAD (in the case of SMT) or plated through-hole capacitance. Simulation Graphs The value of the EPR is realized when voltage values are found on the simulation graphs. The plots of voltage versus time reveal both absolute values of voltage levels and where they occur in time. These values can help in determining the contribution or impact of the connector/connection on the system noise budget. In some occurrences, where multiple lines are monitored, a rough estimate of skew can be determined. The total noise tolerance should be determined, understanding that it is different for different logic families. Input oltage The Input oltage graph shows the incident and far end voltage of the connector including the connection effects (PAD or plated through hole capacitance). Overall symmetry (in the case of differential signals) can be seen. Refer to the following graph for more information: v

6 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR INPUT voltage graphs. In this case, a differential system, the INPUT voltages (IA3 & IA4) are plotted with the output voltages (OA3 & OA4) versus time Input oltage [ ] OA4 (Output voltage, pin A4) IA3 IA4 OA3 OA4 IA3 (Input voltage, pin A3) 1.8 OLTAGE(mv) OA3 (Output voltage, pin A3) 0.6 IA4 (Input voltage, pin A4) TIME(ns) The voltage response (refer to the voltage swing in following figure) of the connector should approach that of the logic family as defined in the simulation area of the EPR graph pages. The propagation delay of the connector can be determined as the difference in time that the incident and far end graphs cross the same voltage level. In the case below, the propagation delay would be: propagation delay: t = t 2 t Input oltage [ ] IA3 IA4 OA3 OA4 IA3 (Input voltage, pin A3) 1.8 OLTAGE(mv) OA3 (Output voltage, pin A3) oltage Swing Propagation delay of connector TIME(ns) t1 t2 vi

7 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR Near & Far End Noise alues Near and Far end noise values include the effects of the return path in their determination. Simulated values are absolute and can be included in their percent contribution to the total noise budget as determined by the system designer. In the following Near End Noise oltage figure, the effects of adjacent pairs that are out-of-phase can be seen (the +/- of two differentially-driven lines). Note that similar techniques are used with the Far End Noise voltage graphs Near End Noise oltage [ ] NDB3B4 NB3 NB4 NDB3B4 Differential voltage between pins B3 & B4 NB3 (Near End noise voltage, pin B3) OLTAGE(mv) NB4 (Near End noise voltage, pin B4) TIME(ns) To summarize, the EPR arms the system designer with simulation information from the simulation setups that closely match his or her design. This information can be effectively used to focus on follow-up simulations, and it is of great aid in selecting connector and wiring pattern candidates. vii

8 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR MODEL OERIEW The Single Line Model (SLM) The SLM is used to evaluate the effects of a single set of connector pins. A SLM is independent of connector wiring pattern and is an approximation of a well referenced connector. A simulation with the SLM can show the following effects: PROPAGATION DELAY ATTENUATION REFLECTIONS DRIE POWER TIMING Single Line Model The SLM for the connector found in this EPR is listed on the next page. Note: A SLM was NOT used to generate simulation data in this EPR. (FOR CROSSTALK, A MULTI-LINE MODEL MUST BE USED.) The Multi Line Model (MLM) The MLM (Multi-Line Model) is used in all the simulations found in this EPR. The MLM accounts for the electrostatic and electromagnetic coupling (crosstalk) as well as the common impedance noise found in a connector. Its structure couples, in three dimensions, all pins to one another. This results in a complex model that uses series resistance, inductance, coupling capacitance and inductive coupling coefficients so arranged to allow connections at both the input and output. This modeling technique effectively shows coupled noise at the expense of CPU runtime. Simulations done using the MLM will show the following information: Multi Line Model - The Fundamental Structure ELECTROSTATIC COUPLING COMMON MODE NOISE ATTENUATION PROPAGATION DELAY ELECTROMAGNETIC COUPLING REFLECTIONS DRIE POWER TIMING CROSSTALK The fundamental MLM varies in the number of pins (rows & columns) and the number of sections. Note that faster rise times require multiple sections. To Learn more about AMP Simulation capabilities, please call (fax ). AMP, Harrisburg, PA In Canada, call viii

9 SINGLE LINE MODEL DATASHEET Z-PACK, 2mm CL, FB, 5 Row, ertical Plug to Right Angle Receptacle ALIDATED Well referenced pattern Cp1 CONNECTOR R L C Cp2 Cp1 CONNECTOR Z Tpd Cp2 Connector Lumped Constant Model Connector Distributed Model Row R (m Ω ) L (nh) C (pf) Z ( Ω ) Tpd (ps) A B C D E Mean Note: SINGLE LINE MODEL DATASHEET (1) The following RLC model is appropriate for edge speeds < 10*(<highest Tpd value>). To accommodate faster edge speeds, the lumped model must be divided into two or more RLC sections. Typically, a section s propagation delay should be 1/10 th of the edge speed. (2) The single line inductance and capacitance values are extracted from a specified pattern. The placement and number of ground returns effect the inductance and capacitance of the single line model. Please contact AMP for other wiring patterns. (3) The parameters for the Single Line Model are for the connector only without any mounting effects such as plated through holes or pads capacitance (Cp1 and Cp2). The impedance and propagation delay for the connector are calculated as follows: L Z = Connector C ( Ω ) and Tpd = L * Connector C ( sec ) For an interconnection path model, the mounting effects must be added because the additional capacitance of the pad to ground or plated through hole (Cp1 and Cp2) decrease impedance and increase propagation delay of the interconnection path. The impedance and propagation delay for an interconnection path are calculated as follows: Z Interconnect = L ( Ω) C + ( Cp1 + Cp2) and Tpd Interconne ct = L * ( C + Cp1 + Cp2)( sec) FOR ADDITIONAL ELECTRICAL MODELING/SIMULATION SUPPORT, CALL Datasheet Filename: ZPACK_2mmFB_5Row_-P_RA-R_TH Modeled by: [SC] Created on 01/30/98 2:06 PM Copyright 1998, AMP Incorporated ix Reviewed By: [CTK] SPICE File: [FB5] ACD Internal Form: Form_SLM-DS_1998_0304

10 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR (THIS PAGE INTENTIONALLY LEFT BLANK) x

11 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR SIMULATION DATA Z-PACK 2mm FB 5 Row, ertical Plug to Right Angle Receptacle 1

12 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR Z-PACK 2mm FB, 5 Row, ertical Plug to Right Angle Receptacle Electrical Interconnection Performance Information This document contains abstracts of the results of various computer simulations of electrical interconnection performance. E D C B A a The Z-PACK 2mm FB evaluated in this report is a five-row, vertical plug to right angle receptacle interconnection designed specifically for Futurebus+ applications. The Model Pattern Orientation in this set of data represents a board to board interconnection. The simulations are run on a six (6) column model, Section a-a as shown, which is adequate for most wiring patterns. As shown in the Simulation Circuit Abstract figure to the right, the simulation model is a validated matrix circuit model (AMP Part Number ) which provides for the series resistance and inductance elements of each line, the electrostatic coupling between lines, and the electromagnetic coupling between lines. The model for this connector is multiple sections and is useful for digital signals with edge rates as fast as 500 ps. RS RC driven line(s) LC S CP CP RT near end ref CP E D C B A Model Pattern Orientation (Section a-a) RC reference line(s) quiet line(s) RC C M a CONNECTOR MODEL LC L M LC Simulation Circuit Abstract far end ref CP RT RT The model is configured so that any position in the matrix may be assigned as a driven line, a quiet line, or a reference line. Each line can be terminated (RT) as desired, pad capacitances (CP) can be assigned as desired, with driving functions (S) and source impedances (RS) assigned as desired. The near end and far end references are isolated to allow observation of common impedance effects of the connector. The simulation model outputs include both the electrostatic (E) and magnetic (M) crosstalk and the common mode noise contributions. This sum is reported as Near End Noise oltage and/or Far End Noise oltage. signal s b Backward crosstalk driven line (-) (+) (-) coupled region signal i Zc noise (+) (+) (-) Common Impedance Noise Forward crosstalk Electrostatic and Electromagnetic Crosstalk f 2

13 MODEL WIRING PATTERNS EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR :1 Signal to Ground 2:1 Signal to Ground 2:1 Signal to Ground Differential (Horizontal) Pairs E X a X Q X a D a X A X a X C X a X Q X a B a X a X a X A X a X Q X a 3:1 Signal to Ground 4:1 Signal to Ground Grounds Towards Inside Rows E a X a Q a X E a a Q a a a D a a a X a a D a X a X a X C X a a Q A X C a a A Q a a B a a X a a a B X a X a X a A X a Q a X a A a a a Q a a 4:1 Signal to Ground Differential (Horizontal) Pairs Grounds Towards Inside Rows E a Q Q a D a A A I a C X X X X X X B a a a E a X Q a X a D X a A X a a C a a X Q a X B a X a a X a A X a Q X a a 4:1 Signal to Ground Differential (ertical) Pairs Grounds Towards Inside Rows E Q A a D a Q a A I a C X X X X X X B a a Q a E q X a X q D X Q Q X a C a X A A I X B q X Q Q X q A X a X a 4:1 Signal to Ground Grounds Towards Outside Rows E a X Q X a X D a a a a a a C a a A Q a a B a a a a a a A X a X Q X a 4:1 Signal to Ground Differential (ertical) Pairs Grounds Towards Outside Rows E a X a X Q X D Q a Q a C a Q A a B a A I a a A a Q Q a A a a Q A X X X 9:1 Signal to Ground E a a a Q a a D a a A a a X C a a a Q a a B X a X a X a A a a a Q a a 3

14 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR SIMULATION LOOK-UP TABLE (Indexed by S/G Ratio, then by Logic Family, then by Tr) Cp DH D GI GO Logic: S/G Ratio Tr f o Zo: Table Legend: Pad or Plated Through Hole capacitence Differential signal (horizontal pairs) Differential signal (vertical pairs) Grounded Lines Towards Inside Rows Grounded Lines Towards Outside Rows Logic family simulated Ratio of signal lines to reference (ground) lines Rise time of source Source final voltage Source initial voltage Characteristic Impedance Simulation S/G Tr o f Zo Cp Filename Page Ratio Logic (ns) (olts) (olts) (Ohms) (pf) :1 ACT :1 ACT :1 AST :1 AST :1 AST :1 AST :1 BTL :1 BTL :1 ECL :1 ECL :1 GTL :1 ACT :1 ACT :1 AST :1 AST :1 AST :1 AST :1 BTL :1 BTL :1 ECL :1 ECL :1 GTL :1 DH ECL :1 DH ECL

15 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR SIMULATION LOOK-UP TABLE (CONTINUED) (Indexed by S/G Ratio, then by Logic Family, then by Tr) Cp DH D GI GO Logic: S/G Ratio Tr f o Zo: Table Legend: Pad or Plated Through Hole capacitence Differential signal (horizontal pairs) Differential signal (vertical pairs) Grounded Lines Towards Inside Rows Grounded Lines Towards Outside Rows Logic family simulated Ratio of signal lines to reference (ground) lines Rise time of source Source final voltage Source initial voltage Characteristic Impedance Simulation S/G Tr o f Zo Cp Filename Page Ratio Logic (ns) (olts) (olts) (Ohms) (pf) :1 ACT :1 ACT :1 AST :1 AST :1 AST :1 AST :1 BTL :1 BTL :1 ECL :1 ECL :1 GTL :1 GI ACT :1 GI ACT :1 GI AST :1 GI AST :1 GI AST :1 GI AST :1 GI BTL :1 GI BTL :1 GI ECL :1 GI ECL :1 GI GTL

16 EPR - Z-PACK 2mm FB, 5 Row, ertical Plug to Right EPR SIMULATION LOOK-UP TABLE (CONTINUED) (Indexed by S/G Ratio, then by Logic Family, then by Tr) Cp DH D GI GO Logic: S/G Ratio Tr f o Zo: Table Legend: Pad or Plated Through Hole capacitence Differential signal (horizontal pairs) Differential signal (vertical pairs) Grounded Lines Towards Inside Rows Grounded Lines Towards Outside Rows Logic family simulated Ratio of signal lines to reference (ground) lines Rise time of source Source final voltage Source initial voltage Characteristic Impedance Simulation S/G Tr o f Zo Cp Filename Page Ratio Logic (ns) (olts) (olts) (Ohms) (pf) :1 GO ACT :1 GO ACT :1 GO AST :1 GO AST :1 GO AST :1 GO AST :1 GO BTL :1 GO BTL :1 GO ECL :1 GO ECL :1 GO GTL :1 DH;GI ECL :1 DH;GI ECL :1 D;GI ECL :1 D;GI ECL :1 D;GO ECL :1 D;GO ECL :1 HCMOS :1 HCMOS

17 vid3 vod3 E X a X Q X a 4.50 D a X A X a X 4.00 C X a X Q X a B a X a X a X 2.50 A X a X Q X a vna4 vnc4 vne ACT SIMULATION to 5.0 Tr (ns): 1.0 (10%-90%) 13 vfa4 vfc4 vfe Ohm Lines Page 7

18 E X a X Q X a 5.50 vid3 vod3 D a X A X a X 5.00 C X a X Q X a B a X a X a X 3.50 A X a X Q X a vna4 vnc4 vne ACT SIMULATION to 5.0 Tr (ns): 2.0 (10%-90%) vfa4 vfc4 vfe4 65 Ohm Lines oltage(m ) Page 8

19 vid3 vod3 E X a X Q X a 3.00 D a X A X a X 2.50 C X a X Q X a B a X a X a X A X a X Q X a vna4 vnc4 vne AST SIMULATION to vfa4 vfc4 vfe4 Page 9 Tr (ns): 1.0 (10%-90%) 50 Ohm Lines

20 E X a X Q X a 3.50 vid3 vod3 D a X A X a X 3.00 C X a X Q X a 2.50 B a X a X a X A X a X Q X a vna4 vnc4 vne AST SIMULATION to Tr (ns): 1.0 (10%-90%) 8 vfa4 vfc4 vfe4 65 Ohm Lines 7 6 oltage(m ) Page 10

21 vid3 vod3 E X a X Q X a 3.00 D a X A X a X 2.50 C X a X Q X a B a X a X a X A X a X Q X a vna4 vnc4 vne AST SIMULATION to vfa4 vfc4 vfe4 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 11

22 E X a X Q X a 3.50 vid3 vod3 D a X A X a X 3.00 C X a X Q X a 2.50 B a X a X a X A X a X Q X a vna4 vnc4 vne AST SIMULATION to 3.3 Tr (ns): 2.0 (10%-90%) 4 vfa4 vfc4 vfe4 65 Ohm Lines oltage(m ) Page 12

23 vid3 vod3 E X a X Q X a 2.10 D a X A X a X C X a X Q X a B a X a X a X A X a X Q X a vna4 vnc4 vne BTL SIMULATION to vfa4 vfc4 vfe4 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 13

24 E X a X Q X a 2.20 vid3 vod3 D a X A X a X 2.10 C X a X Q X a B a X a X a X A X a X Q X a vna4 vnc4 vne BTL SIMULATION 1.0 to 2.1 Tr (ns): 2.0 (10%-90%) vfa4 vfc4 vfe4 65 Ohm Lines oltage(m ) Page 14

25 vid3 vod3 E X a X Q X a D a X A X a X C X a X Q X a B a X a X a X A X a X Q X a vna4 vnc4 vne ECL SIMULATION to vfa4 vfc4 vfe4 Tr (ns): 0.5 (20%-80%) 3 50 Ohm Lines Page 15

26 E X a X Q X a vid3 vod3 D a X A X a X C X a X Q X a B a X a X a X A X a X Q X a vna4 vnc4 vne ECL SIMULATION to Tr (ns): 1.0 (20%-80%) vfa4 vfc4 vfe4 50 Ohm Lines oltage(m ) Page 16

27 vid3 vod3 E X a X Q X a D a X A X a X C X a X Q X a B a X a X a X A X a X Q X a vna4 vnc4 vne GTL SIMULATION to vfa4 vfc4 vfe4 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 17

28 E a X Q a X a 5.50 vid3 vod3 D X a A X a a 5.00 C a a X Q a X B a X a a X a 3.50 A X a Q X a a vna3 vnc4 vne ACT SIMULATION to 5.0 Tr (ns): 1.0 (10%-90%) 2 vfa3 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 18

29 vid3 vod3 E a X Q a X a 5.00 D X a A X a a C a a X Q a X 3.50 B a X a a X a A X a Q X a a vna3 vnc4 vne ACT SIMULATION 0.0 to 5.0 vfa3 vfc4 vfe3 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 19

30 E a X Q a X a 3.50 vid3 vod3 D X a A X a a 3.00 C a a X Q a X 2.50 B a X a a X a A X a Q X a a 0.50 AST SIMULATION 0.3 to 3.3 vna3 vnc4 vne Tr (ns): 1.0 (10%-90%) vfa3 vfc4 vfe3 50 Ohm Lines oltage(m ) Page 20

31 vid3 vod3 E a X Q a X a 3.00 D X a A X a a 2.50 C a a X Q a X B a X a a X a A X a Q X a a vna3 vnc4 vne AST SIMULATION 0.3 to vfa3 vfc4 vfe3 Tr (ns): 1.0 (10%-90%) 65 Ohm Lines Page 21

32 E a X Q a X a 3.50 vid3 vod3 D X a A X a a 3.00 C a a X Q a X 2.50 B a X a a X a A X a Q X a a vna3 vnc4 vne AST SIMULATION to 3.3 Tr (ns): 2.0 (10%-90%) vfa3 vfc4 vfe3 50 Ohm Lines oltage(m ) Page 22

33 vid3 vod3 E a X Q a X a 3.00 D X a A X a a 2.50 C a a X Q a X B a X a a X a A X a Q X a a vna3 vnc4 vne AST SIMULATION 0.3 to 3.3 vfa3 vfc4 vfe3 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 23

34 E a X Q a X a 2.20 vid3 vod3 D X a A X a a 2.10 C a a X Q a X B a X a a X a A X a Q X a a vna3 vnc4 vne BTL SIMULATION to 2.1 Tr (ns): 1.0 (10%-90%) 5.00 vfa3 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 24

35 vid3 vod3 E a X Q a X a 2.10 D X a A X a a C a a X Q a X B a X a a X a A X a Q X a a vna3 vnc4 vne BTL SIMULATION 1.0 to 2.1 vfa3 vfc4 vfe3 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 25

36 E a X Q a X a vid3 vod3 D X a A X a a C a a X Q a X B a X a a X a A X a Q X a a vna3 vnc4 vne ECL SIMULATION -1.8 to Tr (ns): 0.5 (20%-80%) 1 vfa3 vfc4 vfe3 50 Ohm Lines -1-2 oltage(m ) Page 26

37 vid3 vod3 E a X Q a X a D X a A X a a C a a X Q a X B a X a a X a A X a Q X a a vna3 vnc4 vne ECL SIMULATION to vfa3 vfc4 vfe3 Tr (ns): 1.0 (20%-80%) 50 Ohm Lines Page 27

38 E a X Q a X a 1.30 vid3 vod3 D X a A X a a C a a X Q a X B a X a a X a A X a Q X a a vna3 vnc4 vne GTL SIMULATION to 1.2 Tr (ns): 1.0 (10%-90%) 5.00 vfa3 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 28

39 vic4 vic5 voc4 voc5 E q X a X q D X Q Q X a C a X A A I X B q X Q Q X q A X a X a vnb3b4 vnd2d ECL SIMULATION to vfb3b4 vfd2d3 Tr (ns): 0.5 (20%-80%) Ohm Lines Page 29

40 E q X a X q vic4 vic5 voc4 voc5 D X Q Q X a C a X A A I X B q X Q Q X q A X a X a vnb3b4 vnd2d ECL SIMULATION to Tr (ns): 1.0 (20%-80%) 2 vfb3b4 vfd2d3 50 Ohm Lines oltage(m ) Page 30

41 vic5 voc5 E a X a Q a X 5.00 D a a a X a a C X a a Q A X 3.50 B a a X a a a A X a Q a X a vna3 vnc4 vne ACT SIMULATION 0.0 to 5.0 vfa3 vfc4 vfe4 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 31

42 E a X a Q a X 5.50 vic5 voc5 D a a a X a a 5.00 C X a a Q A X B a a X a a a 3.50 A X a Q a X a vna3 vnc4 vne ACT SIMULATION to 5.0 Tr (ns): 2.0 (10%-90%) vfa3 vfc4 vfe4 65 Ohm Lines oltage(m ) Page 32

43 vic5 voc5 E a X a Q a X 3.00 D a a a X a a 2.50 C X a a Q A X B a a X a a a A X a Q a X a vna3 vnc4 vne AST SIMULATION 0.3 to 3.3 vfa3 vfc4 vfe4 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 33

44 E a X a Q a X 3.50 vic5 voc5 D a a a X a a 3.00 C X a a Q A X 2.50 B a a X a a a A X a Q a X a vna3 vnc4 vne AST SIMULATION to 3.3 Tr (ns): 1.0 (10%-90%) vfa3 vfc4 vfe4 65 Ohm Lines oltage(m ) Page 34

45 vic5 voc5 E a X a Q a X 3.00 D a a a X a a 2.50 C X a a Q A X B a a X a a a A X a Q a X a vna3 vnc4 vne AST SIMULATION 0.3 to 3.3 vfa3 vfc4 vfe4 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 35

46 E a X a Q a X 3.50 vic5 voc5 D a a a X a a 3.00 C X a a Q A X 2.50 B a a X a a a A X a Q a X a vna3 vnc4 vne AST SIMULATION to 3.3 Tr (ns): 2.0 (10%-90%) vfa3 vfc4 vfe4 65 Ohm Lines oltage(m ) Page 36

47 vic5 voc5 E a X a Q a X 2.10 D a a a X a a C X a a Q A X B a a X a a a A X a Q a X a vna3 vnc4 vne BTL SIMULATION 1.0 to 2.1 vfa3 vfc4 vfe4 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 37

48 E a X a Q a X 2.20 vic5 voc5 D a a a X a a 2.10 C X a a Q A X B a a X a a a A X a Q a X a vna3 vnc4 vne BTL SIMULATION to 2.1 Tr (ns): 2.0 (10%-90%) vfa3 vfc4 vfe4 65 Ohm Lines oltage(m ) Page 38

49 vic5 voc5 E a X a Q a X D a a a X a a C X a a Q A X B a a X a a a A X a Q a X a vna3 vnc4 vne ECL SIMULATION -1.8 to vfa3 vfc4 vfe4 Tr (ns): 0.5 (20%-80%) Ohm Lines Page 39

50 E a X a Q a X vic5 voc5 D a a a X a a C X a a Q A X B a a X a a a A X a Q a X a vna3 vnc4 vne ECL SIMULATION to Tr (ns): 1.0 (20%-80%) 1 vfa3 vfc4 vfe4 50 Ohm Lines -1-2 oltage(m ) Page 40

51 vic5 voc5 E a X a Q a X D a a a X a a C X a a Q A X B a a X a a a A X a Q a X a vna3 vnc4 vne GTL SIMULATION 0.4 to 1.2 vfa3 vfc4 vfe4 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 41

52 E a a Q a a a 5.50 vic3 voc3 D a X a X a X C a a A Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne ACT SIMULATION to 5.0 Tr (ns): 1.0 (10%-90%) vfa4 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 42

53 vic3 voc3 E a a Q a a a 4.50 D a X a X a X C a a A Q a a 3.00 B X a X a X a 2.50 A a a a Q a a vna4 vnc4 vne ACT SIMULATION 0.0 to 5.0 vfa4 vfc4 vfe3 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 43

54 E a a Q a a a 4.00 vic3 voc3 D a X a X a X 3.50 C a a A Q a a 3.00 B X a X a X a 2.50 A a a a Q a a vna4 vnc4 vne AST SIMULATION to 3.3 Tr (ns): 1.0 (10%-90%) vfa4 vfc4 vfe3 50 Ohm Lines oltage(m ) Page 44

55 vic3 voc3 E a a Q a a a 3.00 D a X a X a X 2.50 C a a A Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne AST SIMULATION 0.3 to 3.3 vfa4 vfc4 vfe3 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 45

56 E a a Q a a a 3.50 vic3 voc3 D a X a X a X 3.00 C a a A Q a a 2.50 B X a X a X a A a a a Q a a vna4 vnc4 vne AST SIMULATION to 3.3 Tr (ns): 2.0 (10%-90%) vfa4 vfc4 vfe3 50 Ohm Lines oltage(m ) Page 46

57 vic3 voc3 E a a Q a a a 3.00 D a X a X a X 2.50 C a a A Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne AST SIMULATION 0.3 to 3.3 vfa4 vfc4 vfe3 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 47

58 E a a Q a a a 2.20 vic3 voc3 D a X a X a X 2.10 C a a A Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne BTL SIMULATION to 2.1 Tr (ns): 1.0 (10%-90%) vfa4 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 48

59 vic3 voc3 E a a Q a a a 2.10 D a X a X a X C a a A Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne BTL SIMULATION 1.0 to 2.1 vfa4 vfc4 vfe3 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 49

60 E a a Q a a a vic3 voc3 D a X a X a X C a a A Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne ECL SIMULATION to -0.8 Tr (ns): 0.5 (20%-80%) vfa4 vfc4 vfe3 50 Ohm Lines oltage(m ) Page 50

61 vic3 voc3 E a a Q a a a D a X a X a X C a a A Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne ECL SIMULATION to -0.8 vfa4 vfc4 vfe Page 51 Tr (ns): 1.0 (20%-80%) 50 Ohm Lines

62 E a a Q a a a 1.30 vic3 voc3 D a X a X a X C a a A Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne GTL SIMULATION to 1.2 Tr (ns): 1.0 (10%-90%) vfa4 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 52

63 vic3 voc3 E a X Q X a X D a a a a a a C a a A Q a a B a a a a a a A X a X Q X a vna4 vnc4 vne ACT SIMULATION 0.0 to 5.0 Tr (ns): 1.0 (10%-90%) vfa4 vfc4 vfe Ohm Lines Page 53

64 E a X Q X a X 5.50 vic3 voc3 D a a a a a a C a a A Q a a B a a a a a a A X a X Q X a vna4 vnc4 vne ACT SIMULATION to 5.0 Tr (ns): 2.0 (10%-90%) vfa4 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 54

65 vic3 voc3 E a X Q X a X 3.50 D a a a a a a 3.00 C a a A Q a a 2.50 B a a a a a a A X a X Q X a vna4 vnc4 vne AST SIMULATION 0.3 to 3.3 vfa4 vfc4 vfe3 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 55

66 E a X Q X a X 4.00 vic3 voc3 D a a a a a a 3.50 C a a A Q a a 3.00 B a a a a a a 2.50 A X a X Q X a vna4 vnc4 vne AST SIMULATION to 3.3 Tr (ns): 1.0 (10%-90%) vfa4 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 56

67 vic3 voc3 E a X Q X a X 3.00 D a a a a a a 2.50 C a a A Q a a B a a a a a a A X a X Q X a 0.50 vna4 vnc4 vne AST SIMULATION to 3.3 vfa4 vfc4 vfe3 Tr (ns): 2.0 (10%-90%) Ohm Lines Page 57

68 E a X Q X a X 3.50 vic3 voc3 D a a a a a a 3.00 C a a A Q a a 2.50 B a a a a a a A X a X Q X a vna4 vnc4 vne AST SIMULATION to 3.3 Tr (ns): 2.0 (10%-90%) vfa4 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 58

69 vic3 voc3 E a X Q X a X 2.10 D a a a a a a C a a A Q a a B a a a a a a A X a X Q X a vna4 vnc4 vne BTL SIMULATION 1.0 to 2.1 vfa4 vfc4 vfe3 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 59

70 E a X Q X a X 2.20 vic3 voc3 D a a a a a a 2.10 C a a A Q a a B a a a a a a A X a X Q X a vna4 vnc4 vne BTL SIMULATION to 2.1 Tr (ns): 2.0 (10%-90%) vfa4 vfc4 vfe3 65 Ohm Lines oltage(m ) Page 60

71 vic3 voc3 E a X Q X a X D a a a a a a C a a A Q a a - B a a a a a a A X a X Q X a vna4 vnc4 vne ECL SIMULATION -1.8 to vfa4 vfc4 vfe3 Tr (ns): 0.5 (20%-80%) Ohm Lines Page 61

72 E a X Q X a X vic3 voc3 D a a a a a a C a a A Q a a B a a a a a a A X a X Q X a vna4 vnc4 vne ECL SIMULATION to Tr (ns): 1.0 (20%-80%) 2 vfa4 vfc4 vfe3 50 Ohm Lines -2-4 oltage(m ) Page 62

73 vic3 voc3 E a X Q X a X D a a a a a a C a a A Q a a B a a a a a a A X a X Q X a vna4 vnc4 vne GTL SIMULATION 0.4 to 1.2 vfa4 vfc4 vfe3 Tr (ns): 1.0 (10%-90%) Ohm Lines Page 63

74 E a Q Q a vid3 vid4 vod3 vod4 D a A A I a C X X X X X X B a a a A a Q Q a vna3a4 vne4e ECL SIMULATION to Tr (ns): 0.5 (20%-80%) 9 vfa3a4 vfe4e3 50 Ohm Lines oltage(m ) Page 64

75 vid3 vid4 vod3 vod4 E a Q Q a D a A A I a C X X X X X X B a a a A a Q Q a vna3a4 vne4e ECL SIMULATION to vfa3a4 vfe4e3 Tr (ns): 1.0 (20%-80%) Ohm Lines Page 65

76 E Q A a vie4 vid4 voe4 vod4 D a Q a A I a C X X X X X X B a a Q a A a a Q vna5b5 vne2d ECL SIMULATION to Tr (ns): 0.5 (20%-80%) 7 vfa5b5 vfe2d2 50 Ohm Lines oltage(m ) Page 66

77 vie4 vid4 voe4 vod4 E Q A a D a Q a A I a C X X X X X X B a a Q a A a a Q vna5b5 vne2d ECL SIMULATION to vfa5b5 vfe2d2 Tr (ns): 1.0 (20%-80%) 3 50 Ohm Lines Page 67

78 E a X a X Q X vic3 vib3 voc3 vob3 D Q a Q a C a Q A a B a A I a a A X X X vnd2c2 vne5d ECL SIMULATION to Tr (ns): 0.5 (20%-80%) 5 vfd2c2 vfe5d5 50 Ohm Lines 4 3 oltage(m ) Page 68

79 vic3 vib3 voc3 vob3 E a X a X Q X D Q a Q a C a Q A a B a A I a a A X X X vnd2c2 vne5d ECL SIMULATION to vfd2c2 vfe5d5 Tr (ns): 1.0 (20%-80%) Ohm Lines Page 69

80 E a a a Q a a 5.50 vid3 vod3 D a a A a a X C a a a Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne HCMOS SIMULATION to Tr (ns): 4.0 (10%-90%) vfa4 vfc4 vfe4 65 Ohm Lines oltage(m ) Page 70

81 vid3 vod3 E a a a Q a a D a a A a a X C a a a Q a a B X a X a X a A a a a Q a a vna4 vnc4 vne HCMOS SIMULATION to 5.0 vfa4 vfc4 vfe4 Tr (ns): 6.0 (10%-90%) Ohm Lines Page 71

82 AMP-AMP-04/1998