DLA LAND AND MARITIME COLUMBUS, OHIO

Transcription

1 REVISIONS LTR DESCRIPTION DTE PPROVED Prepared in accordance with SME Y14.24 Vendor item drawing REV PGE REV PGE REV STTUS OF PGES REV PGE PMIC N/ PREPRED BY RICK OFFICER DL LND ND MRITIME Original date of drawing YY-MM-DD CHECKED BY RJESH PITHDI PPROVED BY CHRLES F. SFFLE TITLE MICROCIRCUIT, LINER, LOW POWER OUTPUT MPLIFIERS, MONOLITHIC SILICON CODE IDENT. NO. REV PGE 1 OF 22 MSC N/ 5962-V057-13

2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance low power output amplifiers microcircuit, with an operating temperature range of -55 C to +125 C. 1.2 Vendor Item Drawing dministrative Control Number. The manufacturer s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: (s) X E Drawing Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) Generic Circuit function 01 D EP Single low power output amplifier 02 D EP Dual low power output amplifier Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 6 MO-178-B Plastic small outline package Y 10 MO-187-B Plastic small outline package Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator B C D E Z Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other DL LND ND MRITIME REV PGE 2

3 1.3 bsolute maximum ratings. 1/ Supply voltage (V S ) V Common mode input voltage (V CM )... -V S 0.7 V to +V S V Differential input voltage... ±0.7 V Power dissipation (P D ) : mw 2/ mw 2/ Storage temperature range (T STG ) C to +125 C Lead temperature (soldering 10 seconds) C Junction temperature range (T J ) C 1.4 Recommended operating conditions. 3/ Supply voltage range (V S ) V to +5 V Operating free-air temperature range (T ) C to +125 C 1.5 Thermal characteristics. Thermal resistance, junction to ambient (θ J ): X package C/W Y package C/W 1/ Stresses beyond those listed under absolute maximum rating may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ For device 01, power dissipation (P D ) = ( T J max T ) / θ J = ( ) / 150 = W. For device 02, power dissipation (P D ) = ( T J max T ) / θ J = ( ) / 210 = W. 3/ Use of this product beyond the manufacturers design rules or stated parameters is done at the user s risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. DL LND ND MRITIME REV PGE 3

4 2. PPLICBLE DOCUMENTS JEDEC Solid State Technology ssociation JEDEC PUB 95 Registered and Standard Outlines for Semiconductor s (pplications for copies should be addressed to the Electronic Industries lliance, 2500 Wilson Boulevard, rlington, V or online at 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer s part number as shown in 6.3 herein and as follows:. Manufacturer s name, CGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 container. The unit container shall be marked with the manufacturer s part number and with items and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams Case outlines. The case outlines shall be as shown in and figure Terminal connections. The terminal connections shall be as shown in figure 2. DL LND ND MRITIME REV PGE 4

5 TBLE I. Electrical performance characteristics. 1/ 2/ Test Symbol Conditions V S = ±5 V, G = +1, R L = 1 kω to ground, T Dynamic performance section. -3 db bandwidth BW G = +1, V OUT = 0.02 V PP +25 C 01, typical MHz Bandwidth for 0.1 db flatness G = +1, V OUT = 2 V PP G = +2, V OUT = 0.02 V PP G = +2, V OUT = 2 V PP, R L = 100 Ω 30 typical 90 typical +25 C 01, 02 7 typical MHz Slew rate SR G = +2, V OUT = 6 V step +25 C 01, typical V/µs Settling time to 0.1% t S G = +2, V OUT = 2 V step +25 C 01, typical ns Settling time to 0.01% t S G = +2, V OUT = 2 V step +25 C 01, typical ns Noise / harmonic performance section. Harmonic distortion SFDR V OUT = 2 V PP, f C = 100 khz +25 C 01, typical dbc V OUT = 2 V PP, f C = 1 MHz V OUT = 2 V PP, f C = 2 MHz V OUT = 2 V PP, f C = 5 MHz -93 typical -80 typical -61 typical Input voltage noise f = 10 Hz +25 C 01, typical nv / f = 100 khz 1 typical Hz Input current noise f = 10 Hz +25 C 01, typical p / f = 100 khz 2.8 typical Hz 0.1 Hz to 10 Hz noise G = +101, R F = 1 kω, R G = 10 Ω +25 C 01, typical nv PP See footnotes at end of table. DL LND ND MRITIME REV PGE 5

6 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions V S = ±5 V, G = +1, R L = 1 kω to ground, T DC performance section. Input offset voltage V IO +25 C 01, µv -28 typical Input offset voltage drift V IO +25 C 01, typical µv / C Input bias current I IB +25 C 01, µ -11 typical Input bias current drift I IB +25 C 01, 02 3 typical n / C Input bias offset current I IBO +25 C 01, µ typical Open loop gain OL V OUT = -4 V to +4 V +25 C 01, db Input characteristics section. 110 typical Input resistance, common mode Input resistance, differential Input capacitance, common mode Input capacitance, differential R IN +25 C 01, typical MΩ R IN +25 C 01, typical kω C IN +25 C 01, 02 3 typical pf C IN +25 C 01, typical pf Input common mode voltage range V INR +25 C 01, to +4.1 typical V Common mode rejection ratio CMRR V CM = -2 V to +2 V +25 C 01, db -120 typical See footnotes at end of table. DL LND ND MRITIME REV PGE 6

7 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions V S = ±5 V, G = +1, R L = 1 kω to ground, T Output characteristics section. Output overdrive recovery time Positive output voltage swing V IN = ±5 V, G = C 01, typical ns R L = 1 kω +25 C 01, V 4.96 typical R L = 100 Ω typical Negative output voltage swing R L = 1 kω +25 C 01, V typical R L = 100 Ω typical Output current I OUT SFDR = -45 dbc +25 C 01, typical m Short circuit current I SC Sinking / sourcing +25 C 01, typical m Capacitive load drive 30% overshoot, G = C 01, typical pf Power supply section. Operating range +25 C 01, 02 3 to 10 typical V Quiescent current per amplifier +25 C 01, m 3.0 typical DISBLE = -5 V typical Power supply rejection ratio +PSRR +V S = 4 V to 6 V, -V S = -5 V +25 C 01, db -125 typical -PSRR +V S = 5 V, -V S = -4 V to -6 V typical See footnotes at end of table. DL LND ND MRITIME REV PGE 7

8 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions V S = ±5 V, G = +1, R L = 1 kω to ground, T DISBLE pin section. DISBLE voltage Enabled +25 C 01, 02 >+V S 0.5 typical V Disabled <+V S 2 typical Input current, enabled I IN DISBLE = +5 V +25 C 01, typical µ Input current, disabled I IN DISBLE = -5 V +25 C 01, typical µ Switching speed, enabled Switching speed, disabled +25 C 01, typical µs +25 C 01, typical µs See footnotes at end of table. DL LND ND MRITIME REV PGE 8

9 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions 2/ V S = +5 V, G = +1, R L = 1 kω to midsupply, T Dynamic performance section. -3 db bandwidth BW G = +1, V OUT = 0.02 V PP +25 C 01, typical MHz Bandwidth for 0.1 db flatness G = +1, V OUT = 2 V PP G = +2, V OUT = 0.02 V PP G = +2, V OUT = 2 V PP, R L = 100 Ω 30 typical 90 typical +25 C 01, 02 7 typical MHz Slew rate SR G = +2, V OUT = 3 V step +25 C 01, typical V/µs Settling time to 0.1% t S G = +2, V OUT = 2 V step +25 C 01, typical ns Settling time to 0.01% t S G = +2, V OUT = 2 V step +25 C 01, typical ns Noise / harmonic performance section. Harmonic distortion SFDR V OUT = 2 V PP, f C = 100 khz +25 C 01, typical dbc V OUT = 2 V PP, f C = 1 MHz V OUT = 2 V PP, f C = 2 MHz V OUT = 2 V PP, f C = 5 MHz -93 typical -80 typical -61 typical Input voltage noise f = 10 Hz +25 C 01, typical nv / f = 100 khz 1 typical Hz Input current noise f = 10 Hz +25 C 01, typical p / f = 100 khz 2.8 typical Hz 0.1 Hz to 10 Hz noise G = +101, R F = 1 kω, R G = 10 Ω +25 C 01, typical nv PP See footnotes at end of table. DL LND ND MRITIME REV PGE 9

10 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions 2/ V S = +5 V, G = +1, R L = 1 kω to midsupply, T DC performance section. Input offset voltage V IO +25 C 01, µv -30 typical Input offset voltage drift V IO +25 C 01, typical µv / C Input bias current I IB +25 C 01, µ -11 typical Input bias current drift I IB +25 C 01, 02 3 typical n / C Input bias offset current I IBO +25 C 01, µ typical Open loop gain OL V OUT = 0.5 V to 4.5 V +25 C 01, db Input characteristics section. 110 typical Input resistance, common mode Input resistance, differential Input capacitance, common mode Input capacitance, differential R IN +25 C 01, typical MΩ R IN +25 C 01, typical kω C IN +25 C 01, 02 3 typical pf C IN +25 C 01, typical pf Input common mode voltage range V INR +25 C 01, to 4.1 typical V Common mode rejection ratio CMRR V CM = 1 V to 4 V +25 C 01, db -118 typical See footnotes at end of table. DL LND ND MRITIME REV PGE 10

11 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions 2/ V S = +5 V, G = +1, R L = 1 kω to midsupply, T Output characteristics section. Output overdrive recovery time Positive output voltage swing V IN = 0 V to 5 V, G = C 01, typical ns R L = 1 kω +25 C 01, V 4.98 typical R L = 100 Ω typical Negative output voltage swing R L = 1 kω +25 C 01, V typical R L = 100 Ω typical Output current I OUT SFDR = -45 dbc +25 C 01, typical m Short circuit current I SC Sinking / sourcing +25 C 01, typical m Capacitive load drive 30% overshoot, G = C 01, typical pf Power supply section. Operating range +25 C 01, 02 3 to 10 typical V Quiescent current per amplifier +25 C 01, m 2.8 typical DISBLE = 0 V typical Power supply rejection ratio +PSRR +V S = 4.5 V to 5.5 V, -V S = 0 V +25 C 01, db -123 typical -PSRR +V S = 5 V, -V S = -0.5 V to +0.5 V typical See footnotes at end of table. DL LND ND MRITIME REV PGE 11

12 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions 2/ V S = +5 V, G = +1, R L = 1 kω to midsupply, T DISBLE pin section. DISBLE voltage Enabled +25 C 01, 02 >+V S 0.5 typical V Disabled <+V S 2 typical Input current, enabled I IN DISBLE = +5 V +25 C 01, typical µ Input current, disabled I IN DISBLE = 0 V +25 C 01, typical µ Switching speed, enabled Switching speed, disabled +25 C 01, typical µs +25 C 01, typical µs See footnotes at end of table. DL LND ND MRITIME REV PGE 12

13 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions 2/ V S = +3 V, G = +1, R L = 1 kω to midsupply, T Dynamic performance section. -3 db bandwidth BW G = +1, V OUT = 0.02 V PP +25 C 01, typical MHz Bandwidth for 0.1 db flatness G = -1, V OUT = 1 V PP G = +2, V OUT = 0.02 V PP G = +2, V OUT = 2 V PP, R L = 100 Ω 45 typical 90 typical +25 C 01, 02 7 typical MHz Slew rate SR G = +2, V OUT = 1 V step +25 C 01, typical V/µs Settling time to 0.1% t S G = +2, V OUT = 2 V step +25 C 01, typical ns Settling time to 0.01% t S G = +2, V OUT = 2 V step +25 C 01, typical ns Noise / harmonic performance section. Harmonic distortion SFDR V OUT = 2 V PP, f C = 100 khz, G = +2 V OUT = 1 V PP, f C = 1 MHz, G = -1 V OUT = 1 V PP, f C = 2 MHz, G = -1 V OUT = 1 V PP, f C = 5 MHz, G = C 01, typical dbc -84 typical -77 typical -60 typical Input voltage noise f = 10 Hz +25 C 01, typical nv / f = 100 khz 1 typical Hz Input current noise f = 10 Hz +25 C 01, typical p / f = 100 khz 2.8 typical Hz 0.1 Hz to 10 Hz noise G = +101, R F = 1 kω, R G = 10 Ω +25 C 01, typical nv PP See footnotes at end of table. DL LND ND MRITIME REV PGE 13

14 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions 2/ V S = +3 V, G = +1, R L = 1 kω to midsupply, T DC performance section. Input offset voltage V IO +25 C 01, µv -30 typical Input offset voltage drift V IO +25 C 01, typical µv / C Input bias current I IB +25 C 01, µ -11 typical Input bias current drift I IB +25 C 01, 02 3 typical n / C Input bias offset current I IBO +25 C 01, µ typical Open loop gain OL V OUT = 0.5 V to 2.5 V +25 C 01, db Input characteristics section. 108 typical Input resistance, common mode Input resistance, differential Input capacitance, common mode Input capacitance, differential Input common mode voltage range Common mode rejection ratio R IN +25 C 01, typical MΩ R IN +25 C 01, typical kω C IN +25 C 01, 02 3 typical pf C IN +25 C 01, typical pf V INR +25 C 01, to 2.1 typical V CMRR V CM = 1.1 V to 1.9 V +25 C 01, db -124 typical See footnotes at end of table. DL LND ND MRITIME REV PGE 14

15 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions 2/ V S = +3 V, G = +1, R L = 1 kω to midsupply, T Output characteristics section. Output overdrive recovery time Positive output voltage swing V IN = 0 V to 3 V, G = C 01, typical ns R L = 1 kω +25 C 01, V 2.97 typical R L = 100 Ω typical Negative output voltage swing R L = 1 kω +25 C 01, V 0.01 typical R L = 100 Ω typical Output current I OUT SFDR = -45 dbc +25 C 01, typical m Short circuit current I SC Sinking / sourcing +25 C 01, typical m Capacitive load drive 30% overshoot, G = C 01, typical pf Power supply section. Operating range +25 C 01, 02 3 to 10 typical V Quiescent current per amplifier +25 C 01, m 2.7 typical DISBLE = 0 V typical Power supply rejection ratio +PSRR +V S = 2.7 V to 3.7 V, -V S = 0 V +25 C 01, db -121 typical -PSRR +V S = 3 V, -V S = -0.3 V to +0.7 V typical See footnotes at end of table. DL LND ND MRITIME REV PGE 15

16 TBLE I. Electrical performance characteristics Continued. 1/ 2/ Test Symbol Conditions 2/ V S = +3 V, G = +1, R L = 1 kω to midsupply, T DISBLE pin section. DISBLE voltage Enabled +25 C 01, 02 >+V S 0.5 typical V Disabled <+V S + 2 typical Input current, enabled I IN DISBLE = +3 V +25 C 01, typical µ Input current, disabled I IN DISBLE = 0 V +25 C 01, typical µ Switching speed, enabled Switching speed, disabled +25 C 01, typical µs +25 C 01, typical µs 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Products supplied to this drawing have been characterized across the military temperature range of -55 C to +125 C but, are only production tested at +25 C. DL LND ND MRITIME REV PGE 16

17 Case X FIGURE 1. Case outlines. DL LND ND MRITIME REV PGE 17

18 Case X continued. Dimensions Symbol Inches Millimeters Med Med b c D E E e BSC 0.95 BSC L L BSC 0.60 BSC NOTES: 1. Controlling dimensions are millimeter, inch dimensions are given for reference only. 2. Falls within reference to JEDEC MO-178-B. FIGURE 1. Case outlines - continued. DL LND ND MRITIME REV PGE 18

19 Case Y FIGURE 1. Case outlines - Continued. DL LND ND MRITIME REV PGE 19

20 Case Y continued. Dimensions Symbol Inches Millimeters Med Med b c D E E e BSC 0.50 BSC L NOTES: 1. Controlling dimensions are millimeter, inch dimensions are given for reference only. 2. Falls within reference to JEDEC MO-187-B. FIGURE 1. Case outlines - Continued. DL LND ND MRITIME REV PGE 20

21 01 Case outline X Terminal number Terminal symbol Description 1 OUT Output. 2 -V S Negative supply. 3 +IN Noninverting input. 4 -IN Inverting input. 5 DISBLE Disable. 6 +V S Positive supply. 02 Case outline Y Terminal number Terminal symbol Description 1 OUT1 Output IN1 Inverting input IN1 Noninverting input V S Negative supply. 5 DISBLE1 Disable 1. 6 DISBLE2 Disable IN2 Noninverting input IN2 Inverting input 2. 9 OUT2 Output V S Positive supply. FIGURE 2. Terminal connections. DL LND ND MRITIME REV PGE 21

22 4. VERIFICTION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPRTION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. s are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DL Land and Maritime maintains an online database of all current sources of supply at Vendor item drawing administrative control number 1/ manufacturer CGE code Vendor part number -01XE D4897-1SRJZ-EPR7-02YE D4897-2TRMZ-EP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CGE code Source of supply nalog s Route 1 Industrial Park P.O. Box 9106 Norwood, M Point of contact: Raheen Business Park Limerick, Ireland DL LND ND MRITIME REV PGE 22