HIGH POWER AUDIO AMPLIFIERS WITH SHORT CIRCUIT PROTECTION

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1 AN85 Application Note HIGH POWER AUDIO AMPLIFIERS WITH SHORT CIRCUIT PROTECTION Prepared by Richard G. Ruehs Applications Engineering This application note describes a recommended circuit approach for highperformance audio amplifiers in the 5-W to -W rms power range. Circuitry is included which enables the amplifier to operate safely under any load condition including a continuous short. MOTOROLA Semiconductor Products inc. S MOTOROLA INC. 1985

2 HIGH POWER AUDIO AMPLIFIERS WITH SHORT CIRCUIT PROTECTION INTRODUCTION The deelopment of Motorola's 200-W PNP silicon power transistors now allows the economical design of full complementary direct-coupled audio amplifiers capable of deliering watts of rms power into an 8-ohm load at less than 0.2% distortion. The circuit approach suggested in this paper allows the designer to make optimum use of economy transistors in amplifiers that will operate safely under any usable load condition, including a short. Tables are included which proide the designer with the necessary information to design 5-, 50-, 60-, 75-, and -watt amplifiers at either or 8 ohm load impedance. Detailed design information is included in the appendix for those who wish to design amplifiers for power outputs other than those shown. CIRCUIT DESCRIPTION The schematic diagram shown in Figure 1 is the recommended approach for the full-complementary amplifier with short-circuit protection. TransistorsQ1,Q2,Q,Q6, Q7, Q8,Q9, and Q10,along with their associated components, comprise the standard full-complementary circuit. Transistors Ql and Q2 are used in a differential amplifier configuration which, when used with a split power supply, proide a conenient means for setting the dc oltage leel at the output at zero, enabling the amplifier to be direct coupled to the speaker. Resistor Rf proides % dc feedback from the output to the input, for excellent dc stability. The resistance ratio of Rf to Rl determines the closed-loop ac-oltage gain of the amplifier. Transistor Q functions as a highgain, common-emitter drier. Since the output configura- NOTE 1: All of the resistors with the alues shown are ±10% tolerance, except where * indicates ±5*. 2: LI Is #20 wire close-wound for the full length of resistor, R16. FIGURE 1 - Schematic Diagram of 5- to -W Amplifiers. Part* Values are Shown in Tables 1, 2 and. Motorola reseres the right to make changes without further notice to any products herein to improe reliability, function or design. Motorola does not a s s u r " e a r y liability arising out of the application or use of any product or circuit described Herein; neither does it coney any license under its patent rights nor the rights of others. Motorola and M are registered trademarks of Motorola. Inc. Motorola. Inc. is an Equal Employment Opportunity/ Affirmatie Action Employer. 2

3 % ot Full Rated Output Power Relatie Power Out (d8) Normalized Load Impedance (1.0 is Nominal Loadl FIGURE 2 Output Power ersus Load Impedance tion seres only as an emitter follower, this transistor must be capable of handling the full-load oltage swing. Transistor Q6 seres as a constant-current source for the dc bias current, which flows through. Q and the dual bias diode, D2. This transistor, Q6, also eliminates the need for the large bootstrap electrolytic capacitor commonly used to proide ac current drie to the lower half of the output circuit during negatie peak signal excursions. Transistors Q7 and Q8 form a compound pair which function as an emitter follower with high current gain and unity oltage gain for the positie portion of the output signal. Q9 and Q10 similarly function for the negatie portion of the output signal. The zener diode, Dl, is used to set the dc current through the differential amplifier and proide ac hum rejection from the negatie power supply. SHORT CIRCUIT PROTECTION Semiconductors Q, Q5, Qll, Q12, D, and D, along with their associated resistors, comprise the short-circuit Frequency (khz) FIGURE - Power Bandwidth 10 db is Max Rated Power Output) protection network. The resistors R8, RIO, Rll, and R12, form a oltagesumming network. The oltage appearing at the base of transistor Ql 1 is thus determined by the collector current of Q8 flowing through resistor R6 and the oltage appearing from +Vfj to the output. This summing network, since it detects both the oltage and current of Q8, effectiely senses the peak power dissipation occurring in this transistor. At a predetermined power leel in transistor Q8, the summing network can be chosen so that transistor Ql I conducts sufficiently to turn on transistor Q. Transistor Q then steals the drie current from the base of transistor Q, and hence limits the power dissipated in Q8. Diode D is used to preent transistor Qll from turning on, under normal load conditions, when the output signal swings negatie. Resistors R9, R1,RI, R15,along with transistors Q12, Q5, and diode D, similarly limit the power dissipation occurring in the output transistor Ql 0. TABLE 1 Semiconductor Complement Differential Output Drier Pre-Drier Amplifier Output Load Transistor* Transistors Transistors Transistors Power 1 mpedance NPN PIMP NPN PNP NPN PNP (Watti-rms) (Ohms) IQ10) (Q8) (Q7I IQ9) (Q6) (Q) (Q1 & Q2i N5877 2N5875 MPSU05 MPSU55 MPSA05 MPSA55 MD8O01 S MJE2801T MJE2901T MPSU05 MPSU55 MPSA06 MPSAS6 MD8O01 2N502 2N99 MPSU05 MPSU55 MPSA06 MPSAS6 MD8O01 8 2N5878 2N5876 MPSU06 MPSU56 MPSA06 MPSA56 MDSO02 2N502 2N99 MPSU06 MPSU56 MPSA06 MPS A 56 MD8O01 8 2N587B 2N5876 MPSU06 MPSU56 NIPSA06 MPSA56 MD8O02 MJ802 MJ502 MPSU06 MPSU56 MPSA06 MPSA56 MDBO01 a MJS02 MJ502 MM0O7 2NS679 MM007 MM007 M0800 MJS02 MJ502 MPSU06 MPSU56 MPSU06 MPSU56 M08002 MJ802 MJ502 MM007 2N5679 MM007 MM007 MD800 The following semiconductors are used at ail of the power leels: Ql 1 - MPSL N520A or 1N968A (See Note 1} Q5 - MPSA20 D2 MZ261 Q12 - MPSL51 D & D 1N526B (See Note 1 Q - MPSA70 NOTE 1: For a low-cost zener diode, an emitter-base junction of a silicon transistor can be substituted. A transistor similar to the MPS6512 can be used for the 7.5 V zener.

4 TABLE 2 Resistor Values and Power Supply Voltages Output Load Power Impedance R1 R2 R R R5 R6, R7 R8, R9 R10, R15 R11. R1 R12, R1 (Watts-rms) (Ohms! ±5% ±10% ±5% ±5% ±5% ±5% ±10% ±5% + 5% ±5% k.9 k. k.7 k.9 k 5.6 k 18 k 22 k 22 k 27 k 22 k k ISO * 0. 0.* k.0 k. k.9 k.9 k.7 k 1.5 k 1.5 k 1.5 k cc ±21 V ±27 V ±25 V + 2 V + 27 V ±6 V k 27 k k 1.8 k 70 ±0 V a k k ISO k 1.5 k V k.2 k k S k k k 9.1 k 2.2 k 1. k ± V + 5 V NOTE; All of the aboe resistor alues are in ohms and are 1/2 W except for RG and R7. * R6 and R7 are 5 W resistors except where * indicates 2 W. AMPLIFIER OUTPUT LOAD AND TRANSISTOR POWER DISSIPATION CONSIDERATIONS High-fidelity speaker systems can appear capacitie or inductie as well as resistie. The current and oltage appearing in the amplifier will thus be out of phase when the load appears reactie. Ealuation of seeral speaker systems showed that nearly 60 of phase shift can occur between the oltage and current. At 60 phase shift, 1/2 Vcc and the peak load current can appear simultaneously at the output transistor, or VfJC and 1/2 the peak load current can appear, depending on whether the load is capacitie or inductie. Since the short-circuit-protection network must not interfere with normal operating load conditions, the minimum peak power leel to which the short-circuit dissipation can be limited is the product of the peak current and oltage appearing at the output transistor under the worst-case allowable phase shift. This means that if we want to allow normal operation into a ±60 reactie load, our short-circuit power dissipation will be determined by the following equation: CCxIpeak PpD(short circuit) = ~ - ( ] ) where Ppo is the peak dissipation for each output transistor; it is also the total aerage power dissipation for the amplifier. The aerage power dissipation of each transistor is expressed by the equation: l/2v C Cxl p e a k n, U PAD(short circuit) = ^ The worst-case aerage power dissipation in drier transistors Q7 and Q9 is the power dissipation expressed in Equation 2 diided by the current gain of the output tran- TABLE Transistor Heat Sink Requirements Minimum Heat Sinking Required for Safe Operation Shunted Load at 50 C Ambient Temperature Under Output Output Load Transistor Transistor Power 1 mpedanca Heat Sink (0 C A) Heat Sink (9 C A) (Watts-rms) (Ohms) (See Note 1) (See Note 2) Drier a 8.2 C/W 2. C/W.0 C/W 2. C/W 2.5 C/W 2.0 C/W None None 60 C/W 60 C/W 60 C/W 60 C/W 1.6 C/W 5 C/W 1.6 C7W 70 C/W* 1.0 C/W 20 C/W C/W 50 C/W" NOTE 1: All of the output transistors are in TO- packages with the exception of the MJE2801/2901 (5 W/Sfll, which are in the Case 90 Thermopadt plastic package. 2: All of the drier transistors are in the plastic Uniwattt package with the exception of those marked *, which are metal cased TO-5. ^Trademark of Motorola Inc.

5 aistor. Because of the nature of the short-circuit-protection network, the minimum 1-second safe-operating-area requirement for the output transistor occurs at VQQ and is the same as the peak dissipation as determined by Equation 1. The maximum thermal resistance, and consequently the minimum power dissipation rating, required for each output transistor is found by the following equations PERFORMANCE All of the amplifiers listed in Tables 1 and 2 will perform typically us shown as follows: Output Power: Each amplifier will delier its full rated rms output power into the nominal load impedance proiding the power supply has adequate regulation. Figure 2 shows the power output ersus load impedance. THD 1%) Full Rated Output Power 1/ W Output Power Input Sensitiity: 1 V R M S into 10 kcl for full rated output power. Frequency Response: Less than -db rolloff from 10 Hz to khz referenced to 1 khz. Power Bandwidth: Full rated output power ±1/2 db from 20 Hz to 20 khz. (See Figure ) Total Harmonic Distortion: Less than 0.2% at any power leel between mw and full rated output and at any frequency between 20 Hz and 20 khz. (See Figure ) Intermodulation Distortion: Less than 0.2% at any power leel from mw to full rated output. (60 Hz and 7 khz mixed to 1) FIGURE - Total Harmonic Distortion ersus Frequency at 1/ W and Frequency (khz) Full-Rated Output into Nominal Load Impedance Tj( m a x)-t A - d C A x PAD 0JC(max) = - - ^ D Damping Factor: Oer 150 at any frequency from 20 Hz to 20 khz. Square Wae Response: (See Figure 5) Short Circuit Power Dissipation in Each Output Transistor: (See Figure 6) where Tj( m ax) is the maximum junction temperature rating of the deice, T\ is the maximum ambient temperature, and 50 Hz Square Wae Response + 10 V 0 V -10 V #CA is the thermal resistance of the heat sink including the mica insulating washer, if used. 1 khz Square Wae Response + 10 V 0 V -10 V The minimum power dissipation rating of the transistor is found by _ Tj(max) PDM = E~r~~" 0JC(max) COMPONENT VALUES Table 1 lists the specific resistor alues for - and 8- ohm amplifiers at S-, 50-, 60-, 75-, and -watt power leels. Table 2 lists the semiconductors required for the same amplifiers. The numbers gien in this chart are the nearest standard parts aailable that wilt meet or exceed the minimum specifications required for the particular amplifier. Where large amplifier production quantities are inoled, the transistor manufacturer should be consulted for the optimum transistor specifications to realize maximum cost saings. Table lists the minimum heat-sink requirements for the amplifier transistors. 10 khz Square Wae Response Design Example + 10 V O V -10 V FIGUFiE S Square Wae Response An electronics company has a requirement for a directcoupled audio amplifier with the following specifications: Power Output: 60 watts rms into 8 with normal operation allowed into ±60 reactie load. Short-Circuit Operation: Circuit has to operate safely at 50 C ambient temperature with the output shorted. Total Distortion: Less than 0.2%. 5

6 Input Sensitiity: 1 V r m s (1. Vp ea k) input for 60 watts into 8 SI. The designer chooses a full-complementary circuit, similar to the circuit of Figure 1, due to its excellent ac and dc performance. The circuit alues are determined as follows: peak input oltage Rl: R] - F xrf. peak load oltage Output Transistor Power Dissipation under Shorted Load Conditions and 10% High Line Voltage (Watts) Rf = 10 k 2. The rms load oltage can be found by V r ms 2 _ rmb S i n c g p _ 6 Q V r r n s = V r 60~8 = 21 V,and V p eak= 1xV r m s = 1 V. I- Therefore Rl = X 10 k 1 = 50 n. Amplifier Nominal Rated Output Power (Watts-rims) FIGURE 6 Output Transistor Power Dissipation under Shorted Load Conditions ersus Amplifier Nominal Rated Output Power The differential amplifier must be biased for 2 ma through the emitter leg with 680 SI in the collector circuit, 2 ma is sufficient for good zener diode regulation R 2 ( m a x ) = otoo- = 6.5 ksl The nearest standard alue is 5.6 ksl, R, R, R5: The oltage at the base of Q6 with respect to the negatie supply oltage should be kept under 2.0 V to preent premature clipping of the negatie portion of the output signal. R Therefore, if x Vrr is set equal to 1. V, and R + R ^ letting R= U,, - x 6 = 1., and (R+I.2k) R = ksl (Nearest standard alue) R N O W 'R-TR- x V CC = ktt^k X 6 = t V R5(max) = ' *'"^(06) ^ Max dc Bias Current of Q + 1 ma 1 ma extra current allows for resistor tolerances. Max dc Bias Current = Jpeak load is Ipeak= R l found by: n peak load FE min(q9) * hpe min(q 10) Choosing the nearest 5% alue which gies 1 -V sensitiity or better: Rl =0ft. VCC V CC = peak load + V R6 + saturation and oltagedrop losses. The sum of VRg and the saturation and oltage drop losses is approximately 5 V for this amplifier. Vcc = 1 +5 = 6V VCC - Vni R2: R2(max) =, Ibias(OJandQ2) + ldl 1 ~ 8 =.9 A R5(max) = -, T = = 125 SI.,9 + l m A.9 ma IOOO I M A Choosing the nearest standard alue, R5 = 120 SI R6, R7: Due to the nature of the short-circuit-protection network, the oltage appearing across R6 and R7, resulting from the peak load current, should be in the 1.5-to-2.0 V range. 6

7 Let 1.5 V R6 = R7 «- = 0.8 S2.9 A R6 = R7 = 0.9 J2 Short Circuit Protection Network Refer to Figures 1 and 7. R8,RiQ, R11,R12: Vg i [ has to be approximately 1. V for Q to conduct. FIGURE V To Base of Q Output Determining Values of Short-Circuit Network The maximum current-oltage product appearing at Q8 under normal load conditions occurs at the +.60 phase shift limit of the reactie load. For 60 phase shift, the following equations can be deried for turning Q on during shorted output: V B n = 1/2 Kl V R 6 ( m a x > + K2VEO(max) (a) Van =KI V R 6 ( m a x ) + I/2K2 VEO(max) Q>) R12 where Ki = RS + Rl 2 K2 ~(Eq. Eq. Resist, of Rl 1 and RS in Parallel Resist", of R~l 1 and"r8~in"paraltel)+" RTI"+Rl0 Soling (a) and (b) simultaneously yields: Kl V R 6(max) = K2V E o(rnax)- Since Vg [ i = 1. V, and substituting equation (c) in equation (a) or (b), yields K1 V R6 (max) = K2 V E 0 (m a x ) = 0.9. Now under shorted output, VEO(max) = V CC = 6 V, and (d) R6(inax) = lpeakre =.9A x0.9s2 = l.> t V. R12 Therefore, x 1.5 = 0.9 from equation! d). (c) Ko + K1 2 If we let R12 = 70 2, a conenient alue, then soling (e) yields: R8 = 00 n R12 x R8 Let R12'= = 18 SI. R12+ RS Then, K2 V E O f m ax) = R,, h ^ - r I O xv E o(max)= 0-9 R12' Also 7 x Vn = 0.9 in order for the zener R12 + Rll diode to conduct. Let V[) = 7.5 V, a conenient alue for an economical zener diode. 18 For equation ff), x 6 = 0.9, so ,2 k + RIO R10 = 5.67 k<tl. To allow Vtj to turn on at 10%-high line oltage, R10 should be reduced by 10% so let R10 =.7 kq,. Thus the alues for the resistors in the short circuit network arc: R6 = R7 = R8 = R9 = 00 R10= Rl 5 = 5.6 k 2 RI1 = R1= 1.2k 2 R12 = R1 =7012 TRANSISTOR BASIC REQUIREMENTS Output Transistors Ql 1,Q12: V( B R)CEO 55 s 0 a t l C = ~ () 0 tna (allowing for 109c high line oltage) hfe = 20 minimum at Ifj =.0 A and Vce = 2.0 V The Motorola 2N5876 and 2N5878 meet these specs. The power dissipation rating is 150 watts and the maximum junction temperature is 200 C. 200 C - 25 C 0jr= = 1.17 C/W, J L 150 where BJQ = thermal resistance from junction to case for the transistor. From equation (2), the power dissipation occurring in each output transistor during shorted load conditions is 1/2 V C C x.9 A, P D = -L ±±l = 5.! watts 2 (f) 7

8 Allowing for a 0% increase in Prj due to high line oltage, dc idling-power and component tolerance, PDmax is: p D(max) = 6 watts. Allowing for 50 C ambient temperature: 8QA of heat sink = PlXmax) 0JC PDfmax) o_ : 6_x_ L 17 0 C A = 2.O C/W 6 Pre-Drier Transistor Q and Q9: V ( B R)CEO ^ 80 V hpe > 75 at Ic = 10 ma and V C E= 1 V The Motorola MPS-A06 and MPS-A56 meet these requirements. The maximum power dissipation rating on this deice is 500 mw and Tj( m a x ) = 15 C. PD(drier) ^ _ PD^re-drieO^-p^-^^DC Drier Transistors Q7 and Q9: V<BR)CEO ^ 80 V at Ic = 10 ma hpe>50at Ic = ma. The Motorola MPS-U06 and MPS-U56 transistors meet these requirements. The maximum power dissipation rating of these deices is 5.0 watts andtj( m a x )= 15 C sic = - = 22 c/w The maximum power dissipation in the drier transistor is: PD(max) hpe or " output The hfe of the output is now the current gain at the short-circuit current leel: 'short circuit = 6 W Q x 2 = 2. A (at high line oltage). The 2N5876 and 2N5878 hae hpe ^ 5 at 2. A. 6 Therefore, Prj(drier) = = 1 0 w - PDC is due to the bias current used in the calculation of R5 and is: mw + 0 Vx 5 ma = 220 mw 50 PD(max) at 50 C for the transistor is: 500 mw 500 mw- x50 C = 15mW 15 C Since this is greater than the worst-case dissipation, PlXpre-drier). Q and Q9 do not require any heat sink. SHORT-CIRCUIT PROTECTION TRANSISTORS Ql 1, Q12, Q, Q5: All of these transistors operate at low current leels and can be TO-92 type plastic transistors. Qll and Q12 should hae hpe S 5 0 at 2 ma and V(BR)CEO * 80 V. The MPS-L01 and MPS-L51 meet these specifications. Q and Q5 should hae hpe at 1 ma and (BR)CEO & 10 V. The MPS-A20 and MPS-A70 meet these specifications. Now the designer has all of the component alues and semiconductor types required for the 60-watt amplifier x 1.0 dca of heat sink = = 60 C/W 1.0 dqa = 60 C/W MOTOROLA Semiconductor Products Inc. BOX PHOENIX, A R I Z O N A B5Q6 A S U B S I D I A R Y OF M O T O R O L A INC

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