LTCC toolbox for photonics integration

Size: px
Start display at page:

Download "LTCC toolbox for photonics integration"

Transcription

1 LTCC toolbox for photonics integration Pentti Karioja, Kimmo Keränen, Mikko Karppinen, Kari Kautio, Veli Heikkinen, Markku Lahti, Jyrki Ollila, Jukka Tapani Mäkinen, Kari Kataja, Jarkko Tuominen, Tuomo Jaakola, Sang Hyun Park, Pentti Korhonen, Teemu Alajoki, Antti Tanskanen, Jaakko Lenkkeri, Juhani Heilala VTT Technical Research Centre of Finland PO Box 1100, Kaitoväylä 1 FI Oulu Finland Abstract In photonic module integration, optoelectronic chips, micro optical elements and integrated circuits are integrated into functional components, sub assemblies, modules and systems. The building blocks of the photonic system must be fabricated by the use of cost efficient, reproducible, well established, high volume manufacturing technologies. The reliability of the system as well as the tolerances of device alignment are key issue in the integration. We have developed a Low Temperature Co fired Ceramics (LTCC) toolbox for photonic integration. The primary aim was to process co fired 3D structures, such as, grooves, cavities, holes, bumps and alignment fiducials for the passive alignment of photonic devices. LTCC provides means for full 3D integration. The tolerances of the alignment structures are typically ±5µm and in some specific cases ±2µm. LTCC structures provide means for the passive alignment of multimode fiber, for example. With Monte Carlo tolerancing tools, we can simulate and optimize the performance of the system and estimate manufacturing yield in volume production. Thermal management by the use of thermal vias is a well established technique; liquid cooling channels in the LTCC substrate provide efficient means for high power laser cooling. LTCC provides inherently hermetic substrate allowing the possibility for hermetic encapsulation. High speed ICs as well as millimeter wave circuits can easily be integrated into the LTCC substrate. Novel materials allow the fabrication of advanced systems, especially, for millimeter wave operation. Keywords: fiber optic, photonic module, cost efficient, thermal management, hermetic, power laser, optical interconnects 1.0 Introduction In photonic packaging and integration, the basic building blocks of the system, such as, lasers, photo detectors, micro optical elements, optical fibers, laser drivers and photo detector amplifiers, are integrated into functional components, modules and sub systems. Hybrid integration is the way to realize photonic systems in such a way that the basic elements are integrated by the use of a common substrate, a ceramic substrate, for example. The parts of the system must be fabricated by the use of cost efficient, reproducible, wellestablished, high volume manufacturing techniques. In photonic packaging, reliability issues as well as alignment tolerances are key issues. Therefore, system in a package concept (SiP) would be the most favorable approach in order to fulfill the requirements of photonic packaging. For photonic integration the following issues must be considered: Devices alignment with micron accuracy by the use of 3D passive alignment structures. Integration of high speed/low noise/highpower electronics as close as possible to the critical photonic devices, such as, diode laser, optical modulator, photo detector or MEMS devices. Matching of the thermal expansion coefficients between the devices and substrate. Provide required internal and external optical, electrical and mechanical interconnects as efficiently as possible. Provide required thermal management for critical power devices, such as, high power lasers, laser drivers and amplifiers. Protect devices against environmental conditions during the use and storage of the modules. Provide local hermetic sealing of critical devices, such as, diode lasers. Of course, these requirements must be fulfilled by the most cost efficient means in highvolume production with good production yield and reliability. Our aim was to develop methods and technologies for photonics packaging and integration based on the use of Low Temperature Co fired Ceramic (LTCC) technology. This paper describes the capabilities of LTCC technology using several photonic modules as illustrating examples. The demonstrators are a fiber pigtailed

2 vertical cavity surface emitting laser (VCSEL), a liquid cooled fiber pigtailed diode laser, a hermetic, fiber pigtailed diode laser, a 3 channel optical receiver and a high bit rate optical interconnects transmitter/receiver. In Chapter 2, we describe tolerance management tools developed for photonic packaging design and optimization. The ingredients of the LTCC integration toolbox are described in Chapter 3. In Chapter 4, we compare LTCC platform with other technology platforms, such as, Si and FR 4. Discussion is given in Chapter 5 and a summary in Chapter Tolerance management Photonic packaging requires device alignment with a few microns accuracy. When packaging single mode devices, such as, singlemode fiber, waveguide devices and diode lasers, the alignment tolerances are in sub micron range. Typically, the assembly of most critical devices is made by the use of active alignment method. This means that, for example, when attaching a fiber pigtail to a laser, the laser is activated and the fiber is attached after the alignment procedure results in the maximum power coupling efficiency into the fiber. To reduce assembly and packaging costs and product cycle time, passive alignment of devices is preferred. This means loosening of the alignment tolerances that are critical for the optical performance of the module. [1] The design for assembly process for alignment tolerance management includes the following steps: defining the figure of merit for optical performance, modeling of the performance, identifying the critical alignment tolerances, and carrying out Monte Carlo tolerance analysis. The iterative design process is descried using the pigtailing of a multimode diode laser with a multimode fiber as an illustrative example. [2] width divergence is degrees. The optical coupling and tolerance analysis system was build using ASAP TM (Breault Research Organization) optical design and simulation software. Fig. 1 shows a schematic drawing for the laser to multimode fiber coupling using a ball lens as a coupling element. The model can be used to simulate the performance of the system with different variables, such as, fiber core diameter and fiber NA, laser type and type of the coupling lens. In the simplest butt coupling configuration, meaning direct coupling of fiber without the ball lens, the nominal coupling efficiency given by the simulation was The tolerance analysis of the coupling system was performed in two steps. Firstly, the sensitivity analysis of the system was performed in order to identify the most critical tolerance variables. The sensitivity analysis was performed simulating separately each tolerance variable with 3σ values. According to the analysis, the source decenter along the axis perpendicular to the optical axis was the most significant tolerance variable. After the sensitivity analysis, optical system Monte Carlo tolerancing was performed. In the analysis, all tolerance variables are used simultaneously, and statistical information of the system performance is obtained. Tolerance variables are input as tolerance distributions into the simulations system. The number of Monte Carlo systems built in the simulation was As we can see from Fig. 2, 90% of the systems exhibit better than 0.41 coupling efficiency with the tolerance values chosen for the simulation. When setting the coupling efficiency for the system operation to the value of 0.41, we obtain 90% yield for the passive alignment systems. This is how the Monte Carlo simulation tool can be used as an optimization tool for setting the optical performance limit of the system to a new higher or lower value. Fig. 1. Schematic drawing for the laser tomultimode fiber coupling using a ball lens as a coupling element. The tolerance analysis of the passive laserto fiber coupling was started by performing an optical coupling efficiency analysis between a 1x100µm emitting area diode laser and 62.5/125µm fiber having the NA of The laser beam full Fig. 2. Relative coupled power obtained by Monte Carlo tolerance analysis. In order to get better estimates for volume manufacturing, we can use the alignment distributions obtained from the assembly automation tools considering the influence of

3 gripping mechanics, for example, to estimate the yield of the packaging. [3] When utilizing automation tools, the distributions do not represent in all cases symmetric distribution, which actually results non symmetric packaging yield distributions, also. When assessing manufacturing costs, we have used cost of ownership models that consider the contribution of labor costs, manufacturing processes and equipment investments, for example, to the unit cost of final product. 3.0 LTCC toolbox In low Temperature Co fired Ceramic (LTCC) process, see Fig. 3, glass ceramic sheets are blanked and punched in order to form electrical via holes. Via holes are metallized using stencil printing to form electrical interconnects between individual layers. Electrical conductors and passive circuits are patterned onto each layer by the use of screen printing or photo imaging techniques. Next, the stacking and laminating of layers and firing of the laminated stack below 930 C temperatures is performed. Post processing steps are photoimaging of conductors and printing of resistors onto the substrate, for example. Thereafter, assembling discrete devices onto the substrate and dicing of circuits are carried out. At the end, the SiP is finished by assembling electrical contacts for printed wiring board interconnects. Fig. 4. Fiber attached onto a punched groove. Fig. 5. Fiber attached onto a photoimaged groove. Buried cavities or channels can be fabricated for liquid or gas flow to provide cooling or perform sample analysis, see Fig. 6. Fig. 3. Conventional LTCC process. 3.1 Passive 3D alignment structures based on LTCC For photonics and sensor applications, the ability to create 3D precision structures on the LTCC substrate is a very important feature. Open cavities can be made on the surfaces of the LTCC substrate in order to be able to assemble discrete semiconductor devices into the cavities. The assembly of active devices into the cavities allows hermetic sealing of devices locally. U grooves can be processed using punching and photolithographic processes on the substrate, see Fig. 4 and Fig. 5. [4] The groove structure provides precise alignment and firm attachment for the adhesive bonded optical fiber. Fig. 6. Integrated embedded channel having the cross section of 1.4mm 0.4mm. Accurate through hole structures are useful for photonic packaging. Standard cavities are manufactured by punching a window to the tape layers, which are then laminated together and cofired. A through hole grid in an LTCC substrate is shown in Fig. 7 as an example. Typically, the dimensional tolerance for a medium sized cavity having the size of 5mm x 5mm x 1mm, for example, is ±20µm in all three axes. The most accurate through hole structure, however, is made by punching the hole after laminating the tape layers together, thus eliminating the layer to layer misalignment. The diameter of a through hole can be controlled to a ±3µm tolerance for the hole diameter range of mm. The minimum hole pitch is typically 2 times the diameter of the hole.

4 Diced groove Assembled fiber laser Fig. 7. Grid of holes through a 0.6 mm thick LTCC substrate (hole diameter 138 µm and hole pitch 300 µm). Grooves and cavities processed in a standard LTCC process can be used for the passive alignment of optical fiber and diode laser. [5] The accuracy and the dimensional tolerances of such a groove depend mainly on the lamination parameters and the consistency of the lamination process. In addition, highly accurate punching process and small firing shrinkage tolerances are essential to be able to achieve the passive alignment accuracy of less than 10µm that is required for multimode fiber systems. Fig. 9. A 200/220 multimode fiber attached onto the fiber groove ending to a cavity for a diode laser chip. The horizontal laser to fiber alignment accuracy, actually, the centering capability of the fiber groove, was characterized by measuring the distance variation of via fiducials on both sides of the fiber groove, see Fig. 9. The fiducials can be used by the die bonder visual alignment system to align and center the laser accurately. Measurements carried out for several samples and substrates indicate that the die bonder alignment system can track the fiber groove with the accuracy of less than 3µm and in most cases less than 2 µm. The height measurements showed that the height of the fiber assembled onto the U groove can be controlled with the accuracy of a few micrometers. Fig. 8. Schematic drawing of passive fiber to laser butt coupling; a) end view, b) side view. The feasibility of the laser to fiber passive alignment, schematically shown in Fig. 9, was verified by attaching a 200/220µm multimode fiber with UV curable adhesive onto a groove having a 10 mm length. To characterize the horizontal alignment accuracy, Smartscope camera based measurement system was used. The accuracy of the instrument is 1µm. The height of the fiber from the surface of the substrate and its tolerance were measured using a Wyko optical profiler. Fig. 10. Photo detectors with a 70µm active area flip chip bonded on the backside of a LTCC substrate. The devices are aligned with the ~80 µm diameter holes in the LTCC substrate. The use of through holes for photonic device is shown in Fig. 10 in which a photo detector array is aligned with the holes in the LTCC substrate. [6] The flip chip bonding of the array device on the other side of the substrate against the holes was made by the use of a precision flip chip bonder. The positioning accuracy of the bonder is ±0.5µm defining the ultimate alignment accuracy of photonic devices. In addition, when the active devices are aligned by the use of the hole, the holes

5 in the substrate can be used for the passive alignment and attachment of an optical fiber as shown in Fig. 11. Fig. 11. Passive alignment of a multimode fiber with a VCSEL laser by the use of a through hole in the LTCC substrate. Fig. 12 shows the use of the LTCC substrates as the mounting frame for a silicon surface micromachined MEMS device. [7] The substrate consists of eight tape layers each having an unfired thickness of 130 µm. A mechanical tool was used to punch holes into the LTCC sheets to open cavities for the MEMS. The cavity provided reference marks during the assembly and enabled the passive alignment of the MEMS and the lens on the other side of the substrate. Typically, cavity dimensions possessed horizontal and vertical tolerances of ±20µm and ±10µm, respectively. local warpage, waviness, and surface roughness values are too high to make the demanding postprocessing feasibly and reasonably. A Field Emission Scanning Electron Microscopy (FESEM) micrograph of lapped and polished LTCC substrate surface is shown in Fig. 13. Surface defects, mostly holes, can be clearly seen. Their size in diameter varies between 1µm to 3µm, but there might also be as large as 10µm holes present in the sample. These holes are most likely caused by the porosity of the fired LTCC material, and it is concluded that the generation of these holes are difficult to eliminate with lapping and polishing steps. These holes might cause problems when direct thin film processing on polished the LTCC substrate is concerned. Fig. 13. FESEM micrograph of the surface of a lapped and polished Du Pont 951 LTCC material. Fig. 12. Silicon surface micromachined MEMS device mounted into a cavity in the LTCC substrate (left). Lens assembled on the other side of the substrate (right). 3.2 Planarization When applying lithographic postprocessing on the fired LTCC substrate, the substrate should be smooth and flat. The demand is especially high if there is a need for photolithographic thin film post processing. Due to several issues related to the design and manufacturing process of LTCC substrate, such as, metallization distribution and firing setter plate waviness, the surface quality of the fired LTCC substrate is not adequate for the most demanding applications. Without grinding and polishing or thin film planarization, LTCC substrate camber, In order to obtain better surface quality for thin film post processing, a test of depositing a planarization layer on the ground and polished substrates was carried out. The deposition process was based on normal spinning and baking technique using polymer based proprietary materials. The planarization tests were made with both as fired and lapped and polished LTCC substrates. The thickness of the planarization layer was 10 µm, and the baking temperature was 230 C. A FESEM micrograph of a planarized Du Pont 951 substrate can be seen in Fig. 14. The surface roughness was greatly improved by lapping, polishing and coating with a planarization layer, from ~1µm to ~50nm with lapping and polishing, and to ~2nm with planarization. However, the waviness of the substrate is still approximately 5µm on a 50mm 50mm substrate area after lapping, polishing and planarization. Camber is as well still present in the sample.

6 yields two orders of magnitude better value than that of a conventional FR 4 substrate. Fig. 14. FESEM micrograph of the surface of Du Pont 951 LTCC material after the deposition of a 10 µm planarization layer. 3.3 Thermal vias The aim of the thermal management studies was to evaluate the efficiency of LTCC thermal vias and different die bond adhesives for thermal transfer from the chip to the heat sink, see Fig. 15. [8] For this purpose, LTCC test substrates of DP951 AX material with silver thermal via area fractions from 11.7% to 24% were manufactured. Six different adhesives recommended by their manufactures for power chip attachment were used. Two different types of chips were used in the studies: a 42GHz millimeter wave integrated circuit (MMIC) with 2.4 W power dissipation, and a thermal test chip. 3.4 Liquid cooling Liquid cooling of a high power diode laser was demonstrated as shown in Fig. 16. [2] The 100µm 1µm emitting area laser was passively fiber pigtailed with a 62.5/125µm multimode fiber. With passive fiber alignment, an average coupling efficiency of 0.31 was obtained that was in good consistence with the nominal coupling efficiency of 0.37 given by simulations. High power laser diode cooling was implemented by embedding thermal vias into the LTCC substrate under the laser diode metallization. Several thermal 3D structures in LTCC substrates were modeled utilizing I DEAS mechanical design and modeling software. Thermal simulations were utilized to evaluate their cooling efficiency and to optimize the structures further. Although, the thermal conductivity of LTCC material is ten times higher than FR 4, it is still only 2 2.4W/m K. Copper and aluminum, which are used conventionally in heat sinks, have thermal conductivity of 400W/m K and 237W/m K, respectively. The thermal conductivity of LTCC substrate can be locally improved by utilizing integrated metallic heat spreading layers, thermal vias and cooling channels processed in the standard LTCC process. Fig. 15. Si chip adhesive bonded on an LTCC substrate with thermal vias that are used to increase the thermal conductivity of the substrate. The power handling capacity of test chips was modeled by a thermal simulation tool. The maximum simulated temperature rise for the MMIC at 2.5 W power dissipation was between C depending on the adhesive thickness and thermal conductivity and the thermal via conductivity and area fraction. However, it must be remembered that this is not the actual transistor junction temperature rise, which is still considerably higher. The corresponding values for the thermal test chip were C at 5 W power dissipation. According to the experiments, using the area fraction of 20% of thermal vias, the thermal resistance of LTCC substrate was lowered by the factor of 20, which Fig. 16. Liquid cooled, fiber pigtailed high power diode laser. A schematic cross section of the implemented liquid cooling system is shown in Fig. 17. In the model, the heat spreading layer is located between the first and second LTCC layer. Variable number of different thermal vias between the laser and the cooling channel were modeled and the most optimal structures were selected for processing. The cooling channel with the cross section of 1.4mm 0.4mm was fabricated into the LTCC substrate directly under the laser diode.

7 hermetic fiber feed through and laser welding of a sealing lid on the module. Fig. 17. Schematic cross section of the liquid cooled diode laser. The system was characterized by the use of a thermal camera, Model SC3000 made by FLIR Systems. In the measurements, the ambient temperature was 24 C, cooling water temperature 22.5 C, water flow rate 50 ml/min and the thermal power of the laser 0.5 W. Thermal simulations were made by the use of Flotherm program. Simulated and measured temperature distributions are shown in Fig. 18. A fairly good correspondence between simulated and measured values was achieved. The temperature maximum in the simulation was achieved at the laser active layer near the front facet. The water cooling decreased the laser temperature by a factor 3.4 compared to the reference measurement made without water cooling. In the simulations, the reduction factor was 2.8 when compared to a reference system with the same thermal management structures except for the cooling channel, which was filled with LTCC material. Fig. 19. Encapsulated hermetic fiber pigtailed laser module and an open subassembly. The simulated coupling efficiency was verified by the prototype realization and characterization. The measured maximum coupling efficiency of the prototypes was 64%, which corresponds reasonably well to the maximum coupling efficiency value of 69% obtained by the simulations. Therefore, the experiments verify that passive alignment accuracy allows required optical coupling efficiency. Leak rate of [atm cm 3 /s] was measured in helium leak tests for the packaged module, when the module was tested according to MIL STD 883D method specification. As a reference, leak rate for similar modules using a buffer stripped fiber pigtail without a rubber guard tube was [atm cm 3 /s]. It is obvious that the clearly higher leak rate in the packaged module leak measurement is mainly due to the absorbed helium into the fiber polymer buffer layer and rubber guard tube in the pressurization process. Therefore, the measurement verified that the used manufacturing procedure is capable to produce truly hermetic laser modules. Fig. 18. Simulated (left) and measured (right) surface temperatures of the laser and laser substrate. The geometry is the same as in Fig Hermetic sealing A hermetically sealed, fiber pigtailed diode laser module and the module without a lid are shown in Fig. 19. The 3D structure of the substrate was fabricated by the use of conventional via punching technique to create the necessary alignment structures including holes, grooves and cavities. Packaging was carried out in two phases: firstly, device assembly and, secondly, hermetic sealing. Device assembly included the assembly of diode laser, Kovar frame and fiber onto the LTCC carrier. Hermetic sealing included preparing the Fig. 20. Optical power variation in a C temperature cycle. The effect of thermal cycling was preliminary tested using a temperature cycle between C. The cycle time was about 2 hours and 100 cycles were typically repeated. In

8 Fig. 20, a typical optical power variation of a temperature cycled laser is shown. The maximum optical power variation in the individual cycle was about 1.2dB, which corresponds to the nominal linear temperature sensitivity of the diode laser. The effect of thermal humidity was preliminary tested in a 1000 hour aging test at the temperature of +85 C and relative humidity of 85%. During the aging, test the optical power of the prototype decreased 10% from the initial value. 3.6 Integrating of high speed ICs With rapid increase in the demand of high data rate optical interconnection, signal integrity issues tied up with high density optoelectrical circuits, such as, multi channel photodiode amplifiers and VCSEL drivers, are gaining more significance. To study the capability of LTCC technology to enhance signal integrity, we designed and processed an LTCC evaluation module comprising a photo detector array and 3 channel amplifier IC, see Fig. 21. output lines, the output has sufficient isolation up to 20GHz, which perfectly neutralizes crosstalk between output lines. Fig. 22 shows the Time Domain Reflectometer (TDR) measurement of the output lines of the multi channel LTCC receiver. The measurement clearly indicates that except the small impedance mismatch caused by a SMA connector on test board, the 50 µm LTCC top layer with 53 µm width conductor pattern shows good transfer characteristics for the multi channel 10Gbps receiver. The time domain characteristic of the circuit was measured with a 1510 nm laser source at 4Gbps and 6Gbps. The module clearly showed wide opened eye at 4Gbps, even though, there was slight up shift in eye junction. At 6Gbps, the eye started to show some noise generation that was obviously due to the aging of IC, which showed oxidized surface. This verifies that all critical process parameters, namely, 100 µm diameter vias and 53 µm screen printed output lines, are working well for the 10Gbps receiver module. Fig. 21. LTCC circuit with a photo detector array and amplifier IC assembled on a test board. The channel pitch of array optoelectrical devices, such as, VCSELs and photo detectors, is tightly defined to be 250µm. On the other hand, a 150µm via hole pitch is preferred in IC industry due to the easiness and stability of process. These constraints lead to inevitable misalignment between the driver or amplifier IC and the substrate. With fine line LTCC technology, we implemented 100 µm via holes for the 3 channel parallel receiver. The use of fine line LTCC process, however, enables one to one matching between the IC and substrate. Therefore, the number of channels can be increased up to 12 or even higher without mismatching problem. Wide enough spacing between the output signal lines with specified substrate dielectric constant allows good crosstalk suppression between the output channels. To control this, the thickness of the LTCC top layer becomes an important parameter. The top layer of the LTCC circuit was processed using Du Pont 951 green sheet with a 50 µm thickness. According to simulations and measurements, with 53 µm wide screen printed Fig. 22. TDR measurement of the multi channel LTCC receiver. 3.7 Integration of a high speed optical transceiver Multi channel transmitter and receiver modules for an optical interconnects demonstrator were built on multilayer LTCC substrates. The aim was to demonstrate parallel optical interconnections on printed wiring board (PBW) using polymer optical waveguides fabricated on the board, see Fig. 23. [9] The electronics of the transmitter is based on a 4 channel VCSEL driver IC and a monolithic VCSEL emitter array, whereas the receiver is based on a 4 channel receiver IC and a monolithic PINphotodiode array. In addition to these, only a few discrete capacitors were needed to construct the transmitter (Tx) and receiver (Rx) electronics. The bandwidth of the devices enables maximum of 10 Gb/s/channel data transmission. The Tx and Rx modules were equipped with 0.35 mm lead free SnAgCu solder balls for BGA mounting onto the PWB. Micro optical components were assembled between the modules and the PWB to enable optical

9 coupling from Tx to the waveguides and from the waveguides to Rx. Fig x10 Gb/s transmitter/receiver with 10mm x 10mm size BGA mounted on the opticalelectrical PWB. The dielectric tape and conductor layer structure of the LTCC substrates of the modules were designed to result with optimized depths of a microlens cavity and through holes as well as the total substrate thickness. In addition, the aim was to achieve best possible mechanical accuracy of the alignment marks and optical via holes across the panel. Actually, through holes were used as alignment marks, since they could be processed during the same via punch run as the optical via holes, and thus the possible misalignment due to the substrate alignment between different process steps could be avoided. DuPont 951 tape system was chosen, since it has proven to be suitable for implementing accurate structures for micro optical alignment. The dimensions of the transmitter and receiver module were 10mm 10mm. Thanks to identical optomechanical designs, both Tx and Rx substrates had the same kind of layer structure and they could be fabricated in the same LTCC panel. The substrates were manufactured with 11.8mm 11.8mm panel size and screen printed conductor layers. In addition, a 4x4 array of thermal vias was added to the substrates to improve the heat dissipation from the driver/receiver IC. The fabricated panels were characterized by SmartScope measuring microscope. The flipchip pads had the line width of m. The aperture size of the optical through holes was m. The BGA pads diameter was m and pitch 1mm. The surfaces of the cavities for microlenses were characterized with Wyko optical profiler. According to the measurements, the unevenness of the LTCC surface was approximately m, probably due to the inner layer conductor structures. The measured thickness and cavity depth were used to specify the aimed standoff height of the modules defining the target size of the BGA balls. Fig. 24. Microlens array assembled on an LTCCbased transmitter module. The active areas of the four VCSELs (flip chip bonded on the other side of LTCC substrate) can be seen through the optical via holes and microlenses. The bare die VCSEL and detector arrays bumped with Au stud bumps were flip chip bonded onto the Tx and Rx substrates using thermocompression bonding. The active areas of the devices were aligned to the optical via hole. The driver and receiver ICs were first die bonded and then thermo sonic ball bonding was performed with 25 m Au wires. Finally, the passive components, such as, capacitors, were mounted using SMD assembly. After the assembly of the electronic devices, the micro optical components were mounted by the use of alignment structures on the waveguide layers and alignment through holes on LTCC substrates, see Fig. 24. The alignment structures allowed achieving small enough alignment tolerances for optical coupling. Device alignment was carried out passively; no active optical alignment steps were needed. A pneumatic gripper was used to pick and place the components and they were bonded with UV cured adhesives. The surface mounting of the microlens arrays was designed to be suitable by the use of die bonder. Nevertheless, the assembly of microlenses was carried out using a pneumatic gripper tool controlled by Newport Automatic Alignment Station 8100, in order to allow characterization of the optical coupling. At the speed of 10 Gb/s, the transmitter and receiver modules showed open eye diagrams, see Fig. 25.

10 Fig Gb/s eye diagram measured from the optical transmitter output. 3.8 Integration of millimeter wave circuits To demonstrate millimeter wave capabilities, several resonator and filter modules at Q band were designed and demonstrated, for example, a compact three pole band pass filter. [10] [11] The three pole filter, shown in Fig. 26, was designed and characterized by IRCOM and fabricated by VTT. The filter is based on a resonator structure comprising of a periodic lattice of metallized via holes. The structure was processed using Ferro A6S LTCC material. The size of the filter was mm 3. According to the measurements shown in Fig. 27, the insertion and reflection losses of the filter are small and in good agreement with simulations with a 7% 3 db bandwidth centered at 38GHz. Compared to classical planar resonators, the novel resonator is highly integrated offering great performance characteristics, also. Fig. 26. Schematics of optimized 3 pole filter. Fig. 27. Simulated (dashed) and measured insertion and reflection losses of the 3 pole filter. 3.9 Characterization of novel LTCC materials LTCC toolbox also contains a large material palette allowing a freedom to select the most suitable tape system for each application. These materials include high permittivity and permeability materials for example. Ferrite tapes from Ferro have been studied in collaboration with Carleton University and CRC, Canada. The highfrequency properties of these ferrites were characterized using circuits that were fabricated from the very material under test up to 40GHz. Such in situ circuits provide data that is more representative of the performance obtainable by more complicated circuitry that will eventually be made from the same material using the same fabrication method. The dissipation factor of ferrite materials was found to be low enough to allow the implementation of microwave circuits. [12] 4.0 Comparison of LTCC vs. other substrates Table 1 summarizes the performance of LTCC technology obtained by the state of the art LTCC process at VTT. These values are used to compare the integration based on the use of LTCC technology against other technologies, such as, semiconductor substrates (Si) or organic substrates (FR 4). These numbers can be used as design guidelines for new designs when fabricated in our process. Table 1. State of the art of the LTCC process at VTT. Charasteristics State of the art at VTT Electrical via diameter/pitch 80um/200um Conductor line width/spacing 50um/50um (screen printed) 40mm/50mm (photo patterned) Number of layers up to 70 Alignment structure tolerances (grooves, holes, bumps, cavities, spacers) Embedded passive components (R,L,C) Optical via Optical waveguides Dielectric constant Dielectric loss tangent Thermal conductivity CTE (compatibility) Hermetic sealing ±5mm/±3mm (machined/photo patterned) on the surface layer ±10mm layer to layer Buried and on surface passives R: 10 10M ± 30%, trimmed 1% C: <10pF ± 5% (± 1% demonstrated) L: <200nH / layer ± 5% (1mH demo) Free space (through hole), fiber stud Post fired polymer and sol gel structures (7.8 common) (@ 1 MHz), (@ >1 GHz) W/mK ( x FR 4), with vias 100 x better than FR ppm/k (excellent with GaAs & InP, 2x of Si) Glass metal & metal metal junctions, solder sealing, laser welding 4.1 Electronics integration At the moment, we have demonstrated the use of LTCC for photonics integration in 10Gbps optical transmitter and receiver modules as well as fiber pigtailed laser modules, for example. In telecommunication electronics, we have demonstrated 40GHz millimeter wave modules and low noise amplifier modules. According to our experience, LTCC fulfills extremely well the requirements of heavily integrated electronic functions. Of course, it is possible to integrate highperformance circuits into the Si platform but the cost of processing of micro optical benches in highend processes would be too high when the surface area is in the order of tens of square millimeters. Therefore, the most obvious approach also in Si

11 technology is to use circuits and optical benches processed in other processes, such as, LTCC. 4.2 Device alignment V grooves and cavities processed into Si substrate by the use of reactive ion etching, for example, provide extremely accurate means to perform passive device alignment in sub micron range. The accuracy of precision structures on the LTCC substrate, however, is in the range of a few microns providing means for multimode device alignment and, in some specific systems, for singlemode device alignment, also. However, deeper studies are needed to assess the accuracy of structures at the intermediate layers of the LTCC substrate as well as the alignment tolerance between intermediate layers. When aiming to the use of conventional FR 4 based substrate for precision alignment purposes, the thermal stability of materials hinders their use in critical applications. 4.3 CTE matching LTCC and Si are well suited when considering CTE matching between the substrate and semiconductor devices. 4.4 Thermal management Si is a good material for thermal management purposes. The properties of LTCC are better than those of organic substrates; heat spreaders and thermal vias can be fabricated during the normal processing phases of LTCC to improve its thermal management capability. When using organic materials, heat spreading structures must always to be used with high power devices. 4.5 Hermetic sealing and encapsulation Si does not provide cost efficient means for mechanical protection and hermetic sealing. Of course, when using wafer scale packaging technologies, Si wafers can be bonded hermetically together but this does not solve the problem how to protect the circuits mechanically. Organic materials are not hermetic at all; semi hermetic encapsulation can be obtained by the use of glob top materials. LTCC substrate is inherently hermetic, thus providing cost efficient and robust means for the sealing of active and passive devices hermetically. 4.6 Material and processing costs The comparison of materials and processing costs is always difficult when the structures and products are not exactly the same. Some kind of estimate, however, can be obtained as follows: LTCC tape prices are from $0.02 to $0.135 per square inch and processed LTCC circuits are ~ 3 per square inch for medium volume. A 3 inch silicon wafer costs ~ 60, which is ~ 8.5 per square inch. Si surface micromachined MEMS devices, for example, cost ~ 80 per square inch. As a rule of thumb, the price of Si devices is at least order of magnitude higher than LTCC devices. 5.0 Discussion At the moment, LTCC technology is a niche technology for photonic integration. There are already products on the markets based on Si optical benches. It is obvious that according to the analysis presented in the previous chapters the use of LTCC could be favorable in photonic integration. Technologies are matured to pattern optical waveguides onto Si substrates. The use of square LTCC panel does not fit well to the semiconductor processing infrastructure. A great addition to the LTCC toolbox, however, would be the capability to integrate photonic functionalities directly into the LTCC substrate. Devices, such as, passive waveguide structures are absolutely needed to fulfill the requirements of photonic module integration. We have demonstrated the use of organicinorganic sol gel materials to pattern waveguides onto fired LTCC substrates. [13] Sol gel technology provides the possibility for patterning 3D passive alignment structures, also. The alignment tolerances for multimode devices being on the order of 10µm can be fulfilled with LTCC machining and sol gel technologies. In the future, however, the hybrid integration of single mode devices requires sub micron alignment tolerances. [14] In order to be able to carry out multidisciplinary system integration, the use of sophisticated 3D design tools must be seamless and efficient. We have successfully demonstrated the use of optical design tools that were upgraded with Monte Carlo tolerancing tools for module integration. When the demand of bit rate in highvolume optical systems goes beyond 40Gbps, the advantages of LTCC technology are obvious compared to integration based on Si technology. This is due to the fact that millimeter wave system can already now be efficiently 3D integrated by the use of LTCC technology. The capability to costefficiently utilize the photonic SiP concept will also be a key issue in the favor of LTCC Summary We described the comprehensive LTCC toolbox for photonics packaging. The tools comprise of tolerance management tools, precision 3D structures for passive alignment of devices, planarization, thermal vias, liquid cooling, hermetic sealing, integrating of high speed ICs, optoelectrical devices and millimeter wave circuits as well as combining of novel LTCC materials. At the moment, LTCC technology is capable of

12 integrating micro optical systems and multimode fiber based systems. The full integration of singlemode fiber system, however, is challenging due to the tight tolerance requirements. Monte Carlo tolerancing tools are an extremely useful ingredient for photonics packaging and integration. Acknowledgement The authors want to acknowledge Jouni Kangas, Sami Karjalainen, Risto Karjalainen, Airi Weissenfelt and Mikko Heikkinen who were mostly in charge for the LTCC process and packaging capabilities at VTT. In addition, Reijo Lehtiniemi at Nokia Research Center (NRC) is acknowledged for performing laser surface temperature measurements with the SC3000 thermal camera. References 1. Karioja, P. et al., "Comparison of active and passive fiber alignment techniques for multimode laser pigtailing", in Proceedings of 50th Electronic Components and Technology Conference Las Vegas 2. Keränen, K. et al., Fiber pigtailed multimode laser module based on passive device alignment on an LTCC substrate" in IEEE Transactions on Advanced Packaging Heilala, J. et al., "LTCC technology for cost effective packaging of photonic modules", in Assembly Automation Journal Kautio, K. et al., Precision alignment and cooling structures for photonic packaging on LTCC, in 2004 IMAPS Conference on Ceramic Interconnect Technology Denver. 5. Keränen, K. et al., Cost effective packaging of laser modules using LTCC substrate, in Proc. of SPIE, vol San Jose. 6. Karppinen, M. et al., Passively aligned fiber optic transmitter integrated into LTTC module, in Proc. of 51 st Electronic Components and Technology Conference Orlando. 7. Heikkinen, V. et al. MEMS packaging using precision machined LTCC substrates", in International Conference on Optical MEMS (MOEMS 2003) Waikoloa, Hawaii. 8. Jaakola, T. et al. Thermal management of power MMIC on LTCC substrate", in EPMC Friedrichshafen. 9. Karppinen, M. et al., "Parallel optical interconnect between ceramic BGA packages on FR4 board using embedded waveguides and passive optical alignments", accepted for publication in 56th Electronic Components and Technology Conference. May San Diego. 10. Baillargeat, D. et al. LTCC Technology for Innovative Millimeter Wave Bandpass Filters, in Proceedings of 4 th ESA Workshop on Millimetre Wave Technology and Applications Espoo. 11. Rigaudeau, L. et al. "LTCC 3D Resonator Applied to the Design of a Very Compact Bandpass Filter for Q band Applications", in Proceedings of European Microwave Week Paris. 12. Bray, J. et al., "Characterisation of an Experimental Ferrite LTCC Tape System for Microwave and Millimeter wave Applications, in IEEE Transactions on Advanced packaging p Karioja, P. et al., "Sol gel technologies for multimode waveguide devices. SPIE vol San Jose. 14. Heikkinen, V. et al., "Wavelength Tunable Laser Module Using Low Temperature Cofired Ceramic Substrates", in IEEE Transactions on Advanced Packaging p

Fiber-Optic Transceivers for High-speed Digital Interconnects in Satellites

Fiber-Optic Transceivers for High-speed Digital Interconnects in Satellites Photo: ESA Fiber-Optic Transceivers for High-speed Digital Interconnects in Satellites ICSO conference, 9 Oct 2014 Mikko Karppinen (mikko.karppinen@vtt.fi), V. Heikkinen, K. Kautio, J. Ollila, A. Tanskanen

More information

Winter College on Optics: Fundamentals of Photonics - Theory, Devices and Applications February 2014

Winter College on Optics: Fundamentals of Photonics - Theory, Devices and Applications February 2014 2572-10 Winter College on Optics: Fundamentals of Photonics - Theory, Devices and Applications 10-21 February 2014 Photonic packaging and integration technologies II Sonia M. García Blanco University of

More information

Flip-Chip for MM-Wave and Broadband Packaging

Flip-Chip for MM-Wave and Broadband Packaging 1 Flip-Chip for MM-Wave and Broadband Packaging Wolfgang Heinrich Ferdinand-Braun-Institut für Höchstfrequenztechnik (FBH) Berlin / Germany with contributions by F. J. Schmückle Motivation Growing markets

More information

Flip chip Assembly with Sub-micron 3D Re-alignment via Solder Surface Tension

Flip chip Assembly with Sub-micron 3D Re-alignment via Solder Surface Tension Flip chip Assembly with Sub-micron 3D Re-alignment via Solder Surface Tension Jae-Woong Nah*, Yves Martin, Swetha Kamlapurkar, Sebastian Engelmann, Robert L. Bruce, and Tymon Barwicz IBM T. J. Watson Research

More information

4-Channel Optical Parallel Transceiver. Using 3-D Polymer Waveguide

4-Channel Optical Parallel Transceiver. Using 3-D Polymer Waveguide 4-Channel Optical Parallel Transceiver Using 3-D Polymer Waveguide 1 Description Fujitsu Component Limited, in cooperation with Fujitsu Laboratories Ltd., has developed a new bi-directional 4-channel optical

More information

Hermetic Packaging Solutions using Borosilicate Glass Thin Films. Lithoglas Hermetic Packaging Solutions using Borosilicate Glass Thin Films

Hermetic Packaging Solutions using Borosilicate Glass Thin Films. Lithoglas Hermetic Packaging Solutions using Borosilicate Glass Thin Films Hermetic Packaging Solutions using Borosilicate Glass Thin Films 1 Company Profile Company founded in 2006 ISO 9001:2008 qualified since 2011 Headquarters and Production in Dresden, Germany Production

More information

Low Thermal Resistance Flip-Chip Bonding of 850nm 2-D VCSEL Arrays Capable of 10 Gbit/s/ch Operation

Low Thermal Resistance Flip-Chip Bonding of 850nm 2-D VCSEL Arrays Capable of 10 Gbit/s/ch Operation Low Thermal Resistance Flip-Chip Bonding of 85nm -D VCSEL Arrays Capable of 1 Gbit/s/ch Operation Hendrik Roscher In 3, our well established technology of flip-chip mounted -D 85 nm backside-emitting VCSEL

More information

!"#$"%&' ()#*+,-+.&/0(

!#$%&' ()#*+,-+.&/0( !"#$"%&' ()#*+,-+.&/0( Multi Chip Modules (MCM) or Multi chip packaging Industry s first MCM from IBM. Generally MCMs are horizontal or two-dimensional modules. Defined as a single unit containing two

More information

64 Channel Flip-Chip Mounted Selectively Oxidized GaAs VCSEL Array

64 Channel Flip-Chip Mounted Selectively Oxidized GaAs VCSEL Array 64 Channel Flip-Chip Mounted Selectively Oxidized GaAs VCSEL Array 69 64 Channel Flip-Chip Mounted Selectively Oxidized GaAs VCSEL Array Roland Jäger and Christian Jung We have designed and fabricated

More information

Fiber-optic transceivers for multi-gigabit interconnects in space systems

Fiber-optic transceivers for multi-gigabit interconnects in space systems VTT TECHNICAL RESEARCH CENTRE OF FINLAND LTD Photo: ESA Fiber-optic transceivers for multi-gigabit interconnects in space systems at EPIC Tech Watch of Micro Photonics Expo, Berlin, 11 Oct 2016 Mikko Karppinen(mikko.karppinen@vtt.fi)

More information

Application Bulletin 240

Application Bulletin 240 Application Bulletin 240 Design Consideration CUSTOM CAPABILITIES Standard PC board fabrication flexibility allows for various component orientations, mounting features, and interconnect schemes. The starting

More information

Pitch Reducing Optical Fiber Array Two-Dimensional (2D)

Pitch Reducing Optical Fiber Array Two-Dimensional (2D) PROFA Pitch Reducing Optical Fiber Array Two-Dimensional (2D) Pitch Reducing Optical Fiber Arrays (PROFAs) provide low loss coupling between standard optical fibers and photonic integrated circuits. Unlike

More information

Lecture: Integration of silicon photonics with electronics. Prepared by Jean-Marc FEDELI CEA-LETI

Lecture: Integration of silicon photonics with electronics. Prepared by Jean-Marc FEDELI CEA-LETI Lecture: Integration of silicon photonics with electronics Prepared by Jean-Marc FEDELI CEA-LETI Context The goal is to give optical functionalities to electronics integrated circuit (EIC) The objectives

More information

Integration Techniques for MMICs and Chip Devices in LTCC Multichip Modules for Radio Frequencies

Integration Techniques for MMICs and Chip Devices in LTCC Multichip Modules for Radio Frequencies Integration Techniques for MMICs and Chip Devices in LTCC Multichip Modules for Radio Frequencies R. Kulke *, W. Simon *, M. Rittweger *, I. Wolff *, S. Baker +, R. Powell + and M. Harrison + * Institute

More information

Chapter 2. Literature Review

Chapter 2. Literature Review Chapter 2 Literature Review 2.1 Development of Electronic Packaging Electronic Packaging is to assemble an integrated circuit device with specific function and to connect with other electronic devices.

More information

High Frequency Single & Multi-chip Modules based on LCP Substrates

High Frequency Single & Multi-chip Modules based on LCP Substrates High Frequency Single & Multi-chip Modules based on Substrates Overview Labtech Microwave has produced modules for MMIC s (microwave monolithic integrated circuits) based on (liquid crystal polymer) substrates

More information

Manufacture and Performance of a Z-interconnect HDI Circuit Card Abstract Introduction

Manufacture and Performance of a Z-interconnect HDI Circuit Card Abstract Introduction Manufacture and Performance of a Z-interconnect HDI Circuit Card Michael Rowlands, Rabindra Das, John Lauffer, Voya Markovich EI (Endicott Interconnect Technologies) 1093 Clark Street, Endicott, NY 13760

More information

Micro-sensors - what happens when you make "classical" devices "small": MEMS devices and integrated bolometric IR detectors

Micro-sensors - what happens when you make classical devices small: MEMS devices and integrated bolometric IR detectors Micro-sensors - what happens when you make "classical" devices "small": MEMS devices and integrated bolometric IR detectors Dean P. Neikirk 1 MURI bio-ir sensors kick-off 6/16/98 Where are the targets

More information

A Miniaturized Multi-Channel TR Module Design Based on Silicon Substrate

A Miniaturized Multi-Channel TR Module Design Based on Silicon Substrate Progress In Electromagnetics Research Letters, Vol. 74, 117 123, 2018 A Miniaturized Multi-Channel TR Module Design Based on Silicon Substrate Jun Zhou 1, 2, *, Jiapeng Yang 1, Donglei Zhao 1, and Dongsheng

More information

B. Flip-Chip Technology

B. Flip-Chip Technology B. Flip-Chip Technology B1. Level 1. Introduction to Flip-Chip techniques B1.1 Why flip-chip? In the development of packaging of electronics the aim is to lower cost, increase the packaging density, improve

More information

CHAPTER 11: Testing, Assembly, and Packaging

CHAPTER 11: Testing, Assembly, and Packaging Chapter 11 1 CHAPTER 11: Testing, Assembly, and Packaging The previous chapters focus on the fabrication of devices in silicon or the frontend technology. Hundreds of chips can be built on a single wafer,

More information

Advanced High-Density Interconnection Technology

Advanced High-Density Interconnection Technology Advanced High-Density Interconnection Technology Osamu Nakao 1 This report introduces Fujikura s all-polyimide IVH (interstitial Via Hole)-multi-layer circuit boards and device-embedding technology. Employing

More information

Processes for Flexible Electronic Systems

Processes for Flexible Electronic Systems Processes for Flexible Electronic Systems Michael Feil Fraunhofer Institut feil@izm-m.fraunhofer.de Outline Introduction Single sheet versus reel-to-reel (R2R) Substrate materials R2R printing processes

More information

inemi OPTOELECTRONICS ROADMAP FOR 2004 Dr. Laura J. Turbini University of Toronto SMTA International September 26, 2005

inemi OPTOELECTRONICS ROADMAP FOR 2004 Dr. Laura J. Turbini University of Toronto SMTA International September 26, 2005 inemi OPTOELECTRONICS ROADMAP FOR 2004 0 Dr. Laura J. Turbini University of Toronto SMTA International September 26, 2005 Outline Business Overview Traditional vs Jisso Packaging Levels Optoelectronics

More information

Specifications subject to change Packaging

Specifications subject to change Packaging VCSEL Standard Product Packaging Options All standard products are represented in the table below. The Part Number for a standard product is determined by replacing the x in the column Generic Part Number

More information

Advances in CO 2 -Laser Drilling of Glass Substrates

Advances in CO 2 -Laser Drilling of Glass Substrates Available online at www.sciencedirect.com Physics Procedia 39 (2012 ) 548 555 LANE 2012 Advances in CO 2 -Laser Drilling of Glass Substrates Lars Brusberg,a, Marco Queisser b, Clemens Gentsch b, Henning

More information

5G Systems and Packaging Opportunities

5G Systems and Packaging Opportunities 5G Systems and Packaging Opportunities Rick Sturdivant, Ph.D. Founder and Chief Technology Officer MPT, Inc. (www.mptcorp.com), ricksturdivant@gmail.com Abstract 5G systems are being developed to meet

More information

User s Guide to. Centre for Materials for Electronics Technology Panchawati, Off Pashan Road, Pune September Version 2.

User s Guide to. Centre for Materials for Electronics Technology Panchawati, Off Pashan Road, Pune September Version 2. User s Guide to Centre for Materials for Electronics Technology Panchawati, Off Pashan Road, Pune 411008 September 2013 Version 2.1 Contents 1 Designing of LTCC Structures and Design Rules... 01 1.1 Guidelines

More information

IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS 2010 Silicon Photonic Circuits: On-CMOS Integration, Fiber Optical Coupling, and Packaging

IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS 2010 Silicon Photonic Circuits: On-CMOS Integration, Fiber Optical Coupling, and Packaging IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS 2010 Silicon Photonic Circuits: On-CMOS Integration, Fiber Optical Coupling, and Packaging Christophe Kopp, St ephane Bernab e, Badhise Ben Bakir,

More information

Assembly/Packagng RF-PCB. Thick Film. Thin Film. Screening/Test. Design Manual

Assembly/Packagng RF-PCB. Thick Film. Thin Film. Screening/Test. Design Manual Thick Film Thin Film RF-PCB Assembly/Packagng Screening/Test Design Manual RHe Design Manual The following rules are effective for the draft of circuit boards and hybrid assemblies. The instructions are

More information

Optoelectronics Packaging Research at UIC. Peter Borgesen, Ph.D. Project Manager

Optoelectronics Packaging Research at UIC. Peter Borgesen, Ph.D. Project Manager Optoelectronics Packaging Research at UIC Peter Borgesen, Ph.D. Project Manager Abstract The present document offers a brief overview of ongoing research into photonic packaging issues within the SMT Laboratory

More information

Convergence Challenges of Photonics with Electronics

Convergence Challenges of Photonics with Electronics Convergence Challenges of Photonics with Electronics Edward Palen, Ph.D., P.E. PalenSolutions - Optoelectronic Packaging Consulting www.palensolutions.com palensolutions@earthlink.net 415-850-8166 October

More information

A Miniaturized Wide-Band LTCC Based Fractal Antenna

A Miniaturized Wide-Band LTCC Based Fractal Antenna A Miniaturized Wide-Band LTCC Based Fractal Antenna Farhan A. Ghaffar, Atif Shamim and Khaled N. Salama Electrical Engineering Program King Abdullah University of Science and Technology Thuwal 23955-6500,

More information

CHAPTER 2 POLARIZATION SPLITTER- ROTATOR BASED ON A DOUBLE- ETCHED DIRECTIONAL COUPLER

CHAPTER 2 POLARIZATION SPLITTER- ROTATOR BASED ON A DOUBLE- ETCHED DIRECTIONAL COUPLER CHAPTER 2 POLARIZATION SPLITTER- ROTATOR BASED ON A DOUBLE- ETCHED DIRECTIONAL COUPLER As we discussed in chapter 1, silicon photonics has received much attention in the last decade. The main reason is

More information

Designing and Building Microwave Circuits in LTCC

Designing and Building Microwave Circuits in LTCC Designing and Building Microwave Circuits in LTCC Prakash Bhartia & Akshay Mathur Natel Engineering Co., Inc. Chatsworth, CA 91311 USA Deepukumar Nair, Jim Parisi, Ken Souders DuPont Electronics and Communications,

More information

3D Integration Using Wafer-Level Packaging

3D Integration Using Wafer-Level Packaging 3D Integration Using Wafer-Level Packaging July 21, 2008 Patty Chang-Chien MMIC Array Receivers & Spectrographs Workshop Pasadena, CA Agenda Wafer-Level Packaging Technology Overview IRAD development on

More information

Chapter 11 Testing, Assembly, and Packaging

Chapter 11 Testing, Assembly, and Packaging Chapter 11 Testing, Assembly, and Packaging Professor Paul K. Chu Testing The finished wafer is put on a holder and aligned for testing under a microscope Each chip on the wafer is inspected by a multiple-point

More information

Integrated Photonics using the POET Optical InterposerTM Platform

Integrated Photonics using the POET Optical InterposerTM Platform Integrated Photonics using the POET Optical InterposerTM Platform Dr. Suresh Venkatesan CIOE Conference Shenzhen, China Sept. 5, 2018 POET Technologies Inc. TSXV: PUBLIC POET PTK.V Technologies Inc. PUBLIC

More information

A novel tunable diode laser using volume holographic gratings

A novel tunable diode laser using volume holographic gratings A novel tunable diode laser using volume holographic gratings Christophe Moser *, Lawrence Ho and Frank Havermeyer Ondax, Inc. 85 E. Duarte Road, Monrovia, CA 9116, USA ABSTRACT We have developed a self-aligned

More information

DEVELOPMENT AND PRODUCTION OF HYBRID CIRCUITS FOR MICROWAVE RADIO LINKS

DEVELOPMENT AND PRODUCTION OF HYBRID CIRCUITS FOR MICROWAVE RADIO LINKS Electrocomponent Science and Technology 1977, Vol. 4, pp. 79-83 (C)Gordon and Breach Science Publishers Ltd., 1977 Printed in Great Britain DEVELOPMENT AND PRODUCTION OF HYBRID CIRCUITS FOR MICROWAVE RADIO

More information

Integration of Optoelectronic and RF Devices for Applications in Optical Interconnect and Wireless Communication

Integration of Optoelectronic and RF Devices for Applications in Optical Interconnect and Wireless Communication Integration of Optoelectronic and RF Devices for Applications in Optical Interconnect and Wireless Communication Zhaoran (Rena) Huang Assistant Professor Department of Electrical, Computer and System Engineering

More information

High efficient heat dissipation on printed circuit boards

High efficient heat dissipation on printed circuit boards High efficient heat dissipation on printed circuit boards Figure 1: Heat flux in a PCB Markus Wille Schoeller Electronics Systems GmbH www.schoeller-electronics.com Abstract This paper describes various

More information

Application Note 5026

Application Note 5026 Surface Laminar Circuit (SLC) Ball Grid Array (BGA) Eutectic Surface Mount Assembly Application Note 5026 Introduction This document outlines the design and assembly guidelines for surface laminar circuitry

More information

Silicon Interposers enable high performance capacitors

Silicon Interposers enable high performance capacitors Interposers between ICs and package substrates that contain thin film capacitors have been used previously in order to improve circuit performance. However, with the interconnect inductance due to wire

More information

EMERGING SUBSTRATE TECHNOLOGIES FOR PACKAGING

EMERGING SUBSTRATE TECHNOLOGIES FOR PACKAGING EMERGING SUBSTRATE TECHNOLOGIES FOR PACKAGING Henry H. Utsunomiya Interconnection Technologies, Inc. Suwa City, Nagano Prefecture, Japan henryutsunomiya@mac.com ABSTRACT This presentation will outline

More information

Light source approach for silicon photonics transceivers September Fiber to the Chip

Light source approach for silicon photonics transceivers September Fiber to the Chip Light source approach for silicon photonics transceivers September 2014 Fiber to the Chip Silicon Photonics Silicon Photonics Technology: Silicon material system & processing techniques to manufacture

More information

Figure 7 Dynamic range expansion of Shack- Hartmann sensor using a spatial-light modulator

Figure 7 Dynamic range expansion of Shack- Hartmann sensor using a spatial-light modulator Figure 4 Advantage of having smaller focal spot on CCD with super-fine pixels: Larger focal point compromises the sensitivity, spatial resolution, and accuracy. Figure 1 Typical microlens array for Shack-Hartmann

More information

Optical Bus for Intra and Inter-chip Optical Interconnects

Optical Bus for Intra and Inter-chip Optical Interconnects Optical Bus for Intra and Inter-chip Optical Interconnects Xiaolong Wang Omega Optics Inc., Austin, TX Ray T. Chen University of Texas at Austin, Austin, TX Outline Perspective of Optical Backplane Bus

More information

Silicon Photonics Transceivers for Hyper Scale Datacenters: Deployment and Roadmap

Silicon Photonics Transceivers for Hyper Scale Datacenters: Deployment and Roadmap Silicon Photonics Transceivers for Hyper Scale Datacenters: Deployment and Roadmap Peter De Dobbelaere Luxtera Inc. 09/19/2016 Luxtera Proprietary www.luxtera.com Luxtera Company Introduction $100B+ Shift

More information

BMC s heritage deformable mirror technology that uses hysteresis free electrostatic

BMC s heritage deformable mirror technology that uses hysteresis free electrostatic Optical Modulator Technical Whitepaper MEMS Optical Modulator Technology Overview The BMC MEMS Optical Modulator, shown in Figure 1, was designed for use in free space optical communication systems. The

More information

Analysis signal transitions characteristics of BGA-via multi-chip module Baolin Zhou1,a, Dejian Zhou1,b

Analysis signal transitions characteristics of BGA-via multi-chip module Baolin Zhou1,a, Dejian Zhou1,b 5th International Conference on Computer Sciences and Automation Engineering (ICCSAE 2015) Analysis signal transitions characteristics of BGA-via multi-chip module Baolin Zhou1,a, Dejian Zhou1,b 1 Electromechanical

More information

Tape Automated Bonding

Tape Automated Bonding Tape Automated Bonding Introduction TAB evolved from the minimod project begun at General Electric in 1965, and the term Tape Automated Bonding was coined by Gerard Dehaine of Honeywell Bull in 1971. The

More information

Photonic device package design, assembly and encapsulation.

Photonic device package design, assembly and encapsulation. Photonic device package design, assembly and encapsulation. Abstract. A.Bos, E. Boschman Advanced Packaging Center. Duiven, The Netherlands Photonic devices like Optical transceivers, Solar cells, LED

More information

Flip-Chip Integration of 2-D 850 nm Backside Emitting Vertical Cavity Laser Diode Arrays

Flip-Chip Integration of 2-D 850 nm Backside Emitting Vertical Cavity Laser Diode Arrays Flip-Chip Integration of 2-D 850 nm Backside Emitting Vertical Cavity Laser Diode Arrays Hendrik Roscher Two-dimensional (2-D) arrays of 850 nm substrate side emitting oxide-confined verticalcavity lasers

More information

Application Note 5012

Application Note 5012 MGA-61563 High Performance GaAs MMIC Amplifier Application Note 5012 Application Information The MGA-61563 is a high performance GaAs MMIC amplifier fabricated with Avago Technologies E-pHEMT process and

More information

Optical beam steering using a 2D MEMS scanner

Optical beam steering using a 2D MEMS scanner Optical beam steering using a 2D MEMS scanner Yves Pétremand a, Pierre-André Clerc a, Marc Epitaux b, Ralf Hauffe c, Wilfried Noell a and N.F. de Rooij a a Institute of Microtechnology, University of Neuchâtel,

More information

Multi-gigabit intra-satellite interconnects employing multi-core fibers and optical engines

Multi-gigabit intra-satellite interconnects employing multi-core fibers and optical engines VTT TECHNICAL RESEARCH CENTRE OF FINLAND LTD at ICSO conference 19 Oct 2016 Multi-gigabit intra-satellite interconnects employing multi-core fibers and optical engines Mikko Karppinen et al. VTT P. Westbergh,

More information

Index. Cambridge University Press Silicon Photonics Design Lukas Chrostowski and Michael Hochberg. Index.

Index. Cambridge University Press Silicon Photonics Design Lukas Chrostowski and Michael Hochberg. Index. absorption, 69 active tuning, 234 alignment, 394 396 apodization, 164 applications, 7 automated optical probe station, 389 397 avalanche detector, 268 back reflection, 164 band structures, 30 bandwidth

More information

Examination Optoelectronic Communication Technology. April 11, Name: Student ID number: OCT1 1: OCT 2: OCT 3: OCT 4: Total: Grade:

Examination Optoelectronic Communication Technology. April 11, Name: Student ID number: OCT1 1: OCT 2: OCT 3: OCT 4: Total: Grade: Examination Optoelectronic Communication Technology April, 26 Name: Student ID number: OCT : OCT 2: OCT 3: OCT 4: Total: Grade: Declaration of Consent I hereby agree to have my exam results published on

More information

Wafer-scale 3D integration of silicon-on-insulator RF amplifiers

Wafer-scale 3D integration of silicon-on-insulator RF amplifiers Wafer-scale integration of silicon-on-insulator RF amplifiers The MIT Faculty has made this article openly available. Please share how this access benefits you. Your story matters. Citation As Published

More information

An Introduction to Electronics Systems Packaging. Prof. G. V. Mahesh. Department of Electronic Systems Engineering

An Introduction to Electronics Systems Packaging. Prof. G. V. Mahesh. Department of Electronic Systems Engineering An Introduction to Electronics Systems Packaging Prof. G. V. Mahesh Department of Electronic Systems Engineering India Institute of Science, Bangalore Module No. # 02 Lecture No. # 08 Wafer Packaging Packaging

More information

Scalable Electro-optical Assembly Techniques for Silicon Photonics

Scalable Electro-optical Assembly Techniques for Silicon Photonics Scalable Electro-optical Assembly Techniques for Silicon Photonics Bert Jan Offrein, Tymon Barwicz, Paul Fortier OIDA Workshop on Manufacturing Trends for Integrated Photonics Outline Broadband large channel

More information

Handling and Processing Details for Ceramic LEDs Application Note

Handling and Processing Details for Ceramic LEDs Application Note Handling and Processing Details for Ceramic LEDs Application Note Abstract This application note provides information about the recommended handling and processing of ceramic LEDs from OSRAM Opto Semiconductors.

More information

VERTICAL CAVITY SURFACE EMITTING LASER

VERTICAL CAVITY SURFACE EMITTING LASER VERTICAL CAVITY SURFACE EMITTING LASER Nandhavel International University Bremen 1/14 Outline Laser action, optical cavity (Fabry Perot, DBR and DBF) What is VCSEL? How does VCSEL work? How is it different

More information

MGA GHz 3 V, 17 dbm Amplifier. Data Sheet. Features. Description. Applications. Surface Mount Package. Simplified Schematic

MGA GHz 3 V, 17 dbm Amplifier. Data Sheet. Features. Description. Applications. Surface Mount Package. Simplified Schematic MGA-853.1 GHz 3 V, 17 dbm Amplifier Data Sheet Description Avago s MGA-853 is an economical, easy-to-use GaAs MMIC amplifier that offers excellent power and low noise figure for applications from.1 to

More information

Application Note 5011

Application Note 5011 MGA-62563 High Performance GaAs MMIC Amplifier Application Note 511 Application Information The MGA-62563 is a high performance GaAs MMIC amplifier fabricated with Avago Technologies E-pHEMT process and

More information

MICROELECTRONICS ASSSEMBLY TECHNOLOGIES. The QFN Platform as a Chip Packaging Foundation

MICROELECTRONICS ASSSEMBLY TECHNOLOGIES. The QFN Platform as a Chip Packaging Foundation West Coast Luncheon January 15, 2014. PROMEX PROMEX INDUSTRIES INC. MICROELECTRONICS ASSSEMBLY TECHNOLOGIES The QFN Platform as a Chip Packaging Foundation 3075 Oakmead Village Drive Santa Clara CA Ɩ 95051

More information

Characterization of Parallel Optical-interconnect Waveguides Integrated on a Printed Circuit Board

Characterization of Parallel Optical-interconnect Waveguides Integrated on a Printed Circuit Board RZ 343 (# 99) 4/12/4 Mathematics & Physics 8 pages Research Report Characterization of Parallel Optical-interconnect Waveguides Integrated on a Printed Circuit Board G.L. Bona, 1 B.J. Offrein, 1 U. Bapst,

More information

High Efficient Heat Dissipation on Printed Circuit Boards. Markus Wille, R&D Manager, Schoeller Electronics Systems GmbH

High Efficient Heat Dissipation on Printed Circuit Boards. Markus Wille, R&D Manager, Schoeller Electronics Systems GmbH High Efficient Heat Dissipation on Printed Circuit Boards Markus Wille, R&D Manager, Schoeller Electronics Systems GmbH m.wille@se-pcb.de Introduction 2 Heat Flux: Q x y Q z The substrate (insulation)

More information

3D integrated POL converter

3D integrated POL converter 3D integrated POL converter Presented by: Arthur Ball I- 1 Motivation for this work Today s typical approach for >15A output Point of Load converters: Use PCB material for the entire circuit layout. Need

More information

Silicon photonics with low loss and small polarization dependency. Timo Aalto VTT Technical Research Centre of Finland

Silicon photonics with low loss and small polarization dependency. Timo Aalto VTT Technical Research Centre of Finland Silicon photonics with low loss and small polarization dependency Timo Aalto VTT Technical Research Centre of Finland EPIC workshop in Tokyo, 9 th November 2017 VTT Technical Research Center of Finland

More information

Chip Scale Package Fiber Optic Transceiver Integration for Harsh Environments

Chip Scale Package Fiber Optic Transceiver Integration for Harsh Environments Chip Scale Package Fiber Optic Transceiver Integration for Harsh Environments Chuck Tabbert and Charlie Kuznia Ultra Communications, Inc. 990 Park Center Drive, Suite H Vista, CA, USA, 92081 ctabbert@

More information

InP-based Waveguide Photodetector with Integrated Photon Multiplication

InP-based Waveguide Photodetector with Integrated Photon Multiplication InP-based Waveguide Photodetector with Integrated Photon Multiplication D.Pasquariello,J.Piprek,D.Lasaosa,andJ.E.Bowers Electrical and Computer Engineering Department University of California, Santa Barbara,

More information

Plan Optik AG. Plan Optik AG PRODUCT CATALOGUE

Plan Optik AG. Plan Optik AG PRODUCT CATALOGUE Plan Optik AG Plan Optik AG PRODUCT CATALOGUE 2 In order to service the high demand of wafers more quickly, Plan Optik provides off the shelf products in sizes from 2 up to 300mm diameter. Therefore Plan

More information

A 3.9 ns 8.9 mw 4 4 Silicon Photonic Switch Hybrid-Integrated with CMOS Driver

A 3.9 ns 8.9 mw 4 4 Silicon Photonic Switch Hybrid-Integrated with CMOS Driver A 3.9 ns 8.9 mw 4 4 Silicon Photonic Switch Hybrid-Integrated with CMOS Driver A. Rylyakov, C. Schow, B. Lee, W. Green, J. Van Campenhout, M. Yang, F. Doany, S. Assefa, C. Jahnes, J. Kash, Y. Vlasov IBM

More information

Semiconductor Lasers Semiconductors were originally pumped by lasers or e-beams First diode types developed in 1962: Create a pn junction in

Semiconductor Lasers Semiconductors were originally pumped by lasers or e-beams First diode types developed in 1962: Create a pn junction in Semiconductor Lasers Semiconductors were originally pumped by lasers or e-beams First diode types developed in 1962: Create a pn junction in semiconductor material Pumped now with high current density

More information

Microwave Characterization and Modeling of Multilayered Cofired Ceramic Waveguides

Microwave Characterization and Modeling of Multilayered Cofired Ceramic Waveguides Microwave Characterization and Modeling of Multilayered Cofired Ceramic Waveguides Microwave Characterization and Modeling of Multilayered Cofired Ceramic Waveguides Daniel Stevens and John Gipprich Northrop

More information

Introduction: Planar Transmission Lines

Introduction: Planar Transmission Lines Chapter-1 Introduction: Planar Transmission Lines 1.1 Overview Microwave integrated circuit (MIC) techniques represent an extension of integrated circuit technology to microwave frequencies. Since four

More information

Through Glass Via (TGV) Technology for RF Applications

Through Glass Via (TGV) Technology for RF Applications Through Glass Via (TGV) Technology for RF Applications C. H. Yun 1, S. Kuramochi 2, and A. B. Shorey 3 1 Qualcomm Technologies, Inc. 5775 Morehouse Dr., San Diego, California 92121, USA Ph: +1-858-651-5449,

More information

UMS User guide for bare dies GaAs MMIC. storage, pick & place, die attach and wire bonding

UMS User guide for bare dies GaAs MMIC. storage, pick & place, die attach and wire bonding UMS User guide for bare dies GaAs MMIC storage, pick & place, die attach and wire bonding Ref. : AN00014097-07 Apr 14 1/10 Specifications subject to change without notice United Monolithic Semiconductors

More information

Ultra-Low-Loss Athermal AWG Module with a Large Number of Channels

Ultra-Low-Loss Athermal AWG Module with a Large Number of Channels Ultra-Low-Loss Athermal AWG Module with a Large Number of Channels by Junichi Hasegawa * and Kazutaka Nara * There is an urgent need for an arrayed waveguide grating (AWG), the device ABSTRACT that handles

More information

(12) Patent Application Publication (10) Pub. No.: US 2003/ A1

(12) Patent Application Publication (10) Pub. No.: US 2003/ A1 US 20030091084A1 (19) United States (12) Patent Application Publication (10) Pub. No.: US 2003/0091084A1 Sun et al. (43) Pub. Date: May 15, 2003 (54) INTEGRATION OF VCSEL ARRAY AND Publication Classification

More information

MICROMACHINED INTERFEROMETER FOR MEMS METROLOGY

MICROMACHINED INTERFEROMETER FOR MEMS METROLOGY MICROMACHINED INTERFEROMETER FOR MEMS METROLOGY Byungki Kim, H. Ali Razavi, F. Levent Degertekin, Thomas R. Kurfess G.W. Woodruff School of Mechanical Engineering, Georgia Institute of Technology, Atlanta,

More information

MA4AGSW2. AlGaAs SP2T PIN Diode Switch. MA4AGSW2 Layout. Features. Description. Absolute Maximum Ratings TA = +25 C (Unless otherwise specified)

MA4AGSW2. AlGaAs SP2T PIN Diode Switch. MA4AGSW2 Layout. Features. Description. Absolute Maximum Ratings TA = +25 C (Unless otherwise specified) AlGaAs SP2T PIN Diode Switch Features Ultra Broad Bandwidth: 5 MHz to 5 GHz Functional bandwidth : 5 MHz to 7 GHz.7 db Insertion Loss, 33 db Isolation at 5 GHz Low Current consumption: -1 ma for Low Loss

More information

3D TSV Micro Cu Column Chip-to-Substrate/Chip Assmbly/Packaging Technology

3D TSV Micro Cu Column Chip-to-Substrate/Chip Assmbly/Packaging Technology 3D TSV Micro Cu Column Chip-to-Substrate/Chip Assmbly/Packaging Technology by Seung Wook Yoon, *K. T. Kang, W. K. Choi, * H. T. Lee, Andy C. B. Yong and Pandi C. Marimuthu STATS ChipPAC LTD, 5 Yishun Street

More information

High-efficiency, high-speed VCSELs with deep oxidation layers

High-efficiency, high-speed VCSELs with deep oxidation layers Manuscript for Review High-efficiency, high-speed VCSELs with deep oxidation layers Journal: Manuscript ID: Manuscript Type: Date Submitted by the Author: Complete List of Authors: Keywords: Electronics

More information

Laminate Based Fan-Out Embedded Die Technologies: The Other Option

Laminate Based Fan-Out Embedded Die Technologies: The Other Option Laminate Based Fan-Out Embedded Die Technologies: The Other Option Theodore (Ted) G. Tessier, Tanja Karila*, Tuomas Waris*, Mark Dhaenens and David Clark FlipChip International, LLC 3701 E University Drive

More information

Development of 14 Gbit/s Uncooled TOSA with Wide Operating Temperature Range

Development of 14 Gbit/s Uncooled TOSA with Wide Operating Temperature Range INFORMATION & COMMUNICATIONS Development of 14 Gbit/s Uncooled TOSA with Wide Operating Temperature Range Shunsuke SATO*, Hayato FUJITA*, Keiji TANAKA, Akihiro MOTO, Masaaki ONO and Tomoya SAEKI The authors

More information

Long-wavelength VCSELs ready to benefit 40/100-GbE modules

Long-wavelength VCSELs ready to benefit 40/100-GbE modules Long-wavelength VCSELs ready to benefit 40/100-GbE modules Process technology advances now enable long-wavelength VCSELs to demonstrate the reliability needed to fulfill their promise for high-speed module

More information

ISSCC 2006 / SESSION 10 / mm-wave AND BEYOND / 10.1

ISSCC 2006 / SESSION 10 / mm-wave AND BEYOND / 10.1 10.1 A 77GHz 4-Element Phased Array Receiver with On-Chip Dipole Antennas in Silicon A. Babakhani, X. Guan, A. Komijani, A. Natarajan, A. Hajimiri California Institute of Technology, Pasadena, CA Achieving

More information

Silicon Photonics Technology Platform To Advance The Development Of Optical Interconnects

Silicon Photonics Technology Platform To Advance The Development Of Optical Interconnects Silicon Photonics Technology Platform To Advance The Development Of Optical Interconnects By Mieke Van Bavel, science editor, imec, Belgium; Joris Van Campenhout, imec, Belgium; Wim Bogaerts, imec s associated

More information

How Long is Too Long? A Via Stub Electrical Performance Study

How Long is Too Long? A Via Stub Electrical Performance Study How Long is Too Long? A Via Stub Electrical Performance Study Michael Rowlands, Endicott Interconnect Michael.rowlands@eitny.com, 607.755.5143 Jianzhuang Huang, Endicott Interconnect 1 Abstract As signal

More information

Improving Density in Microwave Multilayer Printed Circuit Boards for Space Applications

Improving Density in Microwave Multilayer Printed Circuit Boards for Space Applications Improving Density in Microwave Multilayer Printed Circuit Boards for Space Applications David NÉVO (1) Olivier VENDIER (1), Jean-Louis CAZAUX (1), Jean-Luc LORTAL (2) (1) Thales Alenia Space 26 avenue

More information

SpaceFibre Fibre-optic Link

SpaceFibre Fibre-optic Link SpaceFibre Fibre-optic Link 1 Jaakko Toivonen,, Patria Aviation Oy The SpaceFibre Development ESA study Optical Links for the SpaceWire Intra- Satellite Network Standard, i.e. SpaceFibre in 2004-2006 SpaceFibre

More information

LTCC modules for a multiple 3-bit phase shifter with RF-MEMS-switch integration

LTCC modules for a multiple 3-bit phase shifter with RF-MEMS-switch integration LTCC modules for a multiple 3-bit phase shifter with RF-MEMS-switch integration Thomas Bartnitzek, Edda Müller, VIA electronic GmbH, Hermsdorf, Germany Raymond van Dijk, TNO-DSS, The Hague, Netherlands

More information

Modeling, Design, and Demonstration of 2.5D Glass Interposers for 16-Channel 28 Gbps Signaling Applications

Modeling, Design, and Demonstration of 2.5D Glass Interposers for 16-Channel 28 Gbps Signaling Applications Modeling, Design, and Demonstration of 2.5D Glass Interposers for 16-Channel 28 Gbps Signaling Applications Brett Sawyer, Bruce C. Chou, Saumya Gandhi, Jack Mateosky, Venky Sundaram, and Rao Tummala 3D

More information

WWDM Transceiver Module for 10-Gb/s Ethernet

WWDM Transceiver Module for 10-Gb/s Ethernet WWDM Transceiver Module for 10-Gb/s Ethernet Brian E. Lemoff Hewlett-Packard Laboratories lemoff@hpl.hp.com IEEE 802.3 HSSG Interim Meeting Coeur d Alene, Idaho June 1-3, 1999 Why pursue WWDM for the LAN?

More information

Presentation Overview

Presentation Overview Low-cost WDM Transceiver Technology for 10-Gigabit Ethernet and Beyond Brian E. Lemoff, Lisa A. Buckman, Andrew J. Schmit, and David W. Dolfi Agilent Laboratories Hot Interconnects 2000 Stanford, CA August

More information

RF and Microwave Components in LTCC

RF and Microwave Components in LTCC RF and Microwave Components in LTCC Liam Devlin*, Graham Pearson*, Jonathan Pittock* Bob Hunt Ψ Abstract Low Temperature Co-fired Ceramic (LTCC) technology is a multi-layer ceramic process that can be

More information

MGA GHz 3 V, 17 dbm Amplifier. Data Sheet

MGA GHz 3 V, 17 dbm Amplifier. Data Sheet MGA-853.1 GHz 3 V, 17 dbm Amplifier Data Sheet Description Avago s MGA-853 is an economical, easy-to-use GaAs MMIC amplifier that offers excellent power and low noise figure for applications from.1 to

More information