3-Phase Brushless DC Motor Controller

Transcription

1 -Phase Brushless D Motor ontroller DESRIPTION The Si999 is a monolithic brushless dc motor controller with integral high-side drive circuitry. The Si999 is configured to allow either 0 or 0 commutation sensor spacing. The internal low-voltage regulator allows operation over a wide input voltage range, 0 to 0 dc. The Si999 provides commutation from Hall-effect sensors. The integral high-side drive, which utilizes combination bootstrap/charge pump supplies, allows implementation of an all N-hannel MOSFET -phase bridge. PWM, direction, quadrature select, and braking inputs are included for control along with a tachometer output. Protection features include cross conduction protection, current limiting, and undervoltage lockout. The output indicates when undervoltage, over current, disable, or invalid sensor shutdown has occurred. The Si999 is available in both standard and lead (Pb)-free -pin SQFP packages and is specified to operate over the commercial temperature range of 0 to 0 ( suffix), and the industrial temperature range of - 0 to (D suffix). FEATURES Hall-Effect ommutation 0 or 0 Sensor Spacing Integral High-Side Drive for all N-hannel MOSFET Bridges PWM Input Quadrature Selection Tachometer Output Reversible Braking Output Enable ontrol ross onduction Protection urrent Limiting Undervoltage Lockout Internal Pull-Up Resistors FUNTIONAL BLOK DIAGRAM Low-oltage Regulator Low-Side U.. Lockout REF AP A AP B AP High-Side U.. Lockout Bootstrap Reg. harge Pump Bootstrap Reg. harge Pump 0 AP A GT A S A AP B GT B IN A IN B IN 0/0 EN F/R QS PWM BRK 9 0 REF REF REF REF REF Input Logic Bootstrap Reg. harge Pump 9 -, - -, - S B AP GT S GB A GB B GB / T One Shot I S - I S + S-09-Rev. E, -Jun-0

2 ABSOLUTE MAXIMUM RATINGS Parameter Limits Unit oltage on Pin 0 oltage on Pins -, 0, - 0. to + 0. oltage on Pins to. oltage on Pins,, 0,,, 0 oltage on Pins,, - to 0 Suffix 0 to 0 Operating Temperature D Suffix - 0 to Storage Temperature - to 0 Junction Temperature (T J ) 0 Power Dissipation (P D ) Suffix 0.0 D Suffix 0. W Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. REOMMENDED OPERATING RANGE Parameter Limit Unit + 0 to 0 D 0 kω Min SPEIFIATIONS Test onditions Limits Parameter Symbol Unless Otherwise Specified Unit = 0 to 0, I DD = 0 ma Min a Typ b Max a Power Supply oltage Range 0 0 Logic oltage - 0 ma I DD 0 ma.. Supply urrent I+. Logic urrent I DD - 0 ma Internal Reference d REF. ommutation Inputs (IN A, IN B, IN, 0/0) High-State IH.0 Low-State IL.0 High-State Input urrent I IH IH = 0 Low-State Input urrent I IL IL = 0-0 µa Logic Inputs (F/R, EN, QS, PWM, BRK) High-State IH.0 Low-State IL 0. High-State Input urrent I IH IH =. 0 Low-State Input urrent I IL IL = 0 - µa Outputs Low-Side Gate Drive, High State GBH. Low-Side Gate Drive, Low State GBL 0. T A = 0 to 0 Suffix High Side Gate Drive, High State GTH T A = - 0 to D Suffix 0 High-Side Gate Drive, Low State GTL 0. apacitor oltage d AP = 0 S-09-Rev. E, -Jun-0

3 SPEIFIATIONS Test onditions Limits Parameter Symbol Unless Otherwise Specified Unit = 0 to 0, I DD = 0 ma Min a Typ b Max a Outputs Low-Side Switching, Rise Time t rl 0 Risetime = to 0 Low-Side Switching, Fall Time t fl Falltime = 0 to High-Side Switching, Rise Time t rh L = 00 pf 00 ns High-Side Switching, Fall Time t fh 0 Break-Before-Make Time t BLH 00 t BHL 00 Output/ Output OL I OL =.0 ma Output Pulsewidth t T ns Protection Low-Side Undervoltage Lockout ULL. Low-Side Hysteresis H 0. High-Side Undervoltage Lockout ULH S A, B, = 0 -. urrent Limit omparator Input Bias urrent I IB - µa T omparator Threshold oltage A = 0 to 0 Suffix TH T A = - 0 to D Suffix 00 m ommon Mode oltage M 0 R One Shot Pulse Width t T = 0 k, T = 0.00 µf 0 p = 0 k, T = 0.0 µf µs Notes: a. The algebraic convention where by the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. The reference voltage is not available for external use. d. AP = () + ( ). OMMUTATION TRUTH TABLE Inputs Outputs onditions Sensors Sensors Top Drive Bottom Drive (0 Spacing) (0 Spacing) IN A IN B IN IN A IN B IN EN F/R BR I GT- GT- GT- GB GB GB K S+ A B A B X X X X X X 0 X 0 X Disable X X X X X X 0 X X Power Down L L L L L L X Brake L L L L L L X Over I in BRK L L L L L L X Over I 0 X 0 X X X X 0 X X X Notes: L. Any valid sensor combination X. Don t care. S-09-Rev. E, -Jun-0

4 PIN ONFIGURATION AND ORDERING INFORMATION SQFP- 0 9 IN A IN B IN 0/0 EN F/R QS PWM BRK AP A S A GT A GB A AP B S B GT B GB B AP S GT GB 9 0 ORDERING INFORMATION Standard Part Number Lead (Pb)-free Part Number Temperature Range Package Si999S Si999S-E 0 to 0 SQFP- Si999DS Si999DS-E - 0 to NOTE: Si999S and Si999DS are supplied in trays. / T I S + I S - Top iew PIN DESRIPTION Pins -: IN A, IN B, IN IN A, IN B, and IN are the commutation sensor inputs, and are intended to be driven by open collector Hall effect switches. These inputs have internal pull up resistors tied to, which eliminates the need for external pull up resistors. Pin : 0/0 The 0/0 input allows the use of the Si999 with either a 0 or 0 commutation sensor spacing. An internal pull up resistor, which is tied to, sets the default condition to 0 spacing. 0 spacing is selected by pulling this input to ground. Pin : EN (Enable) A logic "" on this input allows commutation of the motor. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, all gate drive outputs are turned off. Pin : F/R (Forward/Reverse) A logic "" on this input selects commutation for motor rotation in the "forward" direction. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, the commutation sensor logic levels are inverted internally, causing reverse rotation. Pin : QS (Quadrature Select) This input determines whether the bottom MOSFETs or both bottom and top MOSFETs switch in response to the PWM signal. A logic "" on this input enables only the bottom MOS- FETs. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, both the bottom and top MOSFETs are enabled. Pin : PWM An open collector (drain) or TTL compatible signal is applied to this input to control the motor speed. The QS input determines which MOSFETs are switched in response to the PWM signal. If no PWM signal is being used, this input is left open. It is pulled up internally, which allows the MOSFETs to follow the commutation sequence. S-09-Rev. E, -Jun-0

5 PIN DESRIPTION (ONT D) Pin 9: BRK With this input at logic "", the top MOSFETs are turned off and the bottom MOSFETs are turned on, shorting the motor windings together. This provides a braking torque which is dependent on the motor speed. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, the MOSFETs are allowed to follow the commutation sequence. Pin 0: This output provides a minimum 00 nanosecond output pulse for every commutation sensor transition, yielding a pulse per electrical revolution tachometer signal. This output is open drain. Pin : The output switches low to indicate that at least one of the following conditions exists, controller disable (EN), undervoltage lockout, invalid commutation sensor code shutdown, or overcurrent shutdown. This output is open drain. Pin : / T The junction of the current limit one shot timing resistor and capacitor is connected to this pin. This one-shot is triggered by the current limit comparator when an overcurrent condition exists. This action turns off all the gate drives for the period defined by and T, thus stopping the flow of current. Pin : One side of the current limit one shot timing resistor is connected to this pin. Pin 9: I S + This is the sensing input of the current limit comparator and should be connected to the positive side of the current sense resistor. When the voltage across the current sense resistor exceeds 00 m, the comparator switches and triggers the current limit one-shot. The one-shot turns off all the gate drives for the period defined by and T, thus stopping the flow of current. If the overcurrent condition remains after the shutdown period, the gate drives will be held off until the overcurrent condition no longer exists. Pin 0: I S - This pin is the ground reference for the current limit comparator. It should be connected directly to the ground side of the current sense resistor to enhance noise immunity. Pins -: -, -, -, These pins are the return path for both the logic and gate drive circuits. Also, they serve to conduct heat out of the package, into the circuit board. Pin : GB This is the gate drive output for the bottom MOSFET in Phase. Pin : GT This is the gate drive output for the top MOSFET in Phase. Pin : S This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOS- FET Drain, and the Phase output. Pin : AP This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase is connected between this pin and S. Pin 9: GB B This is the gate drive output for the bottom MOSFET in Phase B. Pin 0: GT B This is the gate drive output for the top MOSFET in Phase B. Pin : S B This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOS- FET Drain, and the Phase B output. Pin : AP B This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase B is connected between this pin and SB. Pin : GB A This is the gate drive output for the bottom MOSFET in Phase A. S-09-Rev. E, -Jun-0

6 PIN DESRIPTION (ONT D) Pin : GT A This is the gate drive output for the top MOSFET in Phase A. Pin : S A This pin is negative supply of the high-side drive circuitry. As such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOS- FET Drain, and the Phase A output. Pin : AP A This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase A is connected between this pin and SA. Pin : The supply voltage for the Si999 is connected between this pin and ground. The internal logic and high-side supply voltages are derived from. Pin : is the internal logic and gate drive voltage. It is necessary to connect a capacitor between this pin and ground to insure that the current surges seen at the turn on of the bottom MOSFETs does not trip the undervoltage lockout circuitry. APPLIATION IRUITS LITTLE FOOT Si999 Q Q Q To ommutation Sensors PWM IN µf T 9 0 IN A IN B IN EN F/R BRK 0/0 QS PWM / T -, - -, - GT A S A AP A GT B S B AP B GT S AP GB A GB B GB I S + I S B A B B B R R S Q Q A B Q To Motor Windings Figure. Three-Phase Brushless D Motor ontroller S-09-Rev. E, -Jun-0

7 APPLIATION IRUITS LITTLE FOOT Si999 Q Q To ommutation Sensor PWM IN µf T IN A IN B IN EN F/R 9 BRK 0/0 0 QS PWM R T / T -, - -, - GT A S A AP A GT B S B AP B GT S AP GB A GB B GB I S + I S B A B B R R S Q Q A B To Motor Windings Notes: ) If driving single phase BLD, tie IN A, IN B, and IN together and drive with single hall. ) If it is being used as an H- bridge controller, tie IN A, IN B, and IN to. Use F/R input to change active diagonal pair of MOSFETs. ) There is no output when connected in this configuration. Figure. Single H-Bridge ontroller LK M0 0 P 0 P MR PWM IN µf T 9 0 IN A IN B IN EN F/R BRK 0/0 Q S PWM / T Si999 GT A S A AP A GT B S B AP B GT S AP GB A GB B GB I S + I S - -, - -, B A B B B R R S Q Q Q Q LITTLE FOOT Q A B Q To Motor Windings Figure. Three-Phase A Motor ontroller S-09-Rev. E, -Jun-0

8 APPLIATION IRUITS µf Si999 = - BE Figure. External Regulator maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see S-09-Rev. E, -Jun-0

9 Package Information SQFP: -LEAD (XX. MM) SQUARE (POWER I ONLY) D D AITY MARK A A e b R 0. R 0. L L * For reference only MILLIMETERS INHES* Dim Min Max Min Max A A A b D D e 0.0 TYP 0.00 TYP L L EN: S-00 Rev. A, 0-Feb-0 DWG: 9 Document Number: 9-Jan-0

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