3-Phase Brushless DC Motor Controller

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1 End of Life. Last vailable Purchase Date is -Dec-0 Si999 -Phase Brushless D Motor ontroller FETURES Hall-Effect ommutation 0 or 0 Sensor Spacing Integral High-Side Drive for all N-hannel MOSFET Bridges PWM Input Quadrature Selection Tachometer Output Reversible Braking Output Enable ontrol ross onduction Protection urrent Limiting Undervoltage Lockout Internal Pull-Up Resistors DESRIPTION The Si999 is a monolithic brushless dc motor controller with integral high-side drive circuitry. The Si999 is configured to allow either 0 or 0 commutation sensor spacing. The internal low-voltage regulator allows operation over a wide input voltage range, 0- to 0-V dc. quadrature select, and braking inputs are included for control along with a tachometer output. Protection features include cross conduction protection, current limiting, and undervoltage lockout. The output indicates when undervoltage, over current, disable, or invalid sensor shutdown has occurred. The Si999 provides commutation from Hall-effect sensors. The integral high-side drive, which utilizes combination bootstrap/charge pump supplies, allows implementation of an all n-channel MOSFET -phase bridge. PWM, direction, The Si999 is available in both standard and lead (Pb)-free -pin SQFP packages and is specified to operate over the commercial temperature range of 0 to 0 ( suffix), and the industrial temperature range of 0 to (D suffix). FUNTIONL BLOK DIGRM Low-Voltage Regulator Low-Side U.V. Lockout P P B P High-Side U.V. Lockout Bootstrap Reg. harge Pump Bootstrap Reg. harge Pump 0 P GT S P B GT B IN IN B IN 0/0 EN F/R QS PWM BRK TH 9 0 Input Logic Bootstrap Reg. harge Pump 9 -, - -, - S B P GT S GB GB B GB / T One Shot I S

2 BSOLUTE MXIMUM RTINGS Voltage on Pin V Voltage on Pins, 0, V to + 0. V Voltage on Pins V to. V Voltage on Pins,, 0,,, V Voltage on Pins,, to 0 V Operating Temperature Suffix to 0 D Suffix to Storage Temperature to 0 Junction Temperature (T J ) Power Dissipation (P D ) Suffix W D Suffix W REOMMENDED OPERTING RNGE to 0 V D k Min SPEIFITIONS Test onditions Unless Otherwise Specified Limits Parameter Symbol = 0 to 0 V, I DD = 0 m Min a Typ b Max a Unit Power Supply Voltage Range 0 0 Logic Voltage 0 m I DD 0 m.. V Supply urrent I+. Logic urrent I DD 0 m Internal Reference d. V ommutation Inputs (IN, IN B, IN, 0/0) High-State V IH.0 Low-State V IL.0 V High-State Input urrent I IH V IH = 0 Low-State Input urrent I IL V IL = 0 V 0 Logic Inputs (F/R, EN, QS, PWM, BRK) High-State V IH.0 Low-State V IL 0. V High-State Input urrent I IH V IH =. V 0 Low-State Input urrent I IL V IL = 0 V Outputs Low-Side Gate Drive, High State V GBH. Low-Side Gate Drive, Low State V GBL 0. High-Side Gate Drive, High State V GTH T = 0 to D Suffix 0 V T = 0 to 0 Suffix High-Side Gate Drive, Low State V GTL 0. apacitor Voltage d V P = 0 V Low-Side Switching, Rise Time t rl 0 Low-Side Switching, Fall Time t fl Risetime = to 0 V Falltime = 0 to V High-Side Switching, Rise Time t rh 00 L = 00 pf ns High-Side Switching, Fall Time t fh 0 t BLH 00 Break-Before-Make Before Time t BHL 00 TH Output/ Output V OL I OL =.0 m V TH Output Pulsewidth t T ns

3 SPEIFITIONS Parameter Symbol Protection Test onditions Unless Otherwise Specified Limits = 0 to 0 V, I DD = 0 m Min a Typ b Max a Unit Low-Side Undervoltage Lockout UVLL. Low-Side Hysteresis V H 0. V High-Side Undervoltage Lockout UVLH S, B, = 0 V. urrent Limit omparator Input Bias urrent I IB omparator Threshold Voltage V TH T = 0 to D Suffix 00 mv T = 0 to 0 Suffix ommon Mode Voltage V M 0 V = 0 k, T = 0.00 F 0 One Shot Pulse Width t p = 0 k, T = 0.0 F s Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN ID ONLY, not guaranteed nor subject to production testing. c. The reference voltage is not available for external use. d. V P = () + ( ). OMMUTTION TRUTH TBLE Sensors (0 Spacing) Inputs Outputs onditions Sensors (0 Spacing) IN IN B IN IN IN B IN EN F/R BR K Top Drive GT- GT- B GT- Bottom Drive GB GB B GB X X X X X X 0 X 0 X Disable X X X X X X 0 X X Power Down L L L L L L X Brake L L L L L L X Over I in BRK L L L L L L X Over I 0 X 0 X X X X 0 X X X Notes: L. ny valid sensor combination X. Don t care

4 PIN ONFIGURTION ND ORDERING INFORMTION SQFP- 0 9 IN IN B IN 0/0 EN F/R QS PWM BRK TH P S GT GB P B S B GT B GB B P S GT GB 9 0 / T I S ORDERING INFORMTION Standard Part Number Lead (Pb)-Free Part Number Temperature Range Si999S Si999S E 0 to 0 Si999DS Si999DS E 0 to NOTE: Si999S and Si999DS are supplied in trays. Package SQFP- Top View PIN DESRIPTION Pins : IN, IN B, IN IN, IN B, and IN are the commutation sensor inputs, and are intended to be driven by open collector Hall effect switches. These inputs have internal pull up resistors tied to, which eliminates the need for external pull up resistors. Pin : 0/0 The 0/0 input allows the use of the Si999 with either a 0 or 0 commutation sensor spacing. n internal pull up resistor, which is tied to, sets the default condition to 0 spacing. 0 spacing is selected by pulling this input to ground. Pin : EN (Enable) logic on this input allows commutation of the motor. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, all gate drive outputs are turned off. Pin : F/R (Forward/Reverse) logic on this input selects commutation for motor rotation in the forward direction. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, the commutation sensor logic levels are inverted internally, causing reverse rotation. Pin : QS (Quadrature Select) This input determines whether the bottom MOSFETs or both bottom and top MOSFETs switch in response to the PWM signal. logic on this input enables only the bottom MOSFETs. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, both the bottom and top MOSFETs are enabled. Pin : PWM n open collector (drain) or TTL compatible signal is applied to this input to control the motor speed. The QS input determines which MOSFETs are switched in response to the PWM signal. If no PWM signal is being used, this input is left open. It is pulled up internally, which allows the MOSFETs to follow the commutation sequence.

5 PIN DESRIPTION (ONT D) Pin 9: BRK With this input at logic, the top MOSFETs are turned off and the bottom MOSFETs are turned on, shorting the motor windings together. This provides a braking torque which is dependent on the motor speed. This is the default condition as this pin is pulled up internally. When this pin is pulled to ground, the MOSFETs are allowed to follow the commutation sequence. Pin 0: TH This output provides a minimum 00-nanosecond output pulse for every commutation sensor transition, yielding a pulse per electrical revolution tachometer signal. This output is open drain. Pin : The output switches low to indicate that at least one of the following conditions exists, controller disable (EN), undervoltage lockout, invalid commutation sensor code shutdown, or overcurrent shutdown. This output is open drain. Pin : / T The junction of the current limit one shot timing resistor and capacitor is connected to this pin. This one-shot is triggered by the current limit comparator when an overcurrent condition exists. This action turns off all the gate drives for the period defined by and T, thus stopping the flow of current. Pin : One side of the current limit one shot timing resistor is connected to this pin. Pin 9: This is the sensing input of the current limit comparator and should be connected to the positive side of the current sense resistor. When the voltage across the current sense resistor exceeds 00 mv, the comparator switches and triggers the current limit one-shot. The one-shot turns off all the gate drives for the period defined by and T, thus stopping the flow of current. If the overcurrent condition remains after the shutdown period, the gate drives will be held off until the overcurrent condition no longer exists. Pin 0: I S This pin is the ground reference for the current limit comparator. It should be connected directly to the ground side of the current sense resistor to enhance noise immunity. Pins :,,, These pins are the return path for both the logic and gate drive circuits. lso, they serve to conduct heat out of the package, into the circuit board. Pin : GB This is the gate drive output for the bottom MOSFET in Phase. Pin : GT This is the gate drive output for the top MOSFET in Phase. Pin : S This pin is negative supply of the high-side drive circuitry. s such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOSFET Drain, and the Phase output. Pin : P This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase is connected between this pin and S. Pin 9: GB B This is the gate drive output for the bottom MOSFET in Phase B. Pin 0: GT B This is the gate drive output for the top MOSFET in Phase B. Pin : S B This pin is negative supply of the high-side drive circuitry. s such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOSFET Drain, and the Phase B output. Pin : P B This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase B is connected between this pin and SB. Pin : GB This is the gate drive output for the bottom MOSFET in Phase.

6 PIN DESRIPTION (ONT D) Pin : GT This is the gate drive output for the top MOSFET in Phase. Pin : S This pin is negative supply of the high-side drive circuitry. s such, it is the connection for the negative side of the bootstrap capacitor, the top MOSFET Source, the bottom MOSFET Drain, and the Phase output. Pin : P This pin is the positive supply of the high-side circuitry. The bootstrap capacitor for Phase is connected between this pin and S. Pin : The supply voltage for the Si999 is connected between this pin and ground. The internal logic and high-side supply voltages are derived from. Pin : is the internal logic and gate drive voltage. It is necessary to connect a capacitor between this pin and ground to insure that the current surges seen at the turn on of the bottom MOSFETs does not trip the undervoltage lockout circuitry. PPLITION IRUITS LITTLE FOOT Si999 Q Q Q To ommutation Sensors TH PWM IN F T 9 0 IN IN B IN EN F/R BRK 0/0 TH QS PWM / T GT S P GT B S B P B GT S P GB GB B GB I S B B B B R Q Q B Q To Motor Windings,, R S FIGURE. Three-Phase Brushless D Motor ontroller

7 PPLITION IRUITS LITTLE FOOT Si999 Q Q To ommutation Sensor TH PWM IN F T IN IN B IN EN F/R 9 BRK 0/0 0 TH QS PWM R T / T,, GT S P GT B S B P B GT S P GB GB B GB I S B B B R R S Q Q B To Motor Windings Notes: ) If driving single phase BLD, tie IN, IN B, and IN together and drive with single hall. ) If it is being used as an H- bridge controller, tie IN, IN B, and IN to. Use F/R input to change active diagonal pair of MOSFETs. ) There is no TH output when connected in this configuration. FIGURE. Single H-Bridge ontroller LITTLE FOOT LK M0 0 P 0 P MR TH PWM IN F T 9 0 IN IN B IN EN F/R BRK 0/0 TH Q PWM S / T Si999 GT S P GT B S B P B GT S P GB GB B GB I S,, B B B B R R S Q Q Q Q Q B Q To Motor Windings FIGURE. Three-Phase Motor ontroller

8 PPLITION IRUITS F Si999 = V BE FIGURE. External Regulator

9 Package Information SQFP: -LED (XX. MM) SQURE (POWER I ONLY) D D VITY MRK e b R 0. R 0. L L * For reference only MILLIMETERS INHES* Dim Min Max Min Max b D D e 0.0 TYP 0.00 TYP L L EN: S-00 Rev., 0-Feb-0 DWG: 9 Document Number: 9-Jan-0

10 Legal Disclaimer Notice Vishay Disclaimer LL PRODUT, PRODUT SPEIFITIONS ND DT RE SUBJET TO HNGE WITHOUT NOTIE TO IMPROVE RELIBILITY, FUNTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, Vishay ), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time. ll operating parameters, including typical parameters, must be validated for each customer application by the customer s technical experts. Product specifications do not expand or otherwise modify Vishay s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. ustomers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. 0 VISHY INTERTEHNOLOGY, IN. LL RIGHTS RESERVED Revision: 0-Feb- Document Number: 9000

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