FPGAs 101. Everything you need to know to get started. Gina R. Smith

Transcription

1 FPGAs 101

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3 FPGAs 101 Everything you need to know to get started Gina R. Smith AMSTERDAM BOSTON HEIDELBERG LONDON NEW YORK OXFORD PARIS SAN DIEGO SAN FRANCISCO SINGAPORE SYDNEY TOKYO Newnes is an imprint of Elsevier

4 Newnes is an imprint of Elsevier 30 Corporate Drive, Suite 400, Burlington, MA 01803, USA The Boulevard, Langford Lane, Kidlington, Oxford, OX5 1GB, UK # 2010 Elsevier Inc. All rights reserved. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, recording, or any information storage and retrieval system, without permission in writing from the publisher. Details on how to seek permission, further information about the Publisher s permissions policies and our arrangements with organizations such as the Copyright Clearance Center and the Copyright Licensing Agency, can be found at our website, This book and the individual contributions contained in it are protected under copyright by the Publisher (other than as may be noted herein). Notices Knowledge and best practice in this field are constantly changing. As new research and experience broaden our understanding, changes in research methods, professional practices, or medical treatment may become necessary. Practitioners and researchers must always rely on their own experience and knowledge in evaluating and using any information, methods, compounds, or experiments described herein. In using such information or methods they should be mindful of their own safety and the safety of others, including parties for whom they have a professional responsibility. To the fullest extent of the law, neither the Publisher nor the authors, contributors, or editors, assume any liability for any injury and/or damage to persons or property as a matter of products liability, negligence or otherwise, or from any use or operation of any methods, products, instructions, or ideas contained in the material herein. Library of Congress Cataloging-in-Publication Data Smith, Gina R. FPGAs 101: Everything you need to know to get started / Gina R. Smith. p. cm. Includes bibliographical references and index. ISBN (alk. paper) 1. Field programmable gate arrays. 2. Programmable array logic. 3. VHDL (Computer hardware description language) 4. Digital electronics. I. Title. TK7895.G36S dc British Library Cataloguing-in-Publication Data A catalogue record for this book is available from the British Library. ISBN: For information on all Newnes publications, visit our website, Printed in the United States of America

5 Contents About the Author...ix Acknowledgments...xi About This Book... xiii Acronyms... xv Chapter 1: Getting Started Introduction VHDL Reserved Words Tips for Writing Good Code Tip 1. Use Comments to Convey Information about the Code Tip 2. Indent for Clarity and Readability Tip 3. Use Standard Format Convention Tip 4. Include a Header Section Tip 5. Use Brief Descriptive Names HDL Text Editors Standalone Text Editor Fee-Based Text Editor Editor Features Syntax Color Highlighting Language Templates Row and Column Editor Comment/Uncomment Selected Text Indent/Unindent Selected Text Predefined Font Convention Signals Signal Data Types Signal Names File Structure Optional Header Section Library Declaration Entity Section Architecture Section...17 v

6 vi Contents 1.8 Starter Tips Chapter Overview...20 Chapter 2: Simple Designs Introduction Starter Template Mathematical Functions Logic Gate D Flip-Flop Latch Shift Register Comparator Binary Counter Conversion Functions Read File Write File Chapter Overview...42 Chapter 3: FPGA Development Phases Introduction What Is a Field Programmable Gate Array? I/O Interfaces Basic Logic Building Blocks Ability to Interconnect Programmable Logic Device Options FPGA Development Phases Chapter Overview...54 Chapter 4: Design Introduction What Is the Design Phase? Design Package Evaluating the Design Package Package Analysis Getting Clarification Organization Predesign Decisions Design Format FPGA Manufacturer Development Tools Creating Design Options Automatic Code Generators Manual Code Generation Design Package Chapter Overview...81

7 Contents vii Chapter 5: Simulation Introduction What Is Simulation? Simulation Tools Levels of Simulation Test Cases Stimulus Interactive Stimulus Graphical Test Bench HDL Testbench Manual Testbench Simulation Phase Outputs Automatic Testbench Capture Data Simulation Tutorial Chapter Overview Chapter 6: Synthesis Introduction What Is Design Synthesis? Design Check and Resource Association Optimization Technology Mapping Synthesis Phase Tools Vendors and Features Synthesis Tool Setup Synthesis Input Synthesis Output Files Netlists Status Reports Schematic Views Technology Schematic View Synthesis Tutorial Chapter Overview Chapter 7: Implementation Introduction What Is Implementation? Translate Map Place and Route Generate Program File Implementation Tools Implementation Inputs Implementation Outputs...166

8 viii Contents 7.6 Implementation Tutorial Chapter Overview Chapter 8: Programming Introduction What Is Programming? Tools and Hardware Joint Test Advisory Group In-System Programming Third Party Programmers Hardware Configuration Programming Tutorial Chapter Overview References and Sources Web Sites Data I/O Appendix: Testbenches A 1 Adder and Subtracter Testbench A 2 Logic Gates Testbench A 3 D Flip-Flop Testbench A 4 DFF with Synchronous Enable Testbench A 5 Latch Design Testbench A 6 Manual Shift Register Testbench A 7 Comparator Testbench A 8 Binary Counter Testbench A 9 Binary Counter with Synchronous Enable Testbench A 10 Conversion Testbench Index

9 About the Author Gina R. Smith is the CEO and founder of Brown-Smith RDL Inc., located in Maryland. She is a Senior Electrical/Systems Engineer with an Associate s degree in Applied Science in Electronic Engineering Technology, a B.S. degree in Electrical Engineering, magna cum laude, and an M.S. degree in Systems Engineering with honors, from Johns Hopkins University. Through her company, Gina provides systems engineering and FPGA consulting services. Her accomplishments include a Technical Merit Award from Northrop Grumman, for one of her high-voltage designs. She wrote The Art of FPGA Construction, published in Embedded Systems Design, January She is a member of the International Council on Systems Engineering, Women in Defense, and National Defense Industrial Association. She has numerous years experience as a design and project engineer and technical leader. She worked in the fields of avionics, chemistry and biology, primary and secondary surveillance radar systems, information, friend or foe technology, and various other military and defense systems. Gina has one daughter, Rebecca C. Smith, and lives in Maryland. She enjoys snow skiing, NASCAR, hiking, cooking, and fishing. Gina can be reached via at gina.smith@bsrdl.com. ix

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11 Acknowledgments I thank my daughter, Rebecca C. Smith, who is always so patient, loving, supportive, and understanding with me. She is my true source of motivation. I also thank my mother, Rebecca B. Smith, sisters Julie P. Webb and Sharon C. Smith, and my brother Maurice R. Smith for all their support and encouragement during this project. I am truly an engineer and not a writer. Without the support of my daughter and family, this book journey would have been almost impossible. Many thanks for the technical support I received from Mike Hines, Livia Castrucci, Christopher Loberg, Lawrence Wilson at Tektronix, Scott Silver at The Moving Pixel Company, and Brian Jacobsen at Synopsys for getting me a temporary license. Thanks to Xilinx, Altera, and ModelSim for letting me use their material. I dedicate this book to my dad, who was my hero and number 1 supporter. He is one of heaven s angels. 1 I love and miss him very much. 1 James Wellington Smith, June 4, 1932 July 21, 2007 xi

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13 About This Book This book describes the field programmable gate array (FPGA) development process in five development phases: design, synthesis, simulation, implementation, and programming. Each phase is presented in an easy-to-read and easy-to-understand format with examples, helpful tips, and step-by-step tutorials for the synthesis, implementation, simulation, and programming phases. The reader is provided Web addresses for the tools used in the tutorials. This book makes it easy for beginners to learn and understand how to create, modify, and work with FPGA designs. Experienced engineers will find it to be a good reference manual. A primer and some simple digital designs have been provided for those with no programming knowledge. It provides some basic information about writing, reading, and understanding high-level design languages, coding, and other tips. The primer may not be necessary for all readers, but as my mother always says, It is better to have it and not need it than need it and not have it. xiii

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15 Acronyms ABEL AHDL ALM B.E.S.T BGA CAN CIC CLB CTRL DFF DoD DRC DSP EDIF FBGA FFT FIR FPGA FSM GTL GUI HDL HSTL IEEE IFF I/O IOB IOE IP ISE advanced Boolean equation language Altera hardware description language adaptive logic module behavior extracting synthesis technology ball grid array controller area network cascaded integrator comb configurable logic block control D flip-flop Department of Defense design rule check digital signal processor electronic digital interchange format fine-pitch ball grid array fast Fourier transform finite impulse response field programmable gate array finite state machine gunning transceiver logic graphical user interface hardware description language high-speed transceiver logic Institute of Electrical and Electronics Engineers information, friend or foe input/output I/O block I/O element intellectual property Integrated Software Environment xv

16 xvi Acronyms ISP JTAG LDT LED LSB LUT LVCMOS LVDS LVTTL MSB NCD NGC NGD OTP PAR PCI PROM QoR RAM RTL SPI SRAM Std TCK TDI TDO TMS TQFP TRST VHDL XST in-system programming Joint Test Advisory Group lightning data transport light emitting diodes least significant bit look-up table low-voltage CMOS low-voltage differential signaling low-voltage transistor-transistor logic most significant bit native circuit description native generic compiler native generic database one-time programming place and route peripheral component interconnect programmable read only memory quality of results random access memory register transfer level serial peripheral interface Static random access memory standard test clock test data in test data out test mode select thin quad flat pack test reset very high speed integrated circuit hardware description language Xilinx Synthesis Technology