Building IP for Current and Future RF IC
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1 Building IP for Current and Future RF IC RFIC for Mobile Wireless Communication RFIC for Vehicular Communication and Radar Web: Assoc. Professor Boon Chirn Chye Programme Director, RF & MM wave, VIRTUS, NTU Assoc. Editor, IEEE Transaction of VLSI; EEE NTU Teaching Excellent Award 2012; Commendation Award for Teaching Excellence IEEE Electron Devices Letters Golden Reviewer.
2 Interesting facts & figures Total student population around 34,000 More than 2/3 undergraduates, with about 1/3 graduate students Students from more than 70 countries study, research and play at NTU VIRTUS: NTU s IC Design Centre of Excellence, jointly funded by Singapore Economic Development Board (EDB). Official Opening on 20 th Oct NTU Ranked 13 in QS University World Rankings th (2017), 7 th (2016) in QS World Ranking (36 in 2011) for Electrical and Electronic Engineering, NTU. 2
3 Research Leadership in RF/MMW IC Funding Source/ Project Title Quantum ($) Delta-NTU Corp. Lab: A Wireless Heterogeneous Network Transceiver Chipset for Content-Driven Transmission of Learning Media (SLE-RP3) Research Area (SLE) Cash Only (Total including in-kind) Role PI Grant Period 1 st July 2016 to 30 th June 2021 MOE Tier 1: Monolithic Terahertz Passive Components in Advanced CMOS Technology: From Fundamental Understandings to Integrated Circuit Applications GlobalFoundries Singapore Pte. Ltd-NTU Joint R&D: Direct Integration of GaN Power Devices on CMOS Circuits for Demonstrate Power Management Solutions, SMART-POC: An Integrated Platform Approach Towards Non-Invasive Continuous Blood Glucose Monitoring Addressing Clinical Need for Early Diagnosis and Improved Compliance PI 1 st November 2016 to 31 st October 2018 PI 1 st June 2016 to 31 st December 2018 PI 1 st July 2016 to 30 th July 2017 Huawei Tech. Co. Ltd-NTU Joint R&D: 10GiFi research & development of ultra-wideband RF transceiver Tier 2: High Thermal Resolution Ultra-Low Power Integrated Imager: Fund. Issues in CMOS Project 17: Electronic Circuit Design, Communications under SMART-IRG5: Low Energy Electronic Systems (MIT-NTU) PI PI PI 15 th July 2014 to 14 th July 2017 July 2013 to June st April 2014 to 30 th March 2016
4 Research Leadership in RF/MMW IC Project 2: Electronic Circuit Design, Communications under SMART IRG5: Low Energy Electronic Systems (MIT NTU) Project 10: Electronic Circuit Design, Communications under SMART IRG5: Low Energy Electronic Systems (MIT NTU) PI 1 st April 2013 to 30 th March 2014 PI 1st April 2012 to 30th March 2013 SMA (MIT NTU) CMOS Front end PI 5th August 2013 to 4th August 2017 SMA (MIT NTU) High Speed CMOS PI 13th January 2014 to 12th August 2018 ARC3/09: Batteryless Flexible Transceiver for Biomedical Applications PI May 2009 to July 2012 RG73/07: Ultra low Power Fully Integrated CMOS 24GHz Receiver PI March 2008 to October Advanced RFIC Pte Ltd Co PI March 2007 to February 2012 NRF : An Ultra Low Power RF Transceiver Chip towards a New Paradigm of Life Quality Co PI February 2009 to February 2010 University of Electronic Science and Technology (UEST) of China NTU Joint R&D, jointly funded by UEST and NTU : System on chip: Realization of Software Radio Agency for Science, Technology and Research (A*STAR) : An Ultra Low Power RFIC Chip For Wireless and Communication Co PI Co PI 3 December 2008 to 2 December 2009 March 2006 to February 2009 & Other Grants in RF IC. Total Grants:$9,887, In Cash
5 RFIC - BOON RF Front-end and Analog Focus Working with industry and academic partners to design, validate and test new technology. Showcasing new technology in real circuit and test in real life application. Demonstrated Why Us? IEEE802.11p MIT (LEES- SMART) Validation / showcase of new technology III-V+ CMOS in Single Die Golden reference PA >70% Efficiency, >36dBm 256-QAM. Demonstrated. And Various others!!! IEEE802.11ax Huawei (Industry Research) First next generation WiFi IC in the world Demonstrated Tested with 2 jammers, 3 carriers. CMOS for mass production Various RFIC IPs filed.
6 RFIC - BOON (Industrial Verified Design) 2016 (International competitive) 2017 (Translational) Next Generation WiFi Designed and Fabricated 3 Carrier Aggregation, World First Demonstrated NTU-Delta Heterogeneous Network for Smart Learning Integrated Wireless Support Bluetooth, ZigBee, and others with smallest form factor. SMART-LEES III-V and CMOS in a Single Chip 5G Front-end (including Power Amp) Fully integrated Machine Learning + Extreme High Speed Wireless and Wired RFIC
7 Ultra-Low Power RF IC for IOT Turn Key IEEE Biomedical WBAN Lead by: Assoc. Professor Boon Chirn Chye, Programme Director, RF & MM wave, VIRTUS, NTU
8 IOT Energy Harvesting Batteryless Flexible Transceiver Wi-Fi Energy Harvester Measured Board with Fully Integrated Energy Aware ZigBee Chip
9 Energy Harvesting Batteryless Flexible Transceiver for Biomedical Applications 6 Times Less!!! *Results based on full chip measurement (with RF socket) 9
10 IOT Energy Harvesting Batteryless Flexible Transceiver Energy Aware for RF & mmw An Energy-Aware CMOS Receiver Front end for Low-Power 2.4-GHz Applications (T-CASI) Extremely low power with minimum/no trade-off. Transistor size slightly larger but still small (<10%) compared to inductor/capacitor. 10
11 RF IC Ultra Low Power Methodologies Specific Aim: Current transceivers power consumption is too high. Requires very large battery or energy harvesting & storing devices. Our Aim to Achieve the Ground Breaking Power consumption of RF Transceiver <10 mw Methodologies: (>74 International Publications, >55 IC Chips): Sub-threshold RF Design Energy Aware RF System Level Design Ultra-Low Power Series Quadrature VCO Novel TSPC Frequency Synthesizer Novel Large Signal MGTR Power Amplifier Energy Harvesting & Storing 11
12 Sub-threshold Biasing for RF & mmw Energy/Frequency Performance Fund. analysis and RF circuit design: High GTUmax can be obtained with weak-inv. Low power from weak-inv. (high transconductance vs. current) No performance reduction. Conventional Concept Trade-off 10 x energy reduction / op. freq. 10x performance reduction How others do it. How we do it. 12
13 How DC-DC works with 5G NR in LEES Neg. Bias Gen. (3) 5G Wireless Transceiver Supply Voltage (2) (2) DC DC (1) 5G RF Front End ANT Wireless CMOS circuit III-V circuit ANT 1) Generate higher or lower supply voltages for III-V devices in 5G NR 2) Generate negative bias voltages for depletion mode III-V devices in 5G NR 3) Generate negative bias voltages to make CMOS circuits in deep-sleep mode for 5G IoT (requiring long battery life)
14 Achievement 1. GaN DC-DC Converter Phase I 2017 Supply Voltage DC DC ANT CPA,Decouple CLNA,Decouple PAIN TXSW Class-AB (Cree 0.25um GaN) RF Front End Class-C RXSW LNA Performance of PA with DC-DC LNAOUT (TPSCo CMOS + LEES III-V) (GF CMOS + LEES III-V) V INPUT VB = -2.4 V -2.6 V -2.8 V -3.0 V Pros: GaN switch + CMOS diode Cons: Low-Q inductor Fully integrated & High voltage DC-DC for GaN PA DC-DC converters & test patterns Fully integrated GaN DC-DC for GaN PA using an external GaN foundry => GaN+CMOS DC-DC for higher efficiency 5G NR using LEES pro
15 Achievement 2. CMOS Voltage Gen. Phase I 2017 (GF 0.18um CMOS) V IN F CLK C EXT V REG Range Settling Time +3.3 V EXT: 40MHz 80MHz > 220nF 4.4V to 1.2V < 2.5ms for C EXT : 220nF < 6ms for C EXT : 1.5uF Maximum Load > 210uA for V REG > -3.8V V REG Ripple RMS Noise Vol Test PCB (one external capacitor required) > 605uA for V REG > -2.0 < 5mV PP < 60uV Controllable negative output with low ripple Signal Source CMO S NBG -2.95V Pre-amplifier Negative bias gen. Bandgap ref. (GF CMOS + LEES III-V) VSA89600B GaN PA GaN PA performance evaluation with CMOS negative bias gen Oscilloscope Attenuator Negative bias generation & bandgap ref. circuits using CMOS only => CMOS universal volt. gen. for III-V devices in 5G NR using LEES
16 Directions (2018 & Phase II) CMOS Neg. Volt. Gen. Controllable negative voltage GaN DC-DC booster Phase II CMOS Voltag e Gen. Controllable negative and positive voltage GaN DC- DC LEES Universal DC Source CMOS+GaN for negative & positive, high & low voltages High voltage for GaN Buck-boost converter for both high and low voltage for III-V
17 NTU-MIT LEES : GaN + CMOS
18 802.11p system prototyping 1.8V / 3.3V 12V 11p Digital Baseband & MAC DAC / ADC Transmitter Receiver Neg. Bias Gen. ( ) DC Booster >20V ( ) ANT RF Front End 5.9 GHz ANT OSC. FPGA board Discrete component CMOS circuit GaN circuit
19 GHz 256QAM 80MHz High Efficiency GaN PA Highly Compact & Unconditionally stable PA, with measured efficiency (eff.) 2 times higher and 3.5 times wider bandwidth vs. similar commercial PAs. Tested and meet the 80MHz 256QAM modulation WLAN ac.
20 GaN RF 5.9GHz Fully integrated & energy efficient RF PA + LNA + ANT SW 2mm x 1.2mm Chip-on-Board (No external matching) Tx mode: 50% power 34dBm Psat Rx mode: 22dBm OIP3
21 Integrated GaN PA for ac Application Using harmonic tuning technology to enhance efficiency Performance for 80MHz 256-QAM ac signal: 1. Pout: dbm from GHz 2. PAE: %
22 Integrated GaN PA for ax Application PAE PAE EVM PAE(%) Output Power(dBm) PAE(%) EVM(dB) Frequency(GHz) Output Power(dBm) Proposed PA SKY85402 (Skyworks) RFFM8505 (RFMD) RFPA5026 (Qorvo) Frequency GHz GHz GHz GHz EVM dbm 22 dbm 19.5 dbm 25 dbm -32dB EVM Rx mode: 22dBm OIP % 11.4% 9.5% 9.4 % Technology GaN SiGe InGaP InGaP Performance comparison between the proposed PA and other commercial products
23 Carrier Aggregation Transmitter for ax Appication 1. Proposed transmitter can mitigate cross-talk and VCO pulling 2. Proposed transmitter can support inter-band and intra-band carrier aggregation
24 GHz Broadband GaN PA for LTE-Advance Appication Combine Class E/F 2 and Continuous F (CF) mode to realize broadband performance G: Class E/F 2 mode G: Class CF mode
25 Extreme High Speed Wireless and Wired RFIC
26 Widest Bandwidth Highest BWER 100GHz LNA Ultra-compact LNA achieves the widest 3-dB bandwidth and the best FoM among wideband mmw LNAs in CMOS.
27 Widest Bandwidth Highest BWER 100GHz LNA Overcoming Gain Flatness, Wideband Gain Trade-off for MMW Application.
28 IEEE c Power Amplifier MMW High Gain Power Amplifier This work demonstrates an ILPA with largest injection locking bandwidth. The fabricated PA has achieved a injection locking range from 50 GHz to 59 GHz. Maximum output power of dbm has been obtained while the highest PAE is 16.1 %. Moreover, the chip size is 260 μm x 400 μm excluding pads.
29 The best CMOS 24/77GHz dual band frequency synthesizer for automotive FMCW radar application Best phase noise and lowest power consumption for among all automotive radar s frequency synthesizer reported.
30 57.9 to 68.3GHz 24.6mW Frequency Synthesizer with In Phase Injection Coupled QVCO in 65nm CMOS Yi Xiang, Boon Chirn Chye, et al. (ISSCC 2013) Fast settling due to high reference freq., Ultra low phase noise (low jitter), energy efficiency. RMS jitter: 0.23 ps
31 World First 100GHz Fractional N PLL in Fully Integrated CMOS Ultra-compact PLL Overcoming frequency resolution, fast settling, signal purity trade-off. Ref. [2] [3] This work Tech. (nm) 65 CMOS 65 CMOS 65 CMOS Operating Range (GHz) 98~103.3 (5.2%) 91.7~95.5 (4.1%) 100~110 (9.5%) 93.24~ (11.9%) P.N.@1MHz /10MHz (dbc/hz) -75 (3) / (3) / /-100 (3) / FOM /10MHz (dbc/hz) / / / / FOMT /10MHz (dbc/hz) / / / / Output Phase Power (mw) Differential 12~21 Eight Phases 48~85 Quadrature 54 Quadrature 30 Ref. [4] [5] [6] This work Tech. (nm) 65 CMOS 65 CMOS 65 CMOS 65 CMOS fref (MHz) Operating Range (GHz) ~ ~96.5 (1.5%) ~108.5 ~211.9 (11.4%) ~ ~408.5 (1.5%) ~104.8 (11.5%) P.N.@1MHz /10MHz (dbc/hz) -76 /-93 (3) -88 /-105 (3) / (4) / (4) (1) FOM = P.N. 20log(f0/Δf) + 10log(Power/1mW). (2) FOMT = FOM 20log(% of Operating Range/10%). (3) Estimated from figures. (4) PLL is in fractional-n mode. Reference Resolution Output Spur Architecture (MHz) Phase (dbc) Power (mw) fref Differential Integer-N fref Differential Integer-N + Push-Push fref Differential Integer-N 63 Frac-N fREF (4) Quadrature Sub- 57 Sampling
32 Terahertz Power Source and Imaging Built in Antenna 300 GHz Imaging Video Streaming THz Transceiver 9Gbps Communication
33 0.01mm^2 Imaging Transceiver
34 0.01mm^2 Imaging Transceiver 2.78% Efficiency, 0.01mm2 Applications: Food Safety, Biomedical.
35 A 160 GHz 3.7 mw Output Power Surfacewave Signal Source A 4-way surface-wave signal source is designed in 65nm CMOS at 160 GHz. Low loss as signal source for sub-thz communication. Measurement results 3.7 mw output power 5.5% DC-RF efficiency, 6.3% FTR and -105 dbc/hz phase noise at 10 MHz offset, leading state-of-the-art FOM of -171 dbc/hz and FOMT of dbc/hz in literature.
36 An IND-Prototype using INFO
37 1.3mW/Gb/s World Best Efficiency 36Gbps Ethernet Wireline Communication (Car Ethernet?)
38 CMOS millimeter wave mixer with the highest conversion gain where variable gain is implemented for the very first time [see J43]. Ultra-compact mm-wave mixer with highest conversion gain
39 Thank you for your time and effort to understand our work. Web: for full list of publications
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