500mA Ultra Low Dropout Positive Voltage Regulator LD2213. General Description. Features. Applications

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Gerard Burke
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500mA Ultra Low Dropout Positive Voltage Regulator 500mA Ultra Low Dropout Positive Voltage Regulator General Description is an ultra low dropout positive voltage regulator with a dropout of 350

It provides very low noise, very low standby current (1 Max) and excellent power supply ripple rejection (PSRR) 75dB at 100Hz in battery power applications, such as handsets and PDAs and RF

1 500mA Ultra Low Dropout Positive Voltage Regulator 500mA Ultra Low Dropout Positive Voltage Regulator General Description is an ultra low dropout positive voltage regulator with a dropout of 350 (typical) at 500mA output current. It provides very low noise, very low standby current (1 Max) and excellent power supply ripple rejection (PSRR) 75dB at 100Hz in battery power applications, such as handsets and PDAs and RF communication applications. SOT-223 is available in 3 fixed output voltages: 2.5V, 3.0V,3.3V. It could provide output volage accuracy within ±1.0% at 25 C and ±2.0% over full temperature range. also features logic compatible enable/shutdown control inputs, a low power shutdown mode for extended battery life, build in over current protection, over temperature protection as well as reversed battery protection. series are available in SOT-223 and SOP-8 and DPAK (TO-252)Packages Features DPAK (TO-252) SOP-8 Output Current up to 500mA Very Low Standby Curent: 1 max Low Dropout Voltage:350 at 500mA Low Temperature Coefficient High Output Accuracy: ±1.0% Excellent Power Ripple Rejection:75dB at 100Hz and IO=100 Over Current Protection (OCP) Thermal overload Protection Reverse-battery protection Logic-controlled Enable function Wide Operation Junction Temperature: -40 C to 125 C RoHS Compliance and Halogen Free Applications PC Mother Board PDAs and Palmtops LCD Monitor, DVD Video Player and Printer Telecom Equipment and RF communicators TAITRON COMPONENTS INCORPORATED Tel: (800)-TAITRON (800) (661) Fax: (800)-TAITFAX (800) (661) Page 1 of 17

SOP-8 (TO-252) 3 1 2 VIN Input Voltage 1 2 5,6,7,8 GND Ground - - 1 EN Active high enable input :CMOS or TTL Logic High: enable;

2 Ordering Information 500mA Ultra Low Dropout Positive Voltage Regulator Pin Configuration 1: GND 2: OUTPUT 3: INPUT 1: INPUT 2: GND 3: OUTPUT 1: EN 2: INPUT 3: OUTPUT 4:BYP 5/6/7/8: GND SOT-223 Pin Description DPAK (TO-252) Outline SOT-223 DPAK Symbol Description SOP-8 (TO-252) VIN Input Voltage 1 2 5,6,7,8 GND Ground EN Active high enable input :CMOS or TTL Logic High: enable; Logic Low :shutdown BYP Bypass capacitor for low noise operation VO Output Voltage SOP-8 Page 2 of 17

3 Marking information: 500mA Ultra Low Dropout Positive Voltage Regulator Outline PN Marking Code Temperatue Halogen Range ROHS Halogen Free ROHS Free SOT C to 125 C DPAK (TO-252) -40 C to 125 C SOP-8-40 C to 125 C H TR70 H RG70 EH13C GH13C H TR70 H RG70 EH13E GH13E H TR70 H RG70 EH13F GH13F D TR70 D TU D TR70 D TU D TR70 D TU S TR70 S TU S TR70 S TU S TR70 S TU D RG70 D UG D RG70 D UG D RG70 D UG S RG70 S UG S RG70 S UG S RG70 S UG AP2213D- 2.5E1 AP2213D- 3.0E1 AP2213D- 3.3E1 2213M- 2.5E1 2213M- 3.0E1 2213M- 3.3E1 AP2213D -2.5G1 AP2213D -3.0G1 AP2213D -3.3G1 2213M- 2.5G1 2213M- 3.0G1 2213M- 3.3G1 Packing Type Tape & Reel Tape & Reel Tube Tape & Reel Tube Tape & Reel Tube Tape & Reel Tube Tape & Reel Tube Tape & Reel Tube Functional Block Diagram Pin A (B)[C] : A for SOT-223 (B) for DPAK (TO-252) [C] for SOP-8 Page 3 of 17

4 Absolute Maximum Ratings (Note1) Symbol Description Ratings Unit VIN Input Voltage 20 V VEN Enable Input Voltage 20 V PD Power Dissipation Internally Limited (Thermal Protection) W TJ Junction Temperature 150 C TSTG Storage Temperature Range -65 to 150 C TLEAD (10 sec) Lead Soldering Temperature 260 C SOT θja Thermal Resistance (No Heat sink) DPAK (Not2) (TO-252) 90 C/W SOP ESD ESD (Machine model) 300 V Recommend Operating Ratings (Note1) Symbol Description Ratings Min Max Unit VIN Input Voltage V VEN Enable Input Voltage 0 18 V TJ Operating Junction Temperature C Note1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Recommend operating ratings indicate conditions for which the device is functional, but do not guarantee specific specification limits. For guarantee specification and test conditions, see the Electrical Characteristics, the guarantee specification apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note2: The Max power dissipation is a function of TJ(max), θja and TA.The maximum allowable power dissipation at any temperature is PD(Max)=(TJ(max)-TA)/ θja, Exceeding the maximum allowable power dissipation will result in die temperature and the Regulator will go into thermal shutdown Page 4 of 17

5 Symbol VLINE VLOAD VO/VO 500mA Ultra Low Dropout Positive Voltage Regulator Electrical Characteristics For -2.5 (VIN=3.5V, IO=100,CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold typeface applies for -40 C TJ 125 C,unless otherwise specified), (Note3 ) Line Regulation Description Load Regulation (Note4) Output Voltage Accuracy -2.5 Min. Type. Max. Unit % -2-2 % Test Conditions VIN=3.5V to13.2v IO=0.1mA to 500mA Variation from specified VO VO/ T Output Voltage Temperature uv/ C Coefficient (Note5) ppm/ C VO/VO T ILIMIT Current Limit ma VO=0V ISTD Standby Current VEN 0.4V (shut down) - 5 VEN 0.18V (shut down) VEN 2.0V, IO= VEN 2.0V, IO=50mA IGND Ground Pin Current (Note6) VEN 2.0V, IO=150mA ma VEN 2.0V, IO=300mA VEN 2.0V, IO=500mA IO= IO=50mA VD Dropout Voltage (Note7) IO=100mA IO=150mA IO=300mA IO=500mA Page 5 of 17

6 nv/ IO=50mA, CIN=2.2uF,100pF from en Output Noise Voltage BYP to GND PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable VIL 0.4V IIL Enable Input Logic-Low Current VIL 0.18V IIH Enable Input Logic-High Current VIH 2.0V θjc Thermal Resistance (Juction to case) SOT C/W DPAK (TO-252) SOP-8 For -3.0 (VIN=4.0V, IO=100,CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold typeface applies for -40 C TJ 125 C,unless otherwise specified), (Note3 ) -3.0 Symbol Description Unit Test Conditions VLINE VLOAD VO/VO Line Regulation Load Regulation (Note4) Output Voltage Accuracy Min. Type. Max % -2-2 % VIN=4.0V to13.2v IO=0.1mA to 500mA Variation from specified VO VO/ T Output Voltage Temperature uv/ C Coefficient (Note5) ppm/ C VO/VO T ILIMIT Current Limit ma VO=0V ISTD Standby Current VEN 0.4V (shut down) - 5 VEN 0.18V (shut down) VEN 2.0V, IO= VEN 2.0V, IO=50mA IGND Ground Pin Current (Note6) VEN 2.0V, IO=150mA ma VEN 2.0V, IO=300mA VEN 2.0V, IO=500mA Page 6 of 17

7 IO= IO=50mA VD Dropout Voltage (Note7) IO=100mA IO=150mA IO=300mA IO=500mA en Output Noise Voltage nv/ IO=50mA, CIN=2.2uF,100pF from BYP to GND PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable IIL Enable Input Logic-Low Current VIL 0.4V VIL 0.18V IIH Enable Input Logic-High Current VIH 2.0V θjc Thermal Resistance (Juction to case) SOT C/W DPAK (TO-252) SOP-8 For -3.3 (VIN=4.3V, IO=100,CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold typeface applies for -40 C TJ 125 C,unless otherwise specified), (Note3 ) -3.3 Symbol Description Unit Test Conditions VLINE VLOAD VO/VO Line Regulation Load Regulation (Note4) Output Voltage Accuracy Min. Type. Max % -2-2 % VIN=4.0V to13.2v IO=0.1mA to 500mA Variation from specified VO VO/ T Output Voltage Temperature uv/ C Coefficient (Note5) ppm/ C VO/VO T Page 7 of 17

8 ILIMIT Current Limit ma VO=0V ISTD Standby Current VEN 0.4V (shut down) - 5 VEN 0.18V (shut down) VEN 2.0V, IO= VEN 2.0V, IO=50mA IGND Ground Pin Current (Note6) VEN 2.0V, IO=150mA ma VEN 2.0V, IO=300mA VEN 2.0V, IO=500mA IO= IO=50mA VD Dropout Voltage (Note7) IO=100mA IO=150mA IO=300mA IO=500mA en Output Noise Voltage nv/ IO=50mA, CIN=2.2uF,100pF from BYP to GND PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable IIL Enable Input Logic-Low Current VIL 0.4V VIL 0.18V IIH Enable Input Logic-High Current VIH 2.0V θjc SOT-223 Thermal Resistance C/W DPAK (TO-252) (Juction to case) SOP-8 Page 8 of 17

9 Note3:Specification in Bold typeface are limited to -40 C TJ 125 C.Limited over temperature are guaranteed by design, but not tested in production. Note4:Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the load range from 0.1mA to 500mA.Changes in output voltage due to heating effects are covered by the thermal regulation specification. Note5: Output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. Note6:Ground Pin current is the regulator quiescent current plus pass transistor base current.the total current drawn from the supply is the sum of the load current plus the ground pin current. Note7:Dropout voltage is defined as the input to output differential at which the output voltage drop 1.0% (TJ=25 C) or 2.0% (-40 C TJ 125 C) below its nominal value measured at 1V differential. Typical Characteristics Curves Fig.1 VO - TJ Fig.2 VD - TJ Output Voltage VO (V) Dropout Voltage VD () Operation Junction Temperature TJ ( C) Operation Junction Temperature TJ ( C) Page 9 of 17

10 Fig.3 IGND - IO Fig.4 IGND - TJ Output Current IO (ma) Enable Current IEN () Ground Pin Current (ma) Ground Pin Current () Operation Junction Temperature TJ ( C) Fig.5 IEN - TJ Fig.6 VEN - TJ Enable Voltage VEN (V) Operation Junction Temperature TJ ( C) Operation Junction Temperature TJ ( C) Page 10 of 17

11 Fig.7 en - CBYP Fig.8 en - f Output Noise en (uvrms ) Bypass Capacitor CBYP (pf) Power Dissipation PD (W) Output Noise en (uv / ) Frequency f (Hz) Fig.9 PD - TA Fig.10 PD - TA Power Dissipation PD (W) Ambient Temperature TA ( C) Ambient Temperature TA ( C) Page 11 of 17

12 Fig.11 ESR - IO Fig.12 ESR - IO Power Supply Rejection Ratio PSRR (db) ESR (Ω) ESR (Ω) Output Current IO (ma) Output Current IO (ma) Fig.13 ESR - IO Fig.14 PSRR - f ESR (Ω) Output Current IO (ma) Frequency f (Hz) Page 12 of 17

13 Fig.15 Load Transient Response Fig.16 Line Transient Response VLINE (10/DIV) VIN (1V/DIV) VLOAD (10/DIV) IO (500mA/DIV) VIN=3.5V IO=10mA to 500mA CIN=1uF,CO=2.2uF CBYP =100pF,VEN=2V VIN=3.4V to 4.4V; VEN=2V,IO=100 CBYP=100pF, Time (200us/DIV) Time (200us/DIV) Fig.17 VEN (on) - VO VO (1V/DIV) VEN (1V/DIV) VIN=3.5V VEN=0 to 2V IO=30mA CBYP=open CIN=2.2uF CO=2.2uF Time (40us/DIV) Page 13 of 17

14 Typical Application (Note8) 500mA Ultra Low Dropout Positive Voltage Regulator Note8:Dropuout voltage is 350 when TJ=25 C.In order to obtain a normal output voltage,vo+0.35v is the minimum input voltage which will result in a low PSRR, imposing a bad influence on system. Therefore, the recommended input voltage is VO+1V to 18V.For -2.5 Version, Its input voltage can be set from 3.5V (VO+0.5V) to 18V. Application Notes Input Capacitor A1uF minimum capacitor is recommended to be place between VIN and GND Output Capacitor It is required to prevent oscillation.1uf minimum is recommended when CBYP is unused.2.2uf minimum is recommended when CBYP is 100uF.The output capacitor may be increased to improve thransistant response. Nosie Bypass Capacitor Bypass capacitor is connected to the internal voltage reference.a 100pF capacitor connected from BYP to GND make this reference quiet,resulting in a significant rduction in output noise,but the ESR stabel area will narrowed. The start-up speed of the is inversely proportional to the value of reference bypass capacitor. In some cases, if output noise is not a major concern and rapid turn-on is necessary, omit CBYP and BYP open. Power Dissipation Thermal shutdown may occur if exceeding the maximum power dissipation conditions, the junction temperature must be within the range specified under absolute maximum ratings to avoid thermal shutdown. Page 14 of 17

15 To determine if the power dissipated in the regulator reaches the maximum power dissipation (Fig9 and Fig10), the formula is:tj=ta+pd*θja; PD=(VIN-VO)*IO+VIN*IGND. Where: TJ TJ (max) is absolute maximum rating for the junction temperature; VIN*IGND can be ignored due to the small value. TJ (max) is 150 C, θja is 90 C/W for DPAK (TO-252) package and 160 C/W for SOP-8 package.example: For 2.5V version packaged in SOP-8, IO=500mA,TA=30 C, VIN(max) =(150 C-30 C)/(0.5A*160 C/W)+2.5V=4.0V, therefore,for good performance, please make sure that input voltage is less than 4.0V without heat-sink when TA=30 C, Dimensions in mm (inch) SOT Page 15 of 17

16 SOP-8 Page 16 of 17

17 DPAK (TO-252) How to contact us: US HEADQUARTERS WEST HARRISON PARKAWAY, VALENCIA, CA Tel: (800) TAITRON (800) (661) Fax: (800) TAITFAX (800) (661) TAITRON COMPONENTS MEXICO, S.A.DE C.V. BOULEVARD CENTRAL 5000 INTERIOR 5 PARQUE INDUSTRIAL ATITALAQUIA, HIDALGO C.P MEXICO Tel: Fax: TAITRON COMPONETS INCORPORATED E REPRESENTAÇÕES DO BRASIL LTDA RUA DOMINGOS DE MORAIS, 2777, 2.ANDAR, SALA 24 SAÚDE - SÃO PAULO-SP BRAZIL Tel: Fax: TAITRON COMPONETS INCORPORATED, SHANGHAI REPRESENTATIVE OFFICE METROBANK PLAZA, 1160 WEST YAN AN ROAD, SUITE 1503, SHANGHAI, , CHINA Tel: Fax: Page 17 of 17

150mA Ultra Low Dropout Positive Voltage Regulator LD2202. General Description. Features. Applications

150mA Ultra Low Dropout Positive Voltage Regulator 150mA Ultra Low Dropout Positive Voltage Regulator General Description is an ultra low dropout positive voltage regulator with a dropout of 165 (typical)