150mA Ultra Low Dropout Positive Voltage Regulator LD2202. General Description. Features. Applications

Transcription

1 150mA Ultra Low Dropout Positive Voltage Regulator 150mA Ultra Low Dropout Positive Voltage Regulator General Description is an ultra low dropout positive voltage regulator with a dropout of 165 (typical) at 150mA output current. It provides very low noise, very low standby current (1 Max) and excellent power supply ripple rejection (PSRR) 75dB at 100Hz in battery power applications, such as handsets and PDAs and RF communication applications. SOT-89 is available in 5 fixed output voltages: 2.5V, 2.6V, 2.8V,3.0V,3.3V and it is also available in an adjustable version which can set the output voltage with 2 external resisitors. SOT-23-5 It could provide output volage accuracy within ±1.0% at 25 C and ±2.0% over full temperature range. also features logic compatible enable/shutdown control input, a low power shutdown mode for extended battery life, build in over current protection, over temperature protection as well as reversed battery protection. series are available in SOT-89 and SOT-23-5 Packages Features Output Current up to 150mA Very Low Standby Curent:1 max Low Dropout Voltage:165 (Typical) at 150mA Low Temperature Coefficient High Output Accuracy: ±1.0% Excellent Power Ripple Rejection:75dB at 100Hz and IO=100 Over Current Protection (OCP) Thermal overload Protection Reverse-battery protection Logic-controlled Enable function Wide Operation Junction Temperature: -40 C to 125 C RoHS Compliance and Halogen Free Applications PC Mother Board PDAs and Palmtops LCD Monitor, DVD Video Player and Printer Telecom Equipment and RF communicators TAITRON COMPONENTS INCORPORATED Tel: (800)-TAITRON (800) (661) Fax: (800)-TAITFAX (800) (661) Page 1 of 21

2 Ordering Information 150mA Ultra Low Dropout Positive Voltage Regulator Pin Configuration 1: OUTPUT 2: GND (TAB) 3: INPUT 1: INPUT 2: GND 3: EN 4:ADJ /BYP 5: OUTPUT SOT-89 SOT-23-5 Pin Description Outline SOT-89 SOT-23-5 Symbol Description 3 1 VIN Input Voltage 2 2 GND Ground - 3 EN Active high enable input :CMOS or TTL Logic High: enable; Logic Low :shutdown - 4 BYP/ADJ Bypass capacitor for low noise operation and Adjust output 1 5 VO Output Voltage Marking information: Page 2 of21

3 Outline PN Marking Code Temperatue Halogen Range ROHS Halogen Free ROHS Free SOT C to 125 C K TR70 K RG70 E22B G22B SOT C to 125 C N5-ADJ-08-TR70 N5-ADJ-08-RG70 E2C G2C N TR70 N RG70 E2D G2D N TR70 N RG70 E2E G2E N TR70 N RG70 E2G G2G N TR70 N RG70 E2I G2I N TR70 N RG70 E2L G2L Packing Type Tape & Reel Functional Block Diagram Pin A(B):A for SOT-23-5 B for SOT-89 Fixed Output Voltage Regulator Adjustable Output Voltage Regulator Absolute Maximum Ratings (Note1) Page 3 of21

4 Symbol Description Ratings Unit VIN Input Voltage 15 V VEN Enable Input Voltage 15 V PD Power Dissipation Internally Limited (Thermal Protection) W TJ Junction Temperature 150 C TSTG Storage Temperature Range -65 to 150 C TLEAD (10 sec) Lead Soldering Temperature 260 C Thermal Resistance (No Heat sink) SOT θja C/W (Not2) SOT ESD ESD (Machine model) 200 V Recommend Operating Ratings (Note1) Symbol Description Ratings Min Max Unit VIN Input Voltage V VEN Enable Input Voltage V TJ Operating Junction Temperature C Note1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Recommend operating ratings indicate conditions for which the device is functional, but do not guarantee specific specification limits. For guarantee specification and test conditions, see the Electrical Characteristics, the guarantee specification apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note2: The Max power dissipation is a function of TJ(max), θja and TA.The maximum allowable power dissipation at any temperature is PD(Max)=(TJ(max)-TA)/ θja, Exceeding the maximum allowable power dissipation will result in die temperature and the Regulator will go into thermal shutdown Electrical Characteristics For -ADJ (VIN=VO+1V, IO=100, CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold typeface applies for Page 4 of21

5 -40 C TJ 125 C,unless otherwise specified), (Note3 ) -ADJ Symbol Description VLINE VLOAD VO/VO VO/ T Line Regulation Load Regulation (Note4) Output Voltage Accuracy Output Voltage Temperature Coefficient (Note5) Min. Type. Max. Unit Test Conditions %/V VIN=VO+1V to13.2v % IO=0.1mA to 150mA -1-1 % -2-2 % Variation from specified VO uv/ C ILIMIT Current Limit ma VO=0V ISTD Standby Current VEN 0.4V (shut down) - 5 VEN 0.18V (shut down) VEN 2.0V, IO= VEN 2.0V, IO=100 IGND Ground Pin Current (Note6) VEN 2.0V, IO=50mA VEN 2.0V, IO=100mA VEN 2.0V, IO=150mA IO=100 VD Dropout Voltage (Note7) IO=50mA IO=100mA IO=150mA en Output Noise Voltage nv/ IO=50mA, CIN=2.2uF,100pF from BYP to GND PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable IIL Enable Input Logic-Low Current VIL 0.4V Page 5 of21

6 IIH Enable Input Logic-High Current VIL 0.18V VIH 2.0V For -2.5 (VIN=3.5V, IO=100,CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold typeface applies for -40 C TJ 125 C,unless otherwise specified), (Note3 ) -2.5 Symbol Description Unit Test Conditions VLINE VLOAD VO/VO Line Regulation Load Regulation (Note4) Output Voltage Accuracy Min. Type. Max % -2-2 % VIN=3.5V to13.2v IO=0.1mA to 150mA Variation from specified VO VO/ T Output Voltage Temperature uv/ C Coefficient (Note5) ppm/ C VO/VO T ILIMIT Current Limit ma VO=0V ISTD Standby Current VEN 0.4V (shut down) - 5 VEN 0.18V (shut down) VEN 2.0V, IO= VEN 2.0V, IO=100 IGND Ground Pin Current (Note6) VEN 2.0V, IO=50mA VEN 2.0V, IO=100mA VEN 2.0V, IO=150mA IO=100 VD Dropout Voltage (Note7) IO=50mA IO=100mA IO=150mA en Output Noise Voltage nv/ IO=50mA, CIN=2.2uF,100pF from BYP to GND Page 6 of21

7 PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable VIL 0.4V IIL Enable Input Logic-Low Current VIL 0.18V IIH Enable Input Logic-High Current VIH 2.0V For -2.6 (VIN=3.6V, IO=100,CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold typeface applies for -40 C TJ 125 C,unless otherwise specified), (Note3 ) -2.6 Symbol Description Unit Test Conditions VLINE VLOAD VO/VO Line Regulation Load Regulation (Note4) Output Voltage Accuracy Min. Type. Max % -2-2 % VIN=3.6V to13.2v IO=0.1mA to 150mA Variation from specified VO VO/ T Output Voltage Temperature uv/ C Coefficient (Note5) ppm/ C VO/VO T ILIMIT Current Limit ma VO=0V ISTD Standby Current VEN 0.4V (shut down) - 5 VEN 0.18V (shut down) VEN 2.0V, IO= VEN 2.0V, IO=100 IGND Ground Pin Current (Note6) VEN 2.0V, IO=50mA VEN 2.0V, IO=100mA VEN 2.0V, IO=150mA VD Dropout Voltage (Note7) IO=100 Page 7 of21

8 IO=50mA IO=100mA IO=150mA en Output Noise Voltage nv/ IO=50mA, CIN=2.2uF,100pF from BYP to GND PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable IIL Enable Input Logic-Low Current VIL 0.4V VIL 0.18V IIH Enable Input Logic-High Current VIH 2.0V For -2.8 (VIN=3.8V, IO=100,CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold typeface applies for -40 C TJ 125 C,unless otherwise specified), (Note3 ) -2.8 Symbol Description Unit Test Conditions VLINE VLOAD VO/VO Line Regulation Load Regulation (Note4) Output Voltage Accuracy Min. Type. Max % -2-2 % VIN=3.8V to13.2v IO=0.1mA to 150mA Variation from specified VO VO/ T Output Voltage Temperature uv/ C Coefficient (Note5) ppm/ C VO/VO T ILIMIT Current Limit ma VO=0V VEN 0.4V (shut down) ISTD Standby Current - 5 VEN 0.18V (shut down) IGND Ground Pin Current (Note6) VEN 2.0V, IO=0 Page 8 of21

9 VEN 2.0V, IO= VEN 2.0V, IO=50mA VEN 2.0V, IO=100mA VEN 2.0V, IO=150mA IO=100 VD Dropout Voltage (Note7) IO=50mA IO=100mA IO=150mA en Output Noise Voltage nv/ IO=50mA, CIN=2.2uF,100pF from BYP to GND PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable IIL Enable Input Logic-Low Current VIL 0.4V VIL 0.18V IIH Enable Input Logic-High Current VIH 2.0V For -3.0 (VIN=4.0V, IO=100,CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold typeface applies for -40 C TJ 125 C,unless otherwise specified), (Note3 ) -3.0 Symbol Description Unit Test Conditions VLINE VLOAD VO/VO Line Regulation Load Regulation (Note4) Output Voltage Accuracy Min. Type. Max % -2-2 % VIN=4.0V to13.2v IO=0.1mA to 150mA Variation from specified VO VO/ T Output Voltage Temperature uv/ C Page 9 of21

10 VO/VO T Coefficient (Note5) 150mA Ultra Low Dropout Positive Voltage Regulator ppm/ C ILIMIT Current Limit ma VO=0V ISTD Standby Current VEN 0.4V (shut down) - 5 VEN 0.18V (shut down) VEN 2.0V, IO= VEN 2.0V, IO=100 IGND Ground Pin Current (Note6) VEN 2.0V, IO=50mA VEN 2.0V, IO=100mA VEN 2.0V, IO=150mA IO=100 VD Dropout Voltage (Note7) IO=50mA IO=100mA IO=150mA en Output Noise Voltage nv/ IO=50mA, CIN=2.2uF,100pF from BYP to GND PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable IIL Enable Input Logic-Low Current VIL 0.4V VIL 0.18V IIH Enable Input Logic-High Current VIH 2.0V For -3.3(VIN=4.3V, IO=100,CIN=1.0uF,CO=2.2uF, VEN 2.0V,TJ=25 C, Bold Typeface applies for Page 10 of21

11 -40 C TJ 125 C,unless otherwise specified), (Note3 ) -3.3 Symbol Description VLINE VLOAD VO/VO Line Regulation Load Regulation (Note4) Output Voltage Accuracy Min. Type. Max. Unit % -2-2 % Test Conditions VIN=4.3V to13.2v IO=0.1mA to 150mA Variation from specified VO VO/ T Output Voltage Temperature uv/ C Coefficient (Note5) ppm/ C VO/VO T ILIMIT Current Limit ma VO=0V ISTD Standby Current VEN 0.4V (shut down) - 5 VEN 0.18V (shut down) VEN 2.0V, IO= VEN 2.0V, IO=100 IGND Ground Pin Current (Note6) VEN 2.0V, IO=50mA VEN 2.0V, IO=100mA VEN 2.0V, IO=150mA IO=100 VD Dropout Voltage(Note 7) IO=50mA IO=100mA IO=150mA en Output Noise Voltage nv/ IO=50mA, CIN=2.2uF,100pF from BYP to GND PSRR Power Supply Ripple Rejection db IO=100, f=100hz VIL Enable Input Logic-Low Voltage V ULDO Shutdown VIH Enable Input Logic-High Voltage V ULDO Enable Page 11 of21

12 IIL IIH Enable Input Logic-Low Current Enable Input Logic-High Current VIL 0.4V VIL 0.18V VIH 2.0V Note3:Specification in Bold typeface are limited to -40 C TJ 125 C.Limited over temperature are guaranteed by design, but not tested in production. Note4:Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the load range from 0.1mA to 150mA.Changes in output voltage due to heating effects are covered by the thermal regulation specification. Note5: Output voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. Note6:Ground Pin current is the regulator quiescent current plus pass transistor base current.the total current drawn from the supply is the sum of the load current plus the ground pin current. Note7:Dropout voltage is defined as the input to output differential at which the output voltage drop 1.0% (TJ=25 C) or 2.0% (-40 C TJ 125 C) below its nominal value measured at 1V differential. Typical Characteristics Curves Fig.1 VO - TJ Fig.2 VD - TJ Output Voltage VO (V) Dropout Voltage VD () Operation Junction Temperature TJ ( C) Operation Junction Temperature TJ ( C) Page 12 of21

13 Fig.3 IGND - IO Fig.4 IGND - TJ Enable Current IEN () Ground Pin Current (ma) Ground Pin Current () Output Current IO (ma) Operation Junction Temperature TJ ( C) Fig.5 IEN - TJ Fig.6 VEN - TJ Fig-3 VLOAD-TJ Enable Voltage VEN (V) Fig-4 VREF-TJ Operation Junction Temperature TJ ( C) Operation Junction Temperature TJ ( C) Page 13 of21

14 Fig.7 en - CBYP Fig.8 en - f Output Noise en (uvrms ) Bypass Capacitor CBYP (pf) Power Dissipation PD (W) Output Noise en (uv / ) Frequency f (Hz) Fig.9 PD - TA Fig.10 PD - TA Power Dissipation PD (W) Ambient Temperature TA ( C) Ambient Temperature TA ( C) Page 14 of21

15 Fig.11 ESR - IO Fig.12 ESR - IO Power Supply Rejection Ratio PSRR (db) ESR (Ω) ESR (Ω) Output Current IO (ma) Output Current IO (ma) Fig.13 ESR - IO Fig.14 PSRR - f ESR (Ω) Output Current IO (ma) Frequency f (Hz) Page 15 of21

16 Fig.15 Load Transient Response Fig.16 Line Transient Response VLOAD () IO (ma) VIN=3.8V IO=5mA to100ma CIN=1uF,CO=2.2uF CBYP =100pF,VEN=2V VIN (V) VLINE () VIN=3.8V to 4.8V VEN=2V IO=100 CBYP=100pF CO=10uF Time (us) Time (us) Fig.17 VEN (on) - VO VEN (V) VO (V) VIN=3.8V VEN=0 to 2V IO=30mA CBYP=open CO=2.2uF Time (us) Page 16 of21

17 Typical Application (Note8) 150mA Ultra Low Dropout Positive Voltage Regulator Note8:Dropuout voltage is 165 when TJ=25 C.In order to obtain a normal output voltage,vo+0.165v is the minimum input voltage which will result in a low PSRR, imposing a bad influence on system. Therefore, the recommended input voltage is VO+0.5V to 13.2V.For -2.8 Version, Its input voltage can be set from 3.3V (VO+0.5V) to 13.2V.For the Adj version, any value from VO+0.5V to 13.2V is available.r1 and R2 must be correctly selected when setting the output voltage. For example, if 3.0V output voltage is required,r1and R2 Can be set to 10KΩ an 14 KΩ respectively. For Adj version, we recommend 2.3V as minimum output voltage. Page 17 of21

18 Application Notes Input Capacitor 150mA Ultra Low Dropout Positive Voltage Regulator A1uF minimum capacitor is recommended to be place between VIN and GND Output Capacitor Bypass capacitor is connected to the internal voltage reference. A 100pF capacitor connected from BYP to GND,make this reference quiet, resulting in a significant reduction in output noise, but the ESR stable area will be narrowed. The start-up speed of the is inversely proportional to the value of reference bypass capacitor. In some cases, if output noise is not a major concern and rapid turn-on is necessary, omit CBYP and BYP open. Power Dissipation Thermal shutdown may occur if exceeding the maximum power dissipation conditions, the junction temperature must be within the range specified under absolute maximum ratings to avoid thermal shutdown. To determine if the power dissipated in the regulator reaches the maximum power dissipation (Fig9 and Fig10), the formula is:tj=ta+pd*θja; PD=(VIN-VO)*IO+VIN*IGND. Where: TJ TJ (max) is absolute maximum rating for the junction temperature; VIN*IGND can be ignored due to the small value. TJ (max) is 150 C, θja is 200 C/W for SOT-23-5 package and 165 C/W for SOT-89 package, no heat-sink is required since the package alone will dissipate enough heat to satisfy these requirements unless the calculated value for power dissipation exceeds the limit. Example: For 2.8V version packaged in SOT-23-5, IO=150mA,TA=30 C, VIN(max) =(150 C-30 C)/(0.15A*200 C/W)+2.8V=6.8V, therefore,for good performance, please make sure that input voltage is less than 6.8V without heat-sink when TA=30 C, Page 18 of21

19 Dimensions in mm (inch) 150mA Ultra Low Dropout Positive Voltage Regulator SOT-89 Page 19 of21

20 SOT-23-5 Page 20 of21

21 How to contact us: 150mA Ultra Low Dropout Positive Voltage Regulator US HEADQUARTERS WEST HARRISON PARKAWAY, VALENCIA, CA Tel: (800) TAITRON (800) (661) Fax: (800) TAITFAX (800) (661) TAITRON COMPONENTS MEXICO, S.A.DE C.V. BOULEVARD CENTRAL 5000 INTERIOR 5 PARQUE INDUSTRIAL ATITALAQUIA, HIDALGO C.P MEXICO Tel: Fax: TAITRON COMPONETS INCORPORATED E REPRESENTAÇÕES DO BRASIL LTDA RUA DOMINGOS DE MORAIS, 2777, 2.ANDAR, SALA 24 SAÚDE - SÃO PAULO-SP BRAZIL Tel: Fax: TAITRON COMPONETS INCORPORATED, SHANGHAI REPRESENTATIVE OFFICE METROBANK PLAZA, 1160 WEST YAN AN ROAD, SUITE 1503, SHANGHAI, , CHINA Tel: Fax: Page 21 of21