Analysis and Improvement of the Switching Behaviour of Low Voltage Power MOSFETs with High Current Ratings under Hard Switching Conditions

Transcription

1 Analysis and Improvement of the Switching Behaviour of Low Voltage Power MOSFETs with High Current Ratings under Hard Switching Conditions Bjoern Wittig and Friedrich W. Fuchs Christian-Albrechts-University of Kiel, Germany Institute of Power Electronics and Electrical Drives Kaiserstr. 2, Kiel, Germany Abstract An analysis and improvement of the switching behaviour of low voltage power MOSFETs with high current ratings is presented. Different turn-off active gate control circuits are described and their performance is analyzed with the focus on the reduction of the overvoltage at turn-off under the precondition of limited increasing of switching losses. The control methods are experimentally compared to a basic gate drive circuit for two different types of low voltage power MOSFETs. I. I NTRODUCTION In battery fed power trains, like in cars and lift trucks, power MOSFETs with high current ratings play a significant role. Typical applications are dc/ac converters for feeding a three phase ac motor or dc/dc converters [1] [3]. Due to the high power and low voltages of i.e. 24 V in some applications high currents are the consequence. Thus there is a high demand for low voltage power MOSFETs with a low drain-source on-state resistance RDS(on) and a low temperature dependence on the market to achieve lower conduction losses. Due to the reduction of the drain-source on-state resistance RDS(on) of modern automotive power MOSFETs and the subsequently decreasing conduction losses, the switching losses get a higher influence of the total power losses of the semiconductors. With higher switching frequencies this effect rises and can play an important role in the choice of a power MOSFET type and gate drive circuit design has an influence on the switching losses. Active gate control of switch on and switch off via the gate drive could be a chance to reduce the switching losses or the overvoltages. In the literature many low cost and easy to implement active gate control methods have been presented for applications with IGBTs under hard switching conditions. Only a few publications were made concerning the use for power MOSFETs as the authors know [4] [6]. In [4] a small inductance is used to measure the current slope in the power MOSFET for decreasing or increasing the switching speed. In addition a concept was presented by /10/$ IEEE 644 measuring the drain source voltage slope of the MOSFET to influence the switching behaviour. Another method is the use of a small transformer to control a signal mosfet at the gate drive circuit and to inject an additional current during turn-on, which leads to a decreasing turn-on switching energy [5]. In [6] an EMI suppression driver is presented which only slows down the gate-source voltage transition near the gate-source threshold voltage, reducing the drain-source voltage slope. An obvious way to increase or to decrease the voltage and current slopes applied for an IGBT is to switch on or off an additional gate resistor and current path to the available gate resistor as described in [7] [9]. In [10], [11] the transistor is turned on again for a very short time after the end of the switching process to decrease the current slope and the overvoltage caused by the parasitic inductances in the commutation path. In this paper an analysis and improvement of the switching behaviour of low voltage power MOSFETs with high current ratings under hard switching conditions is presented. A short explanation and analysis of the theoretical switching behaviour and the effect of the stray inductance of the commutation path on the drain-source voltage characteristic is given at first. Different turn-off active gate control methods are presented and analysed. These methods are divided into three types - the du/dt-control, the di/dt-control and the two-stage-control - and their functionality is explained. Experimental results for two different types of low voltage power MOSFETs are presented. A comparison of the results worked out for the different presented active gate control methods is presented at the end of this paper. II. S WITCHING BEHAVIOUR OF LOW VOLTAGE POWER MOSFET S A typical test circuit for the hard switching process of power MOSFETs with an inductive load and with a conventional gate drive circuit is illustrated in Fig. 1. Here the MOSFET M2 is the device under test and M1 is used as a

2 Fig. 1. Typical test circuit for the hard switching process of power MOSFETs with an inductive load and with a conventional gate drive circuit freewheeling diode like in a typical half bridge configuration. The stray inductance Lσ represents the sum of all stray inductances in the commutation path. The theoretical current and voltage characteristic at turn-on and turn-off of a power MOSFET is displayed in Fig. 2 [12], [13]. The widely used definitions of the current and voltage rise and fall times and the turn-on and turn-off delay times for power MOSFETs are depicted here also. In Fig. 2 the dotted lines show the theoretical characteristic considering the stray inductance Lσ. The drain current overshoot, which results from the reverse recovery current IRRM of the body-diode of M1, is indicated also. At turn-on during the current rise time the induced positive voltages at the stray inductances in the commutation path lead to a lower voltage stress of the power MOSFET M2 [12], [15]. In this phase the voltage decrease is: did (1) dt During the turn-off process and the current fall time the induced voltages at the stray inductances are negative. Considering the turn-on overvoltage VF RM of the inverse body-diode of M1 leads to the following overvoltage peak at turn-off [12]: Fig. 2. Theoretical current and voltage characteristic at turn-on and turnoff of a power MOSFET, without (continuous line) and with (dotted line) consideration of the stray inductance Lσ in the commutation path Vind = Lσ did Vpk = Lσ + VF RM (2) dt For lower current slopes the turn-on overvoltage VF RM of the body diode can be neglected but at higher values VF RM increases and can lead to an additional overvoltage of a few volts for a short time. In Fig. 2 the principle characteristic of the switching losses is illustrated also. There the conduction losses and the normally negligible blocking losses are indicated as Econd respectively Eblock. Considering the parasitic stray inductances in the commutation path and the described voltage characteristic as mentioned above, this induced voltages are responsible for a lower turn-on energy Es(on) and a higher turn-off energy Es(of f ). Because of the very low resulting turn-on energy and the relative low amplitude of drain current overshoot, turn-on active gate control methods 645 Fig. 3. Experimental turn-on and turn-off process of the power MOSFET NP110N055PUG from NEC [14]: VGS 5V/div (blue line), VDS 10V/div (green line), ID 50A/div (red line), t 200ns/div; VDD = 24 V, RG = 3.9 Ω, TJ = 20 C are not mandatory. Therefore the following analysis of active gate drive concepts deals only with the influence and improvement of the turn-off switching characteristic of low voltage power MOSFETs. In Fig. 3 an exemplary turn-on and turn-off process of a low voltage power MOSFET is shown. The reduction of the voltage stress at turn-on and the overvoltage at turn-off is obvious. III. ACTIVE GATE TURN - OFF CONTROL CIRCUITS A. du/dt-control A widely used method to influence the switching behaviour is the so called du/dt-control, which can be seen in Fig. 4

3 Fig. 4. du/dt-control methods a) du/dt-control by means of an external gate-drain-capacitance, b) du/dt-control by means of an external gate-draincapacitance and a zener diode in series Fig. 5. di/dt-control methods a) di/dt-control by means of a zener diode, b) di/dt-control by means of a signal mosfet in the current feedback path (a) [16], [17]. There the voltage slope is fed back i.e. by a small capacitance between the gate and the drain of the power MOSFET. The current through the external gate-drain-capacitance CGD, which is proportional to the voltage slope dvds /dt of the transistor, is directly coupled into the gate of the power MOSFET. This leads to an increase of the voltage rise time and the current fall time. An expansion of this switching control method is shown in Fig. 4 (b), where an additional zener diode Dz is used in series to the external capacitance CGD, well known as an active clamping concept. This induces a faster voltage rise at the beginning of the turn-off process and a slower voltage rise at higher drain-source-voltage. By the way the current slope is reduced. Thus it is possible only to react at too high overvoltages. Fig. 6. Two-stage-control gate drive circuit Another way to influence the switching speed is to measure the current slope did /dt with a feedback circuit at the gate, which is called di/dt-control. This can be done by an additional inductance at the source pin of the power MOSFET or by using the parasitic inductance LσS2 of the copper wire or track. If a too high current falling slope is detected by means of the induced voltage at the inductance, a positive current is fed back via RS and D1 into the gate of the power MOSFET during the current fall time, which is controlled towards on state. the voltage rise time. In Fig. 6 the principle circuit of the two-stage-control circuit is presented. The low ohmic current path is realized by the transistor T2, the low ohmic resistance RGof f,2 and the diode DGof f,2. At the beginning of the turn-off process, T2 is turned on via the gate voltage Vgg. Additionally a small current is injected through R1 and D1 into the power stage and leads to a voltage drop across R2 and R3. This voltage drop is nearly the drain-source voltage of the power MOSFET plus the forward voltage of the diode D1. At a defined measured drain-source voltage the transistor T1 is turned on and hence T2 is turned-off. During the current fall time the low ohmic current path is switched off by this way. In Fig. 5 two ways of realization of the control method are displayed [17]. The first method in Fig. 5 (a) leads to no satisfying results because of the slow response time and the relative high on-state resistance of the zener diode. Using a signal transistor TS instead of a zener diode as shown in Fig. 5 (b) leads to better results. Thus it is possible to control the current slope without to influence the voltage slope at turn-off. Although this leads to nearly the same current fall time and therefore nearly the same induced VDS voltage peak compared to the conventional gate drive circuit, the voltage rise time can be reduced. Furthermore the turn-off delay time td(of f ) is kept low and nearly constant for increasing gate resistance RGof f,1. These method has been also presented in the literature with IGBTs instead of low voltage power MOSFETs [18]. B. di/dt-control IV. E XPERIMENTAL R ESULTS C. Two-stage-control A more complex active gate control method is the twostage-control, where a low ohmic current path for switch off is in parallel to the conventional gate resistor during 646 For experimental analysis two different low voltage power MOSFETs are used, which are described shortly in Table I [14], [19]. Both power MOSFETs offer nearly the

4 Fig. 7. Experimental turn-on and turn-off characteristics of the two-stage-control method in comparison with the conventional gate RG = 7.5 Ω, TJ = 20 C: a) NP110N055PUG from NEC, b) IRFS3306PbF from International Rectifier Fig. 8. Experimental turn-on and turn-off characteristics of the du/dt-control by means of an external gate-drain-capacitance in comparison with the conventional gate RG = 10 Ω, TJ = 20 C: a) NP110N055PUG from NEC, b) IRFS3306PbF from International Rectifier same breakdown voltage VDSS and continuous drain current rating ID,cont.. The typical input capacitance Ciss of the NP110N055PUG, selected from the datasheet table, is almost four times higher than the input capacitance of the IRFS3306PbF. Therefore a significant longer turn-off delay time td(of f ) and voltage rise time tru is expected in case of the NP110N055PUG. The stray inductance Lσ of the whole current commutation path in this laboratory setup is measured to about 36 nh. The DC link voltage VDD is chosen to 24 V. All control methods have been tested at the same working point. Additional analyses at junction temperatures of TJ = 100 C have been made, which have not led to an essential temperature dependence of the switching process with and without the proposed control 647 methods and will be therefore not presented here. Breakdown voltage VDSS Drain current ID,cont. Drain-source resist. RDS(on) Input capacitance Ciss NP110N055 PUG 55 V 110 A 1.9 mω pf IRFS3306 PbF 60 V 120 A 3.3 mω 4520 pf TABLE I DATASHEET PARAMETERS OF THE USED POWER MOSFET S IN THE LABORATORY SETUP, [14], [19] In Fig. 7 the experimental turn-on and turn-off characteristic of both used power MOSFETs in case of the conventional and

5 Fig. 9. Experimental results of the presented active gate control methods with the NP110N055PUG from VDD = 24 V, ID = 150 A, TJ = 20 C the two-stage gate drive circuit are shown. Due to the stray inductance Lσ of the commutation path, the drain-source voltage is very low during the current rise time. It is clearly to be recognized, that the two-stage control method leads to a faster voltage rise time and therefore to considerable lower turn-off losses. The turn-on behaviour is not influenced by the two-stage-control method. Comparing the turn-on and turn-off characteristic of both power MOSFETs, it is cognoscible, that at same gate resistance the drain-source voltage slope of the IRFS3306PbF is higher than the voltage slope of the NP110N055PUG. This is caused by the lower input capacitance Ciss of the IRFS3306PbF as mentioned before. The du/dt-control by means of an external gate-draincapacitance is compared with the conventional gate drive circuit in Fig. 8. At turn-on the current and voltage characteristics are not different to each other. In contrast at turn-off the du/dt-control provides a less steep current slope and therefore a lower induced overvoltage Vind, resulting in a higher turn-off energy Es(of f ). For comparison the results of the proposed active gate drive circuits are illustrated in Fig. 9 for the NP110N055PUG from NEC. In Fig. 9 (a) the induced overvoltage Vpk in dependence on the turn-off energy Es(of f ) is illustrated. It can be seen, that the two-stage active gate control leads to the most satisfying results concerning the induced overvoltage and turn-off losses. For lower gate resistances a reduction of 10 to 20 % of the turn-off energy Es(of f ) at the same induced overvoltage was achieved. The du/dt-control method by the means of an external gate-drain-capacitance with 648 and without a zener diode also delivers good results. The di/dt-control does not provide satisfying results at higher gate-resistances because of the lower voltage drop at the source stray inductance Lsσ2 during turn-off. In Fig. 9 (b)-(c) the induced overvoltage Vind and the turn-on and turn-off switching energy Es depending on the gate-resistance are shown. With higher gate resistance the overvoltage decreases and the switching energy increases. In case of the two-stage-control there is a much lower switching energy rise with higher gate-resistance due to the reduced voltage rise time, which can also be seen in Fig. 9 (f). Another effect of the two-stage-control is the short turn-off delay time td(of f ), which is nearly constant with increasing gate-resistance and much lower compared to the other active gate drive methods. This can lead indirectly to lower power losses of a converter with half bridge topology due to a possible reduction of the deadtimes. In Fig. 10 (a)-(f) the experimental results for the IRFS3306PbF from International Rectifier are presented, where similar results are depicted as described before. V. C ONCLUSION Different turn-off active gate control methods for low voltage power MOSFETs with high current ratings have been presented and analysed. First the theoretical switching behaviour of a power MOSFET is explained. Different gate control methods of the du/dt-control and of the di/dt-control and one two-stage-control concept have been presented. The proposed gate drive circuits have been realized and measured in the laboratory. The two-stage-control concept delivers the best

6 Fig. 10. Experimental results of the presented active gate control methods with the IRFS3306PbF from International VDD = 24 V, ID = 150 A, TJ = 20 C results of the analysed active gate drive circuits considering the turn-off losses in dependence with the turn-off overvoltage. The turn-off delay time can be reduced by the two-stage control in comparison to a conventional gate drive circuit also. With minor additional components needed a remarkable reduction of power losses is achieved. Thus this method can be judged well to be used in industrial applications. ACKNOWLEDGMENT The authors would like to thank the Fraunhofer-Gesellschaft and the state of Schleswig-Holstein, which partly founded this project. The work was carried out in a combined project of the Centre of Competence for Power Electronics SchleswigHolstein. R EFERENCES [1] A. Emadi, Handbook of Automotive Power Electronics and Motor Drives. CRC Press, Boca Raton, [2] A. Lindemann and S. Foerster, Design aspects for power mosfet components in automotive electronics. Maribor: 12th International Power Electronics and Motion Control Conference, EPE-PEMC, [3] W. Franke, B. Carstens, F. Fuchs, and N. Eggert, A detailed analysis of a power converter to buffer the battery voltage in lift trucks. Porto: Conference of the IEEE Industrial Electronics Society, [4] J. Berry, Mosfet operating under hard switching mode: Voltage and current gradients control. European Conference on Power Electronics and Applications, [5] T. Shimizu and K. Wada, A gate drive circuit of power mosfets and igbts for low switching losses. Daegu, Korea: 7th Internatonal Conference on Power Electronics, ICPE, [6] H. Yee, An emi suppression mosfet driver. Proceedings of the Annual IEEE Applied Power Electronics Conference and Exposition, [7] B. Weis and M. Bruckmann, A new gate driver circuit for improved turn-off characteristics of high current igbt modules. St. Louis: IEEE Industry Applications Conference, [8] M. Kimata, S. Chikai, T. Tanaka, and K. Ishii, High performance gate drive circuit of high voltage ipms (hvipms). Record. 29th Annual IEEE Power Electronics Specialists Conference, [9] V. John, B. Suh, and T. Lipo, High-performance active gate drive for high-power igbts, IEEE Transactions on Industry Applications, vol. 35, no. 5, [10] N. Idir, R. Bausire, and J. Franchaud, Active gate voltage control of turn-on di/dt and turn-off dv/dt in insulated gate transistors, IEEE Transactions on Power Electronics, vol. 21, no. 4, pp , [11] H. Sawezyn and R. Bausire, A feedback voltage control of insulated gate power transistors, Control and Intelligent Systems, vol. 31, no. 3, [12] J. Lutz, Halbleiter-Leistungsbauelemente - Physik, Eigenschaften, Zuverlaessigkeit; Semiconductor Power Devices - Physic, Characteristics, Reliability. Springer Verlag, [13] B. Baliga, Fundamentals of Power Semiconductor Devices. Springer Verlag, New York, [14] NEC, Datasheet NP110N055PUG, Switching N-Channel Power MOSFET, NEC Electronics Corporation, [15] D. Schroeder, Leistungselektronische Bauelemente; Power Electronic Devices. Springer Verlag, Heidelberg, [16] H. Rothwangl and H. Schamboeck, Advanced igbt control strategies improvement of the switching characteristics via active gate control. Toulouse: 10th European Conference on Power Electronics and Applications, EPE, [17] M. Helsper, Analyse und Verbesserung des Verhaltens von Planar- und Trench-IGBT-Modulen in hart bzw. weich schaltenden Applikationen; Analysis and Improvement of the Behaviour of Planar and Trench IBGT Modules in Hard and Soft Switching Applications. Thesis, ChristianAlbrechts-University of Kiel, Shaker Verlag, Kiel, [18] M. Helsper and F. Fuchs, Adaptation of igbt switching behaviour by means of active gate drive control for low and medium power. Toulouse: European Conference on Power Electronics and Applications, [19] IRF, HEXFET Power MOSFET IRFS3306PbF, Datasheet, International Rectifier,