I2-PAK I-PAK. TC = 25 C unless otherwise noted D2-PAK/D-PAK I2-PAK / I-PAK/ TO-220

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1 General Description This Power MOSFET is produced Features using Maple semi s Advanced Super-Junction technology A, 500V, R DS(on) typ. = 0.5Ω@V GS = 10 V This advanced technology has - been Low gate especially charge ( typical tailored 25nC) to minimize conduction loss, provide - High ruggedness superior switching - Fast switching performance, and withstand high energy pulse in the - 100% avalanche tested avalanche and commutation mode. - Improved dv/dt capability These devices are well suited for AC/DC power conversion SLD50R290SJ,SLU50R290SJ,SLP50R290SJ SLF50R290SJ, SLB50R290SJ, SLI50R290SJ 500V N-Channel MOSFET Features -14A, 500V, RDS(on) typ.= 0.27Ω@VGS = 10 V - Low gate charge ( typical 38nC) - High ruggedness - Fast switching - 100% avalanche tested - Improved dv/dt capability D D I2-PAK G D S TO-220 G D S TO-220F G D S G D D G S D2-PAK G S D-PAK G D S I-PAK S Absolute Maximum Ratings TC = 25 C unless otherwise noted Symbol Parameter D2-PAK/D-PAK I2-PAK / I-PAK/ TO-220 TO-220F Units VDSS Drain-Source Voltage 500 V ID Drain Current - Continuous (TC = 25 ) 14 14* A - Continuous (TC = 100 ) 9 9* A IDM Drain Current - Pulsed (Note 1) 30 30* A VGSS Gate-Source Voltage ±30 V EAS Single Pulsed Avalanche Energy (Note 2) 132 mj IAR Avalanche Current (Note 1) 2.1 A EAR Repetitive Avalanche Energ (Note 1) 65 mj dv/dt Peak Diode Recovery dv/dt (Note 3) 5.0 V/ns PD Power Dissipation (TC = 25 ) W - Derate above W/ TJ, TSTG Operating and Storage Temperature Range -55 to +150 TL Maximum lead temperature for soldering purposes, 300 1/8" from case for 5 seconds *Drain current limited by maximum junction temperature. Thermal Characteristics Symbol Parameter Value Units DPAK IPAK TO220 D2PAK I2PAK TO220F RθJC Thermal Resistance, Junction-to-Case /W RθJS Thermal Resistance, Case-to-Sink Typ /W RθJA Thermal Resistance, Junction-to-Ambient /W Maple Semiconductor CO.,LTD Rev 1.0 September 2015 Page1

2 Electrical Characteristics ( TC = 25 C unless otherwise noted ) Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics VGS = 0V,ID = 250uA, TJ= V BVDSS Drain-Source Breakdown Voltage VGS = 0V,ID = 250uA, TJ= V ΔBVDSS Breakdown Voltage Temperature ΔTJ coefficient ID = 250uA, referenced to 25 C V/ C VDS =500V, VGS = 0V ua IDSS Drain-Source Leakage Current VDS = 400V, TC = 125 C ua Gate-Source Leakage, Forward VGS = 30V, VDS = 0V na IGSS Gate-source Leakage, Reverse VGS = -30V, VDS = 0V na On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250uA V RDS(ON) Static Drain-Source On-state Resistance VGS =10 V, ID = 7A Ω Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance VGS =0 V, VDS =25V, f = 1MHz pf Crss Reverse Transfer Capacitance Dynamic Characteristics td(on) Turn-on Delay Time ` 26 - tr Rise Time VDD =250V, ID =14A, RG =25Ω td(off) Turn-off Delay Time ns tf Fall Time Qg Total Gate Charge Qgs Gate-Source Charge VDS =400V, VGS =10V, ID =14A nc Qgd Gate-Drain Charge(Miller Charge) Source-Drain Diode Ratings and Characteristics Symbol Parameter Test Conditions Min. Typ. Max. Unit. IS Maximum Continuous Drain-Source Diode Forward Current ISM Maximum Pulsed Drain-Source Diode Forward Current A VSD Diode Forward Voltage IS =14A, VGS =0V V trr Reverse Recovery Time ns IS =14A, VGS=0V, dif/dt=100a/us Qrr Reverse Recovery Charge uc NOTES 1. Repeativity rating : pulse width limited by junction temperature 2. L =60mH, IAS = 4.4A, VDD = 150V, RG = 25Ω, Starting TJ = 25 C 3. ISD 10A, di/dt 200A/us, VDD BVDSS, Starting TJ = 25 C 4. Pulse Test : Pulse Width 300us, Duty Cycle 2% 5. Essentially independent of operating temperature. Maple Semiconductor CO.,LTD Rev 1.0 September 2015 Page2

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8 12V Current Regulator 50KΩ 200nF Gate Charge Test Circuit & Waveform 300nF Same Type as DUT V DS V GS 10V Q g V GS Q gs Q gd DUT 3mA R 1 R 2 Current Sampling (I G ) Resistor Current Sampling (I D ) Resistor Charge Resistive Switching Test Circuit & Waveforms V out R L V out 90% V in ( 0.5 rated V DS ) R G DUT V in 10% 10V t d(on) t r t d(off) tf t on t off Unclamped Inductive Switching Test Circuit & Waveforms V DS L L 1 E AS = ---- L L I 2 AS 2 BV DSS BV DSS -- Vary t p to obtain required peak I D I D BV DSS I AS R G C I D (t) 10V DUT V DS (t) t p t p Time Maple Semiconductor CO.,LTD Rev 1.0 September 2015 Page8

9 Peak Diode Recovery dv/dt Test Circuit & Waveforms + DUT V DS -- I S L V GS Driver R G Same Type as DUT V GS dv/dt controlled by 밨 G I S controlled by Duty Factor 밆? V GS ( Driver ) D = Gate Pulse Width Gate Pulse Period 10V I FM, Body Diode Forward Current I S ( DUT ) di/dt I RM Body Diode Reverse Current V DS ( DUT ) Body Diode Recovery dv/dt V f Body Diode Forward Voltage Drop Maple Semiconductor CO.,LTD Rev 1.0 September 2015 Page9