MC74HC574A. Octal 3-State Noninverting D Flip-Flop. High Performance Silicon Gate CMOS
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- Martin Phelps
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1 Ocal 3-Sae Noninvering D Flip-Flop High Performance Silicon Gae OS The 74H574 is idenical in pinou o he LS574. The device inpus are compaible wih sandard OS oupus; wih pull up resisors, hey are compaible wih LSTTL oupus. Daa meeing he se up ime is clocked o he oupus wih he rising edge of he lock. The Oupu Enable inpu does no affec he saes of he flip flops bu when Oupu Enable is high, all device oupus are forced o he high impedance sae. Thus, daa may be sored even when he oupus are no enabled. The H574 is idenical in funcion o he H374 bu has he flip flop inpus on he opposie side of he package from he oupus o faciliae P board layou. PDIP N SUFFIX SE 738 RKING DIGRS 74H574N WLYYWWG Feaures Oupu Drive apabiliy: 5 LSTTL Loads Oupus Direcly Inerface o OS, NOS, and TTL Operaing olage Range: 2. o Low Inpu urren:. In ompliance wih he Requireme Defined by JEDE Sandard No. 7 hip omplexiy: 266 FETs or 66.5 Equivalen Gaes Pb Free Packages are vailable SOI DW SUFFIX SE 75D TSSOP DT SUFFIX SE 948E 74H574 WLYYWWG H 574 LYW SOEIJ F SUFFIX SE H574 WLYWWG = ssembly Locaion WL, L = Wafer Lo YY, Y = Year WW, W = Work Week G = Pb Free Package = Pb Free Package (Noe: icrodo may be in eiher locaion) *For addiional informaion on our Pb Free sraegy and soldering deails, please download he ON Semiconducor Soldering and ouning Techniques Reference anual, SOLDERR/D. ORDERING INFORTION See deailed ordering and shipping informaion in he package dimeio secion on page 4 of his daa shee. Semiconducor ompone Indusries, LL, 9 Publicaion Order Number: 74H574/D
2 XIU RTINGS Symbol Parameer alue Uni D Supply olage.5 o 7. I D Inpu olage.5 o.5 O D Oupu olage (Noe ).5 o.5 I IK D Inpu Diode urren m I OK D Oupu Diode urren 35 m I O D Oupu Sink urren 35 m I D Supply urren per Supply Pin 75 m I GND D Ground urren per Ground Pin 75 m T STG Sorage Temperaure Range 65 o 5 T L Lead Temperaure, mm from ase for Seconds 26 T J Juncion Temperaure under ias 5 J Thermal Resisance PDIP SOI TSSOP /W P D Power Dissipaion in Sill ir a 85 PDIP SOI TSSOP mw SL oisure Seiiviy Level F R Flammabiliy Raing Oxygen Index: 3% 35% UL in ESD ESD Wihsand olage Human ody odel (Noe 2) achine odel (Noe 3) harged Device odel (Noe 4) > >3 > I Lachup Lachup Performance bove and elow GND a 85 (Noe 5) 3 m Sresses exceeding aximum Raings may damage he device. aximum Raings are sress raings only. Funcional operaion above he Recommended Operaing ondiio is no implied. Exended exposure o sresses above he Recommended Operaing ondiio may affec device reliabiliy.. I O absolue maximum raing mus be observed. 2. Tesed o EI/JESD Tesed o EI/JESD Tesed o JESD Tesed o EI/JESD For high frequency or heavy load coideraio, see he ON Semiconducor High Speed OS Daa ook (DL29/D). REOENDED OPERTING ONDITIONS Symbol Parameer in ax Uni D Supply olage (Referenced o GND) 2. I, O D Inpu olage, Oupu olage (Referenced o GND) T Operaing Temperaure, ll Package Types r, f Inpu Rise and Fall Time (Figure 3) = 2. = 4.5 = 7. Unused inpus may no be lef open. ll inpus mus be ied o a high or low logic inpu volage level. 5 3
3 ORDERING INFORTION Device Package Shipping 74H574N PDIP 8 Unis / ox 74H574NG PDIP 8 Unis / ox 74H574DW SOI WIDE 38 Unis / Rail 74H574DWG SOI WIDE 38 Unis / Rail 74H574DWR2 SOI WIDE Tape & Reel 74H574DWR2G SOI WIDE Tape & Reel 74H574DTR2 TSSOP * 25 Tape & Reel 74H574DTR2G TSSOP * 25 Tape & Reel 74H574F SOEIJ 4 Unis / Rail 74H574FG SOEIJ 4 Unis / Rail 74H574FEL SOEIJ Tape & Reel 74H574FELG SOEIJ Tape & Reel For informaion on ape and reel specificaio, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaio rochure, RD8/D. *This package is inherenly Pb Free. D ELETRIL HRTERISTIS (olages Referenced o GND) Guaraneed Limi Symbol Parameer Tes ondiio 55 o Uni Î IH ÎÎ inimum High Level InpuÎ ou =. 2. ÎÎ.5.5Î olage ÎÎ ou ÎÎ Î Î IL aximum Low Level Inpu ÎÎ olage Î ou = ou 3. ÎÎ.9.9Î Î 4.5 ÎÎ.35.35Î Î OH ÎÎ inimum High Level Oupu in = IH ÎÎ ÎÎ olage Î ou ÎÎ Î Î OH inimum High Level Oupu ÎÎ olage Î in = IH ou ou m 4.5 ÎÎ Î 3.7 ÎÎ ou 7.8 m ÎÎ Î OL ÎÎ aximum Low Level Oupu Î in = IL olage ou 2. ÎÎ..Î Î ÎÎ..Î ÎÎ in = IL ou 2.4 m 3. ÎÎ.26.33Î.4 ÎÎ ou ou 7.8 m ÎÎ.26.33Î.4 Î I in ÎÎ aximum Inpu Leakage Î in = or GND Î urren Î.. Î. Î I OZ ÎÎ aximum Three Sae Î Oupu in High Impedance Sae Leakage urren in = IL or IH ÎÎ ou = or GND ÎÎ.5 Î Î I ÎÎ aximum Quiescen Supply Î in = or GND ÎÎ 4. 4 Î 6 urren (per Package) I ou = 8. Informaion on ypical parameric values can be found in he ON Semiconducor High Speed OS Daa ook (DL29/D). 4
4 ELETRIL HRTERISTIS ( L = 5 pf; Inpu r = f = ) Guaraneed Limi Symbol Parameer 55 o Uni Î f max ÎÎ aximum lock Frequency (5% Duy ycle) 2. ÎÎ 4.8Î 4. Hz (Figures 3 and 6) Î 4.5 ÎÎ 3 24Î Î PLH, aximum Propagaion Delay, lock o Q PHL (Figures 3 and 6) Î 4.5 ÎÎ 32 4Î Î PLZ, aximum Propagaion Delay, Oupu Enable o Q PHZ ÎÎ (Figures 4 and 7) 3. ÎÎ 25Î Î ÎÎ 26 33Î 38 Î PZL, ÎÎ aximum Propagaion Delay, Oupu Enable o Q 2. ÎÎ 4 75Î 2 Î PZH ÎÎ (Figures 4 and 7) 3. ÎÎ 9 Î Î 6 ÎÎ 24 3Î 36 Î TLH, ÎÎ aximum Oupu Traiion Time, any Oupu 2. ÎÎ 6 75Î 9 Î THL (Figures 3 and 6) Î 4.5 ÎÎ 2 5Î Î in Î aximum Inpu apaciance Î Î pf Î ou aximum Three Sae Oupu apaciance, Oupu in High Impedance 5 Î 5 Î 5 pf Sae 9. For propagaion delays wih loads oher han 5 pf, and informaion on ypical parameric values, see he ON Semiconducor High Speed OS Daa ook (DL29/D). 25, = PD Power Dissipaion apaciance (Per Enabled Oupu)* 24 pf *Used o deermine he no load dynamic power coumpion: P D = PD 2 f + I. For load coideraio, see he ON Semiconducor High Speed OS Daa ook (DL29/D). TIING REQUIREENTS ( L = 5 pf; Inpu r = f = ) Guaraneed Limi 55 o Symbol Parameer Figure ols in ax in ax in ax Uni Î su inimum Seup Time, Daa o lock ÎÎ Î ÎÎ 9. 3 Î Î h inimum Hold Time, lock o Daa Î 5 2. Î ÎÎ 3. Î 4.5 ÎÎ Î Î w inimum Pulse Widh, lock Î Î ÎÎ Î Î r, f aximum Inpu Rise and Fall Times 3 2. Î ÎÎ ÎÎ 5
5 PKGE DIENSIONS PDIP N SUFFIX SE ISSUE E T SETING PLNE G E F D PL N K.25 (.) T L J PL.25 (.) T NOTES:. DIENSIONING ND TOLERNING PER NSI Y4.5, ONTROLLING DIENSION: INH. 3. DIENSION L TO ENTER OF LED WHEN FORED PRLLEL. 4. DIENSION DOES NOT INLUDE OLD FLSH. INHES ILLIETERS DI IN X IN X D E.5 S.27 S F G. S 2.54 S J K L.3 S 7.62 S 5 5 N SOI DW SUFFIX SE 75D 5 ISSUE G H X.25 D E h X 45 NOTES:. DIENSIONS RE IN ILLIETERS. 2. INTERPRET DIENSIONS ND TOLERNES PER SE Y4.5, DIENSIONS D ND E DO NOT INLUDE OLD PROTRUSION. 4. XIU OLD PROTRUSION.5 PER SIDE. 5. DIENSION DOES NOT INLUDE DR PROTRUSION. LLOWLE PROTRUSION SHLL E.3 TOTL IN EXESS OF DIENSION T XIU TERIL ONDITION. X.25 T S 8X e S T SETING PLNE L ILLIETERS DI IN X D E e.27 S H.5.55 h L
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