DS21600/DS21602/DS V/5V Clock Rate Adapter
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1 DS21600/DS21602/DS V/5V Clock Rate Adapter GENERAL DESCRIPTION The DS21600/DS21602/DS21604 are multiple-rate clock adapters that convert between E-carrier and T- carrier clocks rates. A T1 or E1 clock output, CLKOUT1, is available, along with a higher multiple rate clock output, CLKOUT2. CLKOUT1 and CLKOUT2 are frequency locked to the clock input. The clock outputs, along with frame-sync output, can be phase-aligned to a frame-sync input. The devices are fully compatible with the LXP600A, LXP602, and LXP604, and operate from either a 5V or 3.3V supply. All operation modes include a standard 8kHz output. The DS21600/DS21602/DS21604 are available in 16-pin SO, and are rated for industrial temperatures. ORDERING INFORMATION PART TEMP RANGE PIN-PACKAGE DS21600SN -40 C to +85 C 16 SO DS21600SN+ -40 C to +85 C 16 SO DS21600N -40 C to +85 C 8 DIP DS21600N+ -40 C to +85 C 8 DIP DS21602SN -40 C to +85 C 16 SO DS21602SN+ -40 C to +85 C 16 SO DS21602N -40 C to +85 C 8 DIP DS21602N+ -40 C to +85 C 8 DIP DS21604SN -40 C to +85 C 16 SO DS21604SN+ -40 C to +85 C 16 SO DS21604N -40 C to +85 C 8 DIP DS21604N+ -40 C to +85 C 8 DIP + Denotes a lead(pb)-free/rohs-compliant device. FREQUENCY CONVERSIONS (MHz) PART CLKOUT1 CLKOUT2 DS DS DS FEATURES Direct Drop-In Replacement for LXP600ASE, LXP602SE, and LXP604SE Converts E-Carrier Clock Rates to T-Carrier Clock Rates Converts T-Carrier Clock Rates to E-Carrier Clock Rates 3.3V or 5V Supply Low Jitter Output Multiple Output Clocks Synchronized to Input Clock 8kHz Frequency-Locked Output for All Operation Modes No External Components Required 16-Pin SO and 8-Pin DIP Industrial Temperature Range: -40 C to +85 C PIN CONFIGURATION TOP VIEW Dallas Semiconductor DS21600/2/4 SO Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: 1 of 12 REV:
2 TABLE OF CONTENTS 1. PIN DESCRIPTION PIN NAME CROSS-REFERENCE TO LXP60X FUNCTIONAL DESCRIPTION MODE SELECT FRAME-SYNC INPUT OUTPUT JITTER JITTER TRANSFER OPERATING PARAMETERS PACKAGE INFORMATION REVISION HISTORY LIST OF FIGURES Figure 1-1. Block Diagram...3 Figure 3-1. Nominal Jitter Transer for 2.048MHz to 1.544MHz Conversion...5 Figure 3-2. Nominal Jitter Transfer for 1.544MHz to 2.048MHz Conversion...6 Figure 4-1. DS21600/DS21602 High-to-Low Frequency Conversion Frame-Sync Alignment...8 Figure 4-2. DS21604 High-To-Low Frequency Conversion Frame-Sync Alignment...9 Figure 4-3. DS21600 Low-to-High Frequency Conversion Frame-Sync Alignment...9 Figure 4-4. DS21602 Low-to-High Frequency Conversion Frame-Sync Alignment...10 Figure 4-5. DS21604 Low-to-High Frequency Conversion Frame-Sync Alignment...10 LIST OF TABLES Table 1-A. Pin Description...3 Table 1-B. Pin Name Cross-Reference to LXP60x...3 Table 2-A. Frequency Conversions (MHz)...4 Table 3-A. Output Jitter Specifications of 12
3 1. PIN DESCRIPTION Table 1-A. Pin Description PIN DIP SO NAME TYPE FUNCTION 1, 3, 6, 8, 10, 11, 13, 15 N.C. No Connect 1 2 SYNCOUT Output Synchronization Output. An 8kHz output that can be synchronized to the clock outputs. 2 4 CLKOUT2 Output Clock Output 2. T1 or E1 carrier clock output referenced to. 3 5 Input Clock Input. Reference Clock Input. CLKOUT1 and CLKOUT2 will be referenced to this clock. 4 7 CLKOUT1 Output Clock Output 1. T1 or E1 carrier clock output referenced to. 5 9 Vss Supply Ground 6 12 SEL Input Clock Mode Select. Conversion mode select SYNCIN Input Synchronization Input. Used to synchronize the clock outputs and SYNCOUT to and SYNCIN. SYNCIN should be tied high or low when not in use V DD Supply Positive Supply, 3.3V or 5V ±5% 1.1 Pin Name Cross-Reference to LXP60X Table 1-B. Pin Name Cross-Reference to LXP60x DS21600/DS21602 LXP600ALXP602/L /DS21604 XP604 FUNCTION SYNCOUT FSO Synchronization Pulse Output CLKOUT2 HFO Clock 2 Output CLKI Clock Input CLKOUT1 CLKO Clock 1 Output V SS GND Ground SEL SEL Clock Mode Select SYNCIN FSI Synchronization Pulse Input N.C. N.C. No Connect V DD V CC Positive Supply Figure 1-1. Block Diagram CLKOUT2 ANALOG PLL Dallas Semiconductor DS21600/DS21602/DS21604 FEEDBACK CIRCUIT OUTPUT DIVIDER CLKOUT1 SEL SYNCIN FRAME SYNC GENERATOR SYNCOUT 3 of 12
4 2. FUNCTIONAL DESCRIPTION A clock input at is converted to an alternate clock rate available on CLKOUT1. A higher multiple-rate clock also is available on CLKOUT2. Additionally, an 8kHz clock locked to is always available at the SYNCOUT pin. The SEL pin controls clock-rate conversion selection. 2.1 Mode Select The SEL pin is used to select the operating frequencies. Table 2-A shows the SEL state for the various operating modes of the DS21600, DS21602, and DS Table 2-A. Frequency Conversions (MHz) PART SEL CLKOUT1 CLKOUT2 DS DS DS Frame-Sync Input In all cases, CLKOUT1 and CLKOUT2 are frequency-locked to. CLKOUT1, CLKOUT2, and SYNCOUT are phased-locked to SYNCIN when SYNCIN is asserted. The signal applied to SYNCIN can be 8kHz or some integer subrate such as 1kHz, 2kHz, or 4kHz. Phase synchronization occurs within a maximum of 50ms when SYNCIN is 8kHz. 3. OUTPUT JITTER Table 3-A shows the output jitter specifications for 2.048MHz (or 4.096MHz) to 1.544MHz conversions (SEL = 1) and 1.544MHz to 2.048MHz (or 4.096MHz) conversions (SEL = 0). Table 3-A. Output Jitter Specifications CLKOUT1 FREQUENCY SPECIFICATION VALUE TYP MAX UNITS (MHz) (MHz) BAND 20Hz 100kHz G UI P-P 18kHz 100kHz G UI P-P No bandlimiting TR UI or P-P Hz 40kHz TR UI P-P 8kHz 40kHz TR UI P-P 4 of 12
5 3.1 Jitter Transfer Figure 3-1 and Figure 3-2 show jitter transfer for 2.048MHz-to-1.544MHz conversions and vice versa. Figure 3-1. Nominal Jitter Transfer for 2.048MHz-to-1.544MHz Conversion 2 JITTER GAIN (ns/ns) JITTER FREQUENCY (khz) NOTE: THE TYPICAL PEAK JITTER GAIN OF THE DS21600/DS21602/DS21604 IS ABOUT 1.6 FOR CONVERSION FROM T1 TO E1. THE TYPICAL PEAK-JITTER GAIN OF THE LEVEL ONE DEVICE IS ABOUT 1.1. HOWEVER, THE JITTER GAIN FOR THE DS21600/DS21602/DS21604 PEAKS IN THE 4kHz TO 8kHz RANGE, WHEREAS THE PEAK JITTER GAIN FOR THE LXP6XX DEVICES SPANS A GREATER FREQUENCY RANGE (20kHz TO 40kHz). 5 of 12
6 Figure 3-2. Nominal Jitter Transfer for 1.544MHz-to-2.048MHz Conversion JITTER GAIN (ns/ns) JITTER FREQUENCY (khz) NOTE: THE TYPICAL PEAK JITTER GAIN OF THE DS21600/DS21602/DS21604 IS ABOUT 1.6 FOR CONVERSION FROM T1 TO E1. THE TYPICAL PEAK-JITTER GAIN OF THE LEVEL ONE DEVICE IS ABOUT 1.1. HOWEVER, THE JITTER GAIN FOR THE DS21600/DS21602/DS21604 PEAKS IN THE 4kHz TO 8kHz RANGE, WHEREAS THE PEAK JITTER GAIN FOR THE LXP6XX DEVICES SPANS A GREATER FREQUENCY RANGE (20kHz TO 40kHz). 6 of 12
7 4. OPERATING PARAMETERS ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground..-1.0V to +6.0V Operating Temperature Range for DS21600SN, DS21602SN, DS21604SN.-40 C to +85 C Storage Temperature Range.-55 C to +125 C Soldering Temperature...See IPC/JEDEC J-STD-020 Specification Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect device reliability. RECOMMENDED DC OPERATING CONDITIONS (T A = -40 C to +85 C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Logic 1 V IH (Note 1) V Logic 0 V IL (Note 1) V Supply Voltage V DD 3.3V V V DC CHARACTERISTICS (V DD = 3.3V/5V 5%, T A = -40 C to +85 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Current I DD (Note 2) 14 ma Input Leakage I IL (Note 3) A Output Leakage I LO 1.0 A Output Current (2.4V) I OH -1.0 ma Output Current (0.4V) I OL +4.0 ma 7 of 12
8 AC TIMING (Figure 4-1, Figure 4-2, Figure 4-3, Figure 4-4, and Figure 4-5) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Capture Range on (Note 1) ±10,000 ppm Lock Range on (Note 1) ±10,000 ppm Duty Cycle (Note 1) % SYNCIN Setup to Rising t SU (Note 1) 46 ns SYNCIN Hold After Rising t HI (Note 1) 30 ns SYNCIN Pulse Width t PW (Note 1) 76 period ns CLKOUT1 Delay from Rising t D 3.3V (Note 1) V (Note 1) ns CLKOUT1 Duty Cycle C D (Note 1) 50 % SYNCOUT Delay from CLKOUT2 t DF (Note 1) ns SYNCOUT Pulse Width t SPW (Note 1) CLKOUT 1 period ns CLKOUT1 Delay from CLKOUT2 Rising t DH 3.3V (Note 1) ns Rise/Fall Time on, SYNCIN 3.3V (Note 1) 60 ns Rise/Fall Time on CLKOUT1, SYNCOUT, CLKOUT2 (Note 4) t RF t RF 5V (Note 1) V (Note 1) 75 5V (Note 1) 40 ns Note 1: Guaranteed by design. Note 2: 100pF load on all outputs. Note 3: 0V < V IN < V DD. Note 4: 100pF load on CLKOUT1, SYNCOUT, CLKOUT2. Figure 4-1. DS21600/DS21602 High-to-Low Frequency Conversion Frame-Sync Alignment (2.048MHz) SYNCIN t SU t HI CLKOUT1 (1.544MHz) t PW t D t DH SYNCOUT t SPW t DF CLKOUT2 (6.176MHz) 8 of 12
9 Figure 4-2. DS21604 High-To-Low Frequency Conversion Frame-Sync Alignment (4.096MHz) SYNCIN t SU t HI CLKOUT1 (1.544MHz) t PW t D t DH SYNCOUT t SPW CLKOUT2 (6.176MHz) t DF Figure 4-3. DS21600 Low-to-High Frequency Conversion Frame-Sync Alignment (1.544MHz) t SU t HI SYNCIN t PW CLKOUT1 (2.048MHz) t D t DH SYNCOUT t SPW CLKOUT2 (6.144MHz) t DF 9 of 12
10 Figure 4-4. DS21602 Low-to-High Frequency Conversion Frame-Sync Alignment (1.544MHz) t SU t HI SYNCIN t PW CLKOUT1 (2.048MHz) t D t DH SYNCOUT t SP t DF CLKOUT2 (8.192MHz) Figure 4-5. DS21604 Low-to-High Frequency Conversion Frame-Sync Alignment (1.544MHz) t SU t HI SYNCIN t PW CLKOUT1 (4.096MHz) t DH t D SYNCOUT T SPW CLKOUT2 (8.192MHz ) t DF 10 of 12
11 5. PACKAGE INFORMATION For the latest package outline information and land patterns, go to PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 16 SO W PDIP P of 12
12 6. REVISION HISTORY REVISION DESCRIPTION Preliminary release Added package specifications Correct operating voltage range Added mechanical drawing for DIP package Added jitter specifications and pin list for all packages; added timing diagrams Updated jitter specifications Added 3.3V operation specifications Added the spec for soldering temperature in the Absolute Maximum Ratings section Changed timing specs in DC Characteristics and AC Timing tables to guaranteed by design Added lead-free packages to Ordering Information on page of 12 Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation. 12 of 12
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19-2484; Rev 0; 7/02 ECL/PECL Dual Differential 2:1 Multiplexer General Description The fully differential dual 2:1 multiplexer (mux) features extremely low propagation delay (560ps max) and output-to-output
Quad, Rail-to-Rail, Fault-Protected, SPST Analog Switches
19-2418; Rev ; 4/2 Quad, Rail-to-Rail, Fault-Protected, General Description The are quad, single-pole/single-throw (SPST), fault-protected analog switches. They are pin compatible with the industry-standard
10-Bit, Low-Power, Rail-to-Rail Voltage-Output Serial DAC in SOT23
19-195; Rev 1; 1/4 1-Bit, Low-Power, Rail-to-Rail General Description The is a small footprint, low-power, 1-bit digital-to-analog converter (DAC) that operates from a single +.7V to +5.5V supply. The
EVALUATION KIT AVAILABLE Precision, High-Bandwidth Op Amp
19-227; Rev ; 9/1 EVALUATION KIT AVAILABLE Precision, High-Bandwidth Op Amp General Description The op amp features rail-to-rail output and MHz GBW at just 1mA supply current. At power-up, this device
DS1267B Dual Digital Potentiometer
Dual Digital Potentiometer FEATURES Two digitally controlled, 256-position potentiometers Serial port provides means for setting and reading both potentiometers Resistors can be connected in series to
DS1868B Dual Digital Potentiometer
www. maximintegrated.com FEATURES Two digitally controlled, 256-position potentiometers Serial port provides means for setting and reading both potentiometers Resistors can be connected in series to provide
ICS LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET
DATASHEET ICS670-02 Description The ICS670-02 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT s proprietary analog/digital Phase Locked Loop (PLL) techniques. Part of IDT
EVALUATION KIT AVAILABLE GPS/GNSS Low-Noise Amplifier. Pin Configuration/Functional Diagram/Typical Application Circuit MAX2659 BIAS
19-797; Rev 4; 8/11 EVALUATION KIT AVAILABLE GPS/GNSS Low-Noise Amplifier General Description The high-gain, low-noise amplifier (LNA) is designed for GPS, Galileo, and GLONASS applications. Designed in
ICS HDTV AUDIO/VIDEO CLOCK SOURCE. Features. Description. Block Diagram DATASHEET
DATASHEET ICS662-03 Description The ICS662-03 provides synchronous clock generation for audio sampling clock rates derived from an HDTV stream. The device uses the latest PLL technology to provide superior
DS1302 Trickle-Charge Timekeeping Chip
DS1302 Trickle-Charge Timekeeping Chip wwwmaxim-iccom FEATURES Real-Time Clock Counts Seconds, Minutes, Hours, Date of the Month, Month, Day of the Week, and Year with Leap-Year Compeation Valid Up to
DS in 1 High Speed Silicon Delay Line FEATURES PIN ASSIGNMENT
DS1044 4 in 1 High Speed Silicon Delay Line FEATURES All silicon timing circuit Four independent buffered delays Initial delay tolerance ±1.5 ns Stable and precise over temperature and voltage Leading
Precision, Low-Power, 6-Pin SOT23 Temperature Sensors and Voltage References
19-2457; Rev 2; 11/03 Precision, Low-Power, 6-Pin SOT23 General Description The are precise, low-power analog temperature sensors combined with a precision voltage reference. They are ideal for applications
Dual-Rate Fibre Channel Repeaters
9-292; Rev ; 7/04 Dual-Rate Fibre Channel Repeaters General Description The are dual-rate (.0625Gbps and 2.25Gbps) fibre channel repeaters. They are optimized for use in fibre channel arbitrated loop applications
Dual SPDT Negative Rail Analog Switches with ±VCC Capability
19-4244; Rev 1; 12/8 EVALUATION KIT AVAILABLE Dual SPDT Negative Rail Analog Switches General Description The MAX1454/MAX1455/MAX1455A/MAX1456 dual single-pole/double-throw (SPDT) audio switches feature
2MHz High-Brightness LED Drivers with High-Side Current Sense and 5000:1 Dimming
19-0706; Rev 1; 3/07 EVALUATION KIT AVAILABLE 2MHz High-Brightness LED Drivers with General Description The, step-down constant-current high-brightness LED (HB LED) drivers provide a costeffective solution
VT-802 VT-802. Temperature Compensated Crystal Oscillator. Description
T-802 Temperature Compensated Crystal Oscillator T-802 Description ectron s T-802 Temperature Compensated Crystal Oscillator (TCXO) is a quartz stabilized, CMOS output, analog temperature compensated oscillator,
+2.7V to +5.5V, Low-Power, Triple, Parallel 8-Bit DAC with Rail-to-Rail Voltage Outputs
19-1560; Rev 1; 7/05 +2.7V to +5.5V, Low-Power, Triple, Parallel General Description The parallel-input, voltage-output, triple 8-bit digital-to-analog converter (DAC) operates from a single +2.7V to +5.5V
±80V Fault-Protected, 2Mbps, Low Supply Current CAN Transceiver
19-2425; Rev 0; 4/02 General Description The interfaces between the control area network (CAN) protocol controller and the physical wires of the bus lines in a CAN. It is primarily intended for industrial
Low-Cost, SOT23, Voltage-Output, High-Side Current-Sense Amplifier MAX4173T/F/H
19-13; Rev 5; /11 Low-Cost, SOT23, Voltage-Output, General Description The MAX173 low-cost, precision, high-side currentsense amplifier is available in a tiny SOT23-6 package. It features a voltage output
IF Digitally Controlled Variable-Gain Amplifier
19-2601; Rev 1; 2/04 IF Digitally Controlled Variable-Gain Amplifier General Description The high-performance, digitally controlled variable-gain amplifier is designed for use from 0MHz to 400MHz. The
TOP VIEW COUT1 COM2. Maxim Integrated Products 1
19-77; Rev ; 7/4.75Ω, Dual SPDT Audio Switch with General Description The dual, single-pole/double-throw (SPDT) switch operates from a single +2V to +5.5V supply and features rail-to-rail signal handling.
ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET
DATASHEET ICS180-01 Description The ICS180-01 generates a low EMI output clock from a clock or crystal input. The device uses IDT s proprietary mix of analog and digital Phase Locked Loop (PLL) technology
DS1337 I 2 C Serial Real-Time Clock
DS1337 I 2 C Serial Real-Time Clock www.maxim-ic.com GENERAL DESCRIPTION The DS1337 serial real-time clock is a low-power clock/calendar with two programmable time-of-day alarms and a programmable square-wave
Rail-to-Rail, 200kHz Op Amp with Shutdown in a Tiny, 6-Bump WLP
19-579; Rev ; 12/1 EVALUATION KIT AVAILABLE Rail-to-Rail, 2kHz Op Amp General Description The op amp features a maximized ratio of gain bandwidth (GBW) to supply current and is ideal for battery-powered
ICS LOW EMI CLOCK GENERATOR. Description. Features. Block Diagram DATASHEET
DATASHEET ICS180-51 Description The ICS180-51 generates a low EMI output clock from a clock or crystal input. The device uses IDT s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology
0.8Ω, Low-Voltage, Single-Supply Dual SPST Analog Switches
19-116; Rev ; 1/6.Ω, Low-Voltage, Single-Supply Dual SPST General Description The are low on-resistance, low-voltage, dual single-pole/single-throw (SPST) analog switches that operate from a single +1.6V
Three-Channel, Standard-Definition Video Filters MAX11501/MAX11502
19-32; Rev 1; 4/8 EVALUATION KIT AVAILABLE Three-Channel, General Description The / integrated filters offer three channels of 5th-order filters for standard-definition video and include output buffers
I O 7-BIT POT REGISTER ADDRESS COUNT 7-BIT POT. CODE 64 (40h) DS3503
Rev 1; 3/9 NV, I2C, Stepper Potentiometer General Description The features two synchronized stepping digital potentiometers: one 7-bit potentiometer with RW as its output, and another potentiometer with
PART MAX5166NECM MAX5166MCCM MAX5166LECM MAX5166MECM OUT31 MAX5166 TQFP. Maxim Integrated Products 1
9-456; Rev ; 8/99 32-Channel Sample/Hold Amplifier General Description The MAX566 contains four -to-8 multiplexers and 32 sample/hold amplifiers. The sample/hold amplifiers are organized into four octal
DS1305 Serial Alarm Real-Time Clock
19-5055; Rev 12/09 DS1305 Serial Alarm Real-Time Clock www.maxim-ic.com FEATURES Real-Time Clock (RTC) Counts Seconds, Minutes, Hours, Date of the Month, Month, Day of the Week, and Year with Leap-Year
ICS CLOCK SYNTHESIZER FOR PORTABLE SYSTEMS. Description. Features. Block Diagram PRELIMINARY DATASHEET
PRELIMINARY DATASHEET ICS1493-17 Description The ICS1493-17 is a low-power, low-jitter clock synthesizer designed to replace multiple crystals and oscillators in portable audio/video systems. The device
Low-Cost, Remote Temperature Switch
19-1819; Rev 3; 2/11 Low-Cost, Remote Temperature Switch General Description The is a fully integrated, remote temperature switch that uses an external P-N junction (typically a diode-connected transistor)
PART. FREQUENCY (MHz) MAX2640 MAX C2 RF OUT. 1pF GND. Maxim Integrated Products 1
9-84; Rev ; 4/7 EVALUATION KIT AVAILABLE MHz to 5MHz SiGe General Description The are low-cost, ultra-low-noise amplifiers designed for applications in the cellular, PCS, GPS, and.4ghz ISM frequency bands.
High-Voltage, 350mA, Adjustable Linear High-Brightness LED (HB LED) Driver
19-383; Rev 1; 4/9 High-Voltage, 35mA, Adjustable Linear General Description The current regulator operates from a 6.5V to 4V input voltage range and delivers up to a total of 35mA to one or more strings
Low-Power, Low-Glitch, Octal 12-Bit Voltage- Output DACs with Serial Interface
9-232; Rev 0; 8/0 Low-Power, Low-Glitch, Octal 2-Bit Voltage- Output s with Serial Interface General Description The are 2-bit, eight channel, lowpower, voltage-output, digital-to-analog converters (s)
16-Bit, Single-Channel, Ultra-Low Power, Delta-Sigma ADC with 2-Wire Serial Interface
19-5238; Rev ; 4/1 16-Bit, Single-Channel, Ultra-Low Power, General Description The is an ultra-low-power (< 3FA max active current), high-resolution, serial-output ADC. This device provides the highest
Single LVDS/Anything-to-LVPECL Translator
9-2808; Rev 0; 4/03 Single LVDS/Anything-to-LVPECL Translator General Description The is a fully differential, high-speed, anything-to-lvpecl translator designed for signal rates up to 2GHz. The s extremely
Peak Reducing EMI Solution
Peak Reducing EMI Solution Features Cypress PREMIS family offering enerates an EMI optimized clocking signal at the output Selectable input to output frequency Single 1.% or.% down or center spread output
IDT9170B CLOCK SYNCHRONIZER AND MULTIPLIER. Description. Features. Block Diagram DATASHEET
DATASHEET IDT9170B Description The IDT9170B generates an output clock which is synchronized to a given continuous input clock with zero delay (±1ns at 5 V VDD). Using IDT s proprietary phase-locked loop