OBJECTIVE PAPER-II. Key: (C)

Size: px
Start display at page:

Download "OBJECTIVE PAPER-II. Key: (C)"

Transcription

1 ESE-06 EC Objective Paper-II OBJECTIVE PAPER-II. The closed-loop transfer function of a certain control system is given by C 00 (s). R s 0s 00 Then the settling time for a % tolerance band is given by (A) 0.8 s (B). s (C).5 s (D). s C (s) 00 R s 0s 00 Settling time for % tolerance 4 / 5 t 4 4 / 5 0.8s s. The unit step input response of a certain control system is given by 60t 0t c(t) 0.e.e. The undamped natural frequency n and damping ratio are, respectively (A) 4.5 and.7 (B) 33.5 and.7 (C) 4.5 and.43 (D) 33.5 and.43 The step response c(t) 0.e 60t.e 0t then n and are. c(t) = +0.e 60t.e -0t Impulse response d h(t) c(t) dt dc(t) 60t 0t 0 (0.)( 60)e.( 0)e dt 60 0t h(t) e e Then transfer function 4.49rad / sec n 70 n (4.49) 50 s 0 s 60 s 70s 600 s 70s 600 n In Force-Voltage Analogy (A) Force is analogous to current (B) Mass is analogous to capacitance (C) Velocity is analogous to current (D) Displacement is analogous to magnetic flux linkage In force- voltage analogy Velocity analogous to current 4. For a unity feedback control system having an open-loop transfer function 5 G(s), what is the time t p at which s(s 6) the peak of the step input response occurs? (A) 0.5s (B).75s (C) 0.79s (D).57s 5 G(s) H(s) s(s 6) C.E GH s 6s 5 0 5, 0.6, 4 t p n 0.79sec d 5. The transfer function represents (A) Unstable system (B) Minimum phase system (C) Non-minimum phase system (D) PID controller system d 0(s) G(s) (s0) ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India

2 ESE-06 EC Objective Paper-II 0(s) G(s) (s0) Represents 0 Single right side zero means non-minimum phase 6. What is the maximum input frequency limit of a 3-bit Ripple counter configured around flip-flops, with inherent propagation delay time t pd = 50 ns? (A) 6670 MHz (B) 667 MHz (C) 66.7 MHz (D) 6.67 MHz f clk 9 N.t MHz pd 7. The characteristic equation of a certain feedback control system is given by 4 3 s 4s 3s 36s k 0. The range of values of k for which the feedback system is stable, is given by (A) 0 < k < 4 (B) 4 < k < 36 (C) 0 < k < 36 (D) 3 < k < 36 s 4 +4s 3 +3s +36s+k=0. Then the system is stable for The system is stable, when the first column elements are positive. 36 k k 0 s s s 0 k s 0 0 s 0 3 k k 0 36 k 8. The closed-loop transfer function of a unity feedback control system is, 4 k 0 0 C(s) R(s) s s n n n The velocity error constant of the system is n (A) (B) n n 3n (C) (D) C(s) R(s) s s n n n n G(s) s(s ) The velocity error constant k limsg(s) v v s0 n n lim s0 (s ) k n n n 9. The system described by the following state equations 0 0 X X u, Y [,]X 3 is. Completely controllable. Completely observable Which of the above statements is/are correct? (A) only (B) only (C) Both and (D) Neither nor 0 0 X X U 3 Y [, ] x Q c B AB c AB Qc 3 3 Det Q 0 Controllable 0 CA [ ] 3. n ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India

3 ESE-06 EC Objective Paper-II 0 [ ] Q0 det Q 4 0 Observable k(s ) 0. Consider the system with G(s) s s 3 and H(s) =. The breakaway point(s) of the root loci is/are at (A) 0.65 only (B) only (C) and 0.65 (D) There is no breakaway point k(s ) G(s) s s 3 The Breakaway point of the system is k(s ) s s 3 s, j (s s 3) k s dk ds (s ) (s )(s ) s s 3 dk ds (s ) s s 4s 4 s s 3 s 4s k ' 0 (s ) 5 0 Break points s +4s+=0 s = 0.6 s= 3.73 s = 0.6 is not on root locus therefore it is not valid j j s = 3.73 is break in point where the Root locus branches are coming from complex plane to real axis. Therefore there are no break away points in the system.. How would a binary number 000 be represented by a 4-bit binary word, if the range of voltage is 0 to 0 V? (A) V (B).333 V (C) V (D).000 V Full scale voltage =0 V Full Scale output 0 0 Resolution n 4 5 Voltage for binary number (000) =.333V 3. For a unity feedback system with open-loop 5 transfer function, the resonant peak s(s 6) output M m and the corresponding resonant frequency m, are respectively (A).6 and.64 rad/sec (B).04 and.64 rad/sec (C).6 and 4.8 rad/sec (D).04 and 4.8 rad/sec 5 G(s) s(s 6) C(s) 5 R(s) s 6s 5 5 n 6 n Mm (0.6) (0.6) 0.64 ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 3

4 ESE-06 EC Objective Paper-II m n 5 (0.6).645 rad / sec 3. The transfer function of a control system is said to be All Pass System, if it has (A) Unit magnitude at all frequencies with anti-symmetric pole-zero pattern (B) Unit magnitude at all frequencies with symmetric pole-zero pattern (C) Magnitude varying with frequency and with anti-symmetric pole-zero pattern (D) Unit magnitude at some frequencies with symmetric pole-zero pattern 6. Consider the transfer function: G(s) 5 s 0s 00 s (s 5s) The corner frequencies in Bode s plot for this transfer function are as (A) 0 rad/sec and 0 rad/sec (B) 00 rad/sec and 0 rad/sec (C) 0 rad/sec and rad/sec (D) 00 rad/sec and rad/sec G(s) 5 s 0s 00 s (s 5s) The corner frequencies of Bode plot n = 0, 0 rad/sec, rad/sec Pole zero pattern is anti-symmetric about imaginary axis. 4. Consider the following:. Bode plot. Nyquist plot 3. Nichols chart Which of the above frequency response plots are commonly employed in the analysis of control systems? (A) and only (B) and 3 only (C) and 3 only (D), and 3 5. An A-to-D converter in which one subcircuit is a D-to-A converter is (A) Parallel A/D converter (B) Dual slope A/D converter (C) Successive approximation A/D converter (D) Extended parallel type A/D converter 7. Consider the transfer function ( s) for a PD controller. What is the frequency at which the magnitude is 0 db (by using asymptotic Bode s plot)? (A) 000 r/s (B) 000 r/s (C) 00 r/s (D) 00 r/s G(s) = (0.+0.0s) The frequency at which the magnitude is 0dB G(s) = 0. [+0.s] Asymptotic magnitude M asy = 0log [0.] + 0log [0. ] = 0 0log[0. ] rad / sec 8. The main objectives of drawing the root locus plot are. To obtain a clear picture of the open-loop poles and zeros of the system. To obtain a clear picture of the transient response of the system for varying gain, K ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 4

5 ESE-06 EC Objective Paper-II 3. To find the range of K to make the system stable Which of the above statements are correct? (A), and 3 (B) and only (C) and 3 only (D) and 3 only Root locus main objectives. The open-loop poles zeros location is known with simple s-plane. The Root locus will give clear picture of closed loop-poles movement.. To obtain clear picture of transient response of the system with gain K. 3. To find the range of K to make the system stable. 9. A unity feedback system has open-lop poles at s = j, s = and s = 0 and a zero at s = 3. What are the angles made by the rootloci asymptotes with the real axis? (A) 60, 80 o and 60 o (B) 30 o, 90 o and 60 o (C) 60 o, 0 o and 30 o (D) 30 o, 60 o and 80 o s = j s = s = 0 are poles of the system s = 3 is zero of the system. The asymptotes are p =4 number of poles z = number of zeros p z = 3 o (q)80, q 0,,... p z p z Asymptotes are = 60, 80, The open-loop transfer function of a unity K feedback system is G(s). The gain s(s 5) K that results in a phase margin of 45 o is (A) 35 (B) 30 (C) 5 (D) 0 The K value such that phase margin is = 45 Phase margin pm 80 ( ) 45 o pm sys gc ( ) 35 pm gc o sys ( ) 90 tan o gc sys ( gc) 90 tan gc Magnitude gc o gc o 5 5 o gc o 90 tan K M 5 K M( gc) 5 K From the Nichols chart, one can determine the following quantities pertaining to a closed-loop system: (A) Magnitude, bandwidth and phase (B) Bandwidth and phase only (C) Magnitude and phase only (D) Bandwidth only Nichols chart is used for finding the magnitude, phase and BW. In position control systems, the Tachogenerator feedback is used to (A) Increase the effective damping in the system (B) Decrease the effective damping in the system (C) Decrease the Steady state error (D) Increase the steady state error ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 5

6 ESE-06 EC Objective Paper-II Tacho-generator feedback is example for D controller. Derivative controller reduces ripples in the response i.e., maximum peak over shoot reduces. effective damping increases 3. Consider the following statements:. The pin diode consists of two narrow, but highly doped, semiconductor regions separated by a thicker, lightly doped material called the intrinsic region.. Silicon is used most often for its power handling capability and because it provides a highly resistive intrinsic region. 3. The pin diode acts as an ordinary diode at frequencies above 00 MHz. Which of the above statements are correct? (A) and only (B) and 3 only (C) and 3 only (D), and 3 The pin diode acts as an ordinary diode at frequencies up to about 00MHz, but above this frequency the operational characteristics changes and begins acting as a variable resistance. 4. Consider the following statements:. Additional cavities serve to velocity modulate the electron beam and produce an increase in the energy available at the output.. The addition of intermediate cavities between the input and output cavities of the basic klystron greatly improves the amplification, power output, and efficiency of the klystron. Which of the above statements is/are correct? (A) only (B) only (C) Both and (D) neither nor 5. In a waveguide with perfectly conducting flat wall, the angle of reflection is equal to the angle of (A) Diffraction (B) Incidence (C) Refraction (D) Penetration In a waveguide with perfectly conducting flat wall, the angle of reflection is equal to the angle of incidence. 6. In microwave system, waveguides have the advantages of (A) High power-handling capability and low loss (B) Thin dielectric substrate (C) Low power-handling and adequate stability (D) Positive phase shift 7. A straight dipole radiator fed in the centre will produce maximum radiation at. The plane parallel to its axis. The plane normal to its axis 3. Extreme ends Which of the above statements is/are correct? (A) only (B) only (C) and 3 only (D) and 3 only 8. In communication systems, modulation is the process of (A) Improving frequency stability of transmitter (B) Combining message signal and radio frequency waves ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 6

7 ESE-06 EC Objective Paper-II (C) Generating constant frequency radio waves (D) Reducing distortion in RF waves Modulation is a process of changing the characteristic of carrier signal (radio frequency) with respect to message signal. 9. Which one of the following statements is correct? (A) Sampling and quantization operate in amplitude domain (B) Sampling and quantization operate in time domain. (C) Sampling operates in time domain and quantization operates in amplitude domain. (D) Sampling operates in amplitude domain and quantization operates in time domain. Sampling discretize the time axis. Quantization discretize the amplitude axis. 30. What is the voltage attenuation provided by a 5 cm length of waveguide having a = cm and b = 0.5 cm in which a GHz signal is propagated in the dominant mode? (A) 7 db (B) 68 db (C) 5 db (D) 48 db Given a = cm; b = 0.5cm l c 5cm 5 0 m a cm 0 m Attenuation db 68.5dB 3. When a plane wave travelling in free-space is incident normally on a medium having C r = 9.0 and r =.0, the fraction of power transmitted into the medium is (A) 4 3 (B) 3 4 (C) 3 3 Fraction of transmitted power (D) 3 3. A microwave antenna with the absorbing cross-section area (A) and the power flux density (S) in the incident wave is employed as an absorber. The absorbed power (P) of the antenna is (A) A (B) S (C) SA (D) S S A A 33. LASER beam of light essentially finds its application in transmission of a signal in the optical fiber communication systems due to (A) Incredible speed of signal communication (B) Low loss transmission of the signal (C) Inexpensive installation cost (D) Bulk availability of LASER sources Key: (A & B) 34. The controller which is highly sensitive to noise is (A) PI (B) PD (C) Both PI and PD (D) Neither PI nor PD PD controller is very sensitive to noise 35. The s complement representation of 7 is (A) 0000 (B) 0 (C) 00 (D) 00 ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 7

8 ESE-06 EC Objective Paper-II 7 = s comp of (+7) = ( st complement +) = s comp of (0000) = The subtraction of two hexadecimal numbers 84 6 A 6 results in (A) B 6 (B) 3A 6 (C) 4B 6 (D) 5A A 6 = 5A 6 (84) (3) 6 0 (A) (4) 6 0 (5A) (90) The Vestigial Side Band (VSB) modulation is preferred in TV systems because. It reduces the bandwidth requirement to half. It avoids phase distortion at low frequencies Which of the above statements is/are correct? (A) only (B) only (C) Both and (D) Neither nor Bandwidth in VSB is.5b, where B is message signal bandwidth. Phase distortion are reduced at low frequency. 38. If, A = 60 and B = 3, then using C- programming A >> B results in (A) (B) (C) 00 (D) 0000 We have to do the right shifting of binary equivalent of 60by 3 bit positions. 0000>> What is the base of the numbers for the following operation to be correct? (54) (4) ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India b b (3) b (A) (B) 4 (C) 8 (D) 6 54b 3b 4 b (5b 4) (b 3)4 5b 4 4b b It is awkward to employ signed-magnitude system in computer arithmetic, because. Sign and magnitude have to be handled separately. It has two representations for 0 Which of the above statements is/are correct? (A) only (B) only (C) Both and (D) Neither nor Statement is correct. The signed magnitude system is used in ordinary arithmetic but is awkward when employed in computer arithmetic. Therefore, the signed complement is normally used. The s complement imposes difficulties because it has representations of 0 (+0 to -0) 4. A single-stage amplifier has a voltage gain of 00. The load connected to the collector is 500 and its input impedance is k. Two such stages are connected in cascade through an R-C coupling. The overall gain is (A) 0000 (B) (C) 5000 (D) IN V Rin gmv Rout R V in gmv STAGE I STAGE II 8 Rout OUT

9 ESE-06 EC Objective Paper-II R k, R 500 IN g R m OUT OUT 00(Given) 00 gm 0.s 500 Overall gain g R R.g R m OUT IN m OUT Assuming V CE(Sat) = 0.3V for a Silicon transistor at ambient temperature of 5C and h FE = 50, the minimum base current I B required to drive the transistor into saturation for the circuit shown is 5V I B (A) 64 A (B) 78 A (C) 94 A (D) 40 A Step: () KVL for output section of the circuit 5V VCE 5V 0.3V sat Ic 4.7mA sat k k ICsat Q k 5V k Step: () Minimum Base current required to drive the BJT into saturation, I Bmin IC I sat C 4.7mA sat IBmin 94A h 50 FE 43. Which of the following regions of operation are mainly responsible for heating of the transistor under switching operation?. Saturation region. Cut-off region 3. Transition from saturation to cut-off 4. Transition from cut-off to saturation Select the correct answer using the codes given below (A),, and 4 only (B), 3, and 4 only (C) and 3 only (D) and 3 only The heating of a transistor under switching operation occurs during Transition from saturation to cut-off Transition from cut-off to saturation Saturation region 44. In a sinusoidal oscillator, sustained oscillations will be produced only if the loop gain (at the oscillation frequency) is (A) Less than unity but not zero (B) zero (C) Unity (D) Greater than unity The condition for sustained oscillation in a sinusoidal oscillator at a particular frequency is A v = Loop gain = (Bark hausen criteria) I B Q V CE sat 45. The Class-B push-pull amplifier is an efficient two-transistor circuit, in which the two transistors operate in the following way: ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 9

10 ESE-06 EC Objective Paper-II (A) Both transistors operate in the active region throughout the negative ac cycle (B) Both transistors operate in the active region for more than half-cycle but less than a whole cycle (C) One transistor conducts during the positive half-cycle and the other during the negative half-cycle (D) Full supply voltage appears across each of the transistors In a class-b push-pull amplifier, the conduction angle of each transistor is 80 o (i.e.) Each transistor is biased to conduct for ONE-HALF CYCLE OF INPUT SIGNAL only. In other words, During +Ve half cycle of input signal, One transistor (Let Q ) is pulled into ON state and the other transistor (Let Q ) is pushed into OFF state. During Ve half-cycle of input, Q is pulled into ON state and Q is pushed into OFF state. 46. Consider the following statements regarding Wien Bridge oscillator:. It has a larger bandwidth than the phase shift oscillator.. It has a smaller bandwidth than the phase shift oscillator. 3. It has capacitors while the phase shift oscillator has 3 capacitors. 4. It has 3 capacitors while the phase shift oscillator has capacitors. Which of the above statements are correct? (A) and 3 only (B) and 4 only (C) and 4 only (D) and 3 only RC Phase shift Oscillator Suitable for oscillations in Audio frequency (AF) range, preferably upto khz. Three identical RC sections are to be used in the phase shift network to construct a practical RC Phase shift oscillator. Wien Bridge Oscillator Suitable for Oscillations in AF range up to 00kHz. Two RC sections (One series RC & one parallel RC) are used in the feedback network 47. For normal operation of a transistor (A) Forward bias the emitter diode and reverse bias the collector diode (B) Forward bias the emitter diode as well as the collector diode (C) Reverse bias the emitter diode as well as the collector diode (D) Reverse bias the emitter diode and forward bias the collector diode Normal operation of a transistor is ACTIVE REGION of operation Emitter Diode/ Emitter junction, J E Collector Diode/ Collector junction Region of operation R.B R.B Cut-off Region F.B F.B Saturation Region F.B R.B Normal active region R.B F.B Inverse (or) Reverse Active Region 48. Consider the following statements regarding linear power supply:. It requires low frequency transformer.. It requires high frequency transformer. ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 0

11 ESE-06 EC Objective Paper-II 3. The transistor works in active region. Which of the above statements is/are correct? (A) only (B) and 3 only (C) and 3 only (D) 3 only The Requirements of Linear Power supply:. As the input signal or line voltage frequency is very low, to handle this, a low frequency transformer is required.. As the transistor is a control element in linear voltage regulator, it must be operated in active region, so that the load current (or Emitter current) is controlled as per the requirements. 49. The capacitance of a full wave rectifier, with 60Hz input signal, peak output voltage V p = 0V, load resistance R =0 k and input ripple voltage V r = 0.V, is (A).7 F (B) 33.3 F (C) 4.7 F (D) 83.4 F The general formula for ripple voltage V ripple in FWR with capacitor filter is Vp V ripple ; fcr Vp C frv ripple 0V 4.66F 3 60Hz 00 0.V 50. A full wave rectifier connected to the output terminals of the mains transformer produces an RMS voltage of 8 V across the secondary. The no-load voltage across the secondary of the transformer is (A).6V (B) 6.V (C) 6.V (D) 6.V Note: The question should have been The no-load DC voltage across the output of the rectifier is Full wave rectifier Step() : V m rms Vm 8V V 8V V Step() : No V m load voltage VDC V 6.39V 5. An op-amp can be connected to provide. Voltage controlled current source. Current controlled voltage source 3. Current controlled current source Which of the above statements are correct? (A) and only (B) and 3 only (C) and 3 only (D), and 3 An Op-amp can be connected to provide. Voltage controlled voltage source (VCVS), whose output voltage V 0 is controlled by the input voltage Vi. Current controlled current source (CCCS), whose output current I 0 is controlled by the input current I i 3. Voltage controlled current source (VCCS), whose output current I 0 is controlled by the input voltage V i. 4. Current controlled voltage source (CCVS), whose output voltage V 0 is controlled by the input current I i. 5. In an Op-Amp, if the feedback voltage is reduced by connecting a voltage divider at the output, which of the following will happen?. Input impedance increases. Output impedance reduces 3. Overall gain increases Which of the above statements is/are correct? (A) only (B) only (C) 3 only (D), and 3 ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India

12 ESE-06 EC Objective Paper-II If Feedback factor () is reduced Vf V A CL INCL OUTCL o A Increases A R R ( A ) Decreases R IN R OUT Increases A 53. The transient response rise time (unity gain) of an Op-Amp is 0.05 s. The small signal bandwidth is (A) 7 khz (B) 0 khz (C) 7 MHz (D) 0 MHz Rise time of an op-amp, t r = 0.05sec Small-signal band width can be related to t r using the relation 0.35 tr BW BW 7MHz 6 t r 54. A negative feedback of = is applied to an amplifier of open-loop gain 000. What is the change in overall gain of the feedback amplifier, if the gain of the internal amplifier is reduced by 0%? (A) 95.7 (B) 86.7 (C) 75.7 (D) A 000, Step () A 000 Af A Step: () Gain of internal amplifier is reduced by 0% 0% of i.e., A New Af New If the quality factor of a single-stage single tuned amplifier is doubled, the bandwidth will (A) Remain the same (B) Become half (C) Become double (D) Become four times Quality factor Q BW If Q is doubled Bandwidth will become half 56. Consider the following statements related to oscillator circuits:. The tank circuit of a Hartley oscillator is make up of a tapped capacitor and a common inductor.. The tank circuit of a Colpitts oscillator is made up of a tapped capacitor and a common inductor. 3. The Wien Bridge oscillator is essentially a two-stage amplifier with an RC bridge in the first stage, and, the second stage serving as an inverter. 4. Crystal oscillators are fixed frequency oscillators with a high Q-factor. Which of the above statements are correct? (A), and 3 only (B), 3 and 4 only (C), and 4 only (D), 3 and 4 only Hartely Oscillator used as a tapped inductor 57. The most commonly used transistor configuration for use as a switching devices is (A) Common-base configuration (B) Common-collector configuration (C) Collector-emitter shorted configuration (D) Common-emitter configuration f 0 ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India

13 ESE-06 EC Objective Paper-II CB configuration. Current amplifier. Used as current Buffer 3. Current controlled current source CC configuration. Voltage amplifier. Used as voltage Buffer 3. Voltage controlled voltage source CE configuration General purpose configuration used in. Amplifier circuits. Switching circuits 58. The value of h FE (the hybrid parameters) of a Common-Emitter (CE) connection of a Bipolar Junction Transistor (BJT) is given as 50. What is the value of dc (ratio of collector current to emitter current), for this BJT? (A) (B) (C) (D) The current amplification factor of a BJT in CE configuration IC hfe 50 I B I 50 C DC IE For realizing a binary half-subtractor having two inputs A and B, the correct set of logical expressions for the outputs D (A minus B) and X(borrow) are. The difference output D AB AB. The borrow output B AB Which of the above statements is/are correct? (A) only (B) only (C) Both and (D) Neither nor D Difference AB AB B Borrow AB 60. The simplified form of the Boolean expression AB + A(B + C) + B(B + C) is given by (A) AB + AC (B) B + AC (C) BC + AC (D) AB + C F = AB +AB + AC +B +BC = B (A + A + + C) +AC A = B + AC 6. Consider the following statements: Pointers in C-programming are useful to. Handle the data tables efficiently. Reduce the length of a program 3. Reduce the complexity of a program Which of the above statements are correct? (A) and only (B), and 3 (C) and 3 only (D) and 3 only With the help of pointer concept only. We can pass all the elements of the array just by passing the base address. 6. Data transfer between the main memory and the CPU register takes place through two registers, namely, (A) General purpose register and MDR (B) Accumulator and Program counter (C) MAR and MDR (D) MAR and Accumulator MAR Memory Address Register The MAR holds the address of the location to be accessed. MDR Memory Data Register The MDR contains the data to be written into or read out of the addressed location. ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 3

14 ESE-06 EC Objective Paper-II 63. In a binary tree, the number of internal nodes of degree is 3, and the number of internal nodes of degree is 6. The number of leaf nodes in the binary tree is (A) 7 (B) 8 (C) 9 (D) 0 I = 3, I = 6, E = 5 node = 6 Number of edges = () 6 + () 3 = 5 nodes = 5 + = 6 L L I I I I I I I The number of leaf nodes s = 6 (6+3) = Consider the following:. Operation code. Source operand reference 3. Result operand reference 4. Next instruction reference Which of the above are typical elements of machine instructions? (A), and 3 only (B), and 4 only (C) 3 and 4 only (D),, 3 and 4 Typical elements of machine instructions are. Operation code (Op-code). Source operand reference 3. Result operand reference 65. Which addressing mode helps to access table data in memory efficiently? I L3 L 4 L5 L6 I L 7 (A) Indirect mode (B) Immediate mode (C) Auto-increment or Auto-decrement mode (D) Index mode Index addressing mode helps to access table data in memory efficiently 66. Converting an analog signal to digital signal is done by Sampling and (A) Companding (B) Mixing (C) Quantizing (D) Pre-emphasis Total Data rate = N.r b N = number of users r b = Bit rate Total data rate 43kbps kbps Bit duration = 3 0 For one frame 4 bits are included. Thus time duration for one frame= msec A computer employs RAM chips of 56 bytes and ROM chips of 04 bytes. If the computer system needs kb of RAM and kb of ROM, then how many address lines are required to access the memory? (A) 0 (B) (C) (D) 3 As per question, computer system needs kb of RAM and kb ROM which means that computer system needs kb, (RAM size+ ROM size) of total memory. kb lines =. Hence option B is correct answer. 0. B. B so, number of address 68. A computer system has a cache with access time 0 ns, a hit ratio of 80% and average ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 4

15 ESE-06 EC Objective Paper-II memory access time is 0 ns. Then what is the access time for physical memory? (A) 50 ns (B) 40 ns (C) 30 ns (D) 0 ns Given data T 0ns, H 80% C T 0ns, T? avg M T H T H T T avg C C M 0 (0.8)(0) (0.) 0 T (0.)TM T T M 0 0.TM 0 TM 50ns In synchronous TDM, there are four inputs and data rate of each input connection is 3 kbps. If bit at a time is multiplexed, what is the duration of each frame? (A) 0.0 ms (B) 0.03 ms (C) 0.33 ms (D) 0. ms Synchronous TDM, No. of Inputs = N = 4 Data rate of each input connection = 3 kbps = n f s Data rate of TDM system (in the channel) = N.n f s = 4 3k r b = kbps Each bit duration = T b r k sec b M M bit at a time is multiplexed. Collection of each sample from all signals constitutes a frame. Since bit at a time is multiplexing one frame contains 4 bits. Input signals are4 Frame duration 4bits duration 4T b msec k 70. Consider the following statements comparing Static RAM with Dynamic RAM:. In Static RAM typical cell requires more number of transistors than the Dynamic RAM.. Power consumption per bit of Static RAM is less than that of Dynamic RAM. 3. Dynamic RAM is less expensive than the Static RAM. Which of the above statements are CORRECT? (A), and 3 (B) and only (C) and 3 only (D) and 3 only In Static RAM typical cell requires more number of transistors than the Dynamic RAM. Dynamic RAM is less expensive than the Static RAM. SRAM Consumes more power. m t r b m m3 m4 t t t r b r b r b 3k decommutator channel 7. An addressing mode in which the location of the data is contained within the mnemonic, is known as (A) Immediate addressing mode (B) Implied addressing mode (C) Register addressing mode (D) Direct addressing mode ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 5

16 ESE-06 EC Objective Paper-II An addressing mode in which the location of the data is contained within the mnemonic, is known as Direct addressing mode. 7. A processor has 3-bit architecture. Each instruction is word long (3 bits). It has 64 registers. It supports 50 instructions, which have register operands + immediate operand. Assuming that the immediate operand is an unsigned integer, what is its maximum value? (A) 6383 (B) 3767 (C) (D) 04 3 bit Opcode Rs Rd Operand log 50 log 64 log With 4 bit, the Highest unsigned integer is Microwave resonators are used in. Microwave oscillators. Microwave narrow band amplifiers 3. Microwave frequency meters Which of the above are correct? (A) and only (B) and 3 only (C) and 3 only (D), and The serial connection of interrupt lines for establishing hardware priority is known as (A) Daisy Chaining Priority (B) Parallel Priority (C) Polling (D) Serial-line Priority The Daisy Chaining method of establishing priority consists of a serial connection of all devices that request an interrupt. The device with the highest priority is placed in the first position, followed by lower priority devices upto the device with the lowest priority, which is placed last in the chain. Directions: Each of the next six (6) items consist of two statements, one labeled as the Statement (I) and the other as Statement (II). Examine these two statements carefully and select the answer to these items using the codes given below: Codes: (A) Both statement (I) and statement (II) are individually true and statement (II) is the correct explanation of statement (I). (B) Both statement (I) and statement (II) are individually true and statement (II) is not the correct explanation of statement (I) (C) Statement (I) is true but Statement (II) is false. (D) Statement (I) is false but statement (II) is true 75. Statement (I): PAM can be demodulated using a suitable integrator. Statement (II): A suitable integrator practically acts as can an envelop detector. 76. Statement (I): The direction flag D in 8086 selects increment or decrement mode for DI and/or SI registers. Statement (II): If D = 0, the register are automatically decremented. 77. Statement (I): An antenna of length will have radiation patterns of two lobes. ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 6

17 ESE-06 EC Objective Paper-II Statement (II): An antenna of length 3 will have radiation pattern of two lobes and two minor lobes. n cos null H () H 4 Cos 4n null For n 0 Cos null null 0, z null 3 3 () H 4 4n Cosnull 3 For n=0 cos null null 0, For n cosnull 3 null cos null, ,09.4 z null Radiation pattern Radiation pattern 78. Statement (I): The complex conjugate poles and zeros of the open-loop transfer function have no effect on the root-loci on the real axis. Statement (II): Angle contribution of such a pair of conjugate poles or zeros is radians on the real axis 79. Statement (I): A basic memory unit of a flip-flop is a bistable multivibrator. Statement (II): A flip-flop has two stable states. It remains in one state until it is directed by an input signal to switch over. 80. Statement (I): Multimode fibers are now used for long distance communication. Statement (II): Multimode fibers have larger core-radius than single-mode fibers. 8. Product of Max terms representation for the Boolean function F BD AD BD is (A) M(,3,5,7) (B) M(0,,4,6) (C) M(0,,,3) (D) M(4,5,6,7) Convert SOP to POS form F(A,B,D) BD AD BD BD A A AD B B BD A A ABD ABD ABD ABD ABD ABD m(,3,5, 7) F M(0,,4,6) 8. Simplified form of the Boolean expression Y A.B CA B C is (A) AC AC BC BC (B) A B CA B C ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 7

18 (C) A BA C (D) A(B C) Y A.B CA B C AB CA.B C AA 0, A B A.B ABC ABC ABC.A.B.C A B CA B C 83. What is the maximum frequency for a sine wave output voltage of 0V peak with an Op-Amp whose slew rate is V/s? (A) 5.9 khz (B) 9.73 khz (C) 3.54 khz (D) 7.36 khz Slew rate of op-amp = V/sec =0 6 V/sec & V m = 0V We have slew rate = V m.fm The maximum frequency upto which the op-amp can provide undistorted output, f max 6 slew rate kHz V 0V m 84. Which one of the following statements is correct? (A) TTL logic cannot be used un digital circuits (B) Digital circuits are linear circuits (C) AND gate is a logic circuit whose output is equal to its highest input. (D) In a four-input AND circuits, all inputs must be high for the output to be high. 85. The Slew rate is the rate of change of output voltage of an operational amplifier when a particular input is applied. What is that input? ESE-06 EC Objective Paper-II (A) Sine wave input (B) Ramp input (C) Pulse input (D) Step input Slew rate is defined as the maximum rate of change in the output voltage of an op-amp caused by step input voltage Slew rate () V i V 0 V i Slope slew rate V 0 V Except at high frequencies of switching, nearly all the power dissipated in the switch mode operation of a BJT occurs, when the transistor is in the (A) Active region (B) Blocking state (C) Hard saturation region (D) Soft saturation region t t V 0 t ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 8

19 ESE-06 EC Objective Paper-II Switches are designed to operate in either cut-off or hard-saturation. No power dissipation in cut-off. 87. Consider the following statements with respect to combinational circuit:. The output at any time depends only on the present combination of inputs.. It does not employ storage elements 3. It performs an operation that can be specified logically by a set of Boolean functions. Which of the above statements are correct? (A) and only (B) and 3 only (C) and 3 only (D), and Consider the following statements: A multiplexer. selects one of the several inputs and transmit it to a single output.. routes the data from a single input to one of many outputs. 3. converts parallel data into serial data 4. is a combinational circuit Which of the above statements are correct? (A) and 3 only (B) and 4 only (C), 3 and 4 only (D),3 and 4 only 89. What are the two types of basic adder circuits? (A) Half adder and full adder (B) Half adder and parallel adder (C) Asynchronous adder and synchronous adder (D) One s complement adder and two s complement adder 90. Consider the following statements:. An 8-input MUX can be used to implement any 4 variable functions.. A 3-line to 8-line DEMUX can be used to implement any 4 variable functions. 3. A 64-input MUX can be built using nine 8-input MUXs. 4. A 6-line to 64-line DEMUX can be built using nine 3-line to 8-line DEMUXs. Which of the above statements are correct? (A),, 3 and 4 (B), and 4 only (C)3 and 4 only (D), and 3 only 9. For an n-bit binary adder, what is the number of gates through which a carry has to propagate input to output? (A) n (B) n (C) n (D) n+ 9. The main disadvantage of DTL logic circuits is (A) Medium speed (B) Very large power supply voltage (C) High cost (D) Very large gate propagation delay. 93. Which one of the following statements best describes the operation of a negative-edge triggered D flip-flop? (A) The logic level at the D input is transferred to Q on NGT of CLK (B) The Q output is always identical to the CLK input if the D input is high (C) The Q output is always identical to the D input when CLK = PGT (D) The Q output is always identical to the D input. 94. A 3-bit ripple counter is constructed using three T flip-flops to do the binary counting. The three flip-flops have T-inputs fixed at ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 9

20 ESE-06 EC Objective Paper-II (A) 0, 0 and (B), 0 and (C) 0, and (D), and In ripple counter, whether up-counter or down counter all T-flip flop are operated in toggle mode. 95. What is the function Y A BC in Product-of Sums (POS) form? (A) M6M5M4M 3 (B) M3MMM 0 (C) M0MM 3 (D) M4M3MM Convert SOP to POS form Y ABC A B B C C BC A A ABC ABC ABC ABC ABC ABC M(0,,3) 96. The initial content of a four-bit shift register is 000. What is the register content after it is shifted four times to the right, with the serial input being 00? (A) (B) 00 (C) 000 (D) 00 Clk Serial I P Q3 Q Q Q When a large number of analog signals is to be converted to digital form, an analog multiplexer is used. The A-to-D converter most suitable in this case will be (A) Forward counter type (B) Up-down counter type (C) Successive approximation type (D) Dual slope type 98. For Emitter-coupled logic (ECL), the switching speed is very high because (A) Negative logic is used (B) The transistors are not saturated when they are conducting (C) Multi-emitter transistors are used (D) Of low fan-out 99. A flip-flop is a (A) Combinational logic circuit and edge sensitive (B) Sequential logic circuit and edge sensitive (C) Combinational logic circuit and level sensitive (D) Sequential logic circuit and level sensitive 00. The transfer function will have s (A) dc gain and high frequency gain (B) dc gain 0 and high frequency gain (C) dc gain and high frequency gain 0 (D) dc gain 0 and high frequency gain G(s) s M ( ) 0 M M 0 0. Consider the following statements: The Gain margin and phase margin of an unstable minimum phase system may respectively be ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 0

21 ESE-06 EC Objective Paper-II. Positive, negative. Negative, positive 3. Negative, negative Which of the statements is/are correct? (A) 3 only (B) and only (C) and 3 only (D), and 3 Gain margin and phase margin for unstable system GM vedb db PM(deg rees) ve 0. A phase lead compensator has its transfer 0.5s function, G c(s). The maximum 0.05s phase lead and the corresponding frequency, respectively are nearly (A) sin (0.9) and 6r/s (B) sin (0.8) and 4 r/s (C) sin (0.9) and 4 r/s (D) sin (0.8) and 6 r/s 0.5s G(s) 0.5s s 0.5s s 0.05s m 6.3rad / s m sin sin [0.8] 03. Consider the following statements:. Lead compensation decreases the bandwidth of the system.. Lag compensation increases the bandwidth of the system Which of the above statement is/are correct? (A) only (B) only (C) Both and (D) Neither nor Lead compensator, Bandwidth increases Lag compensator, Bandwidth decreases 04. A proportional controller with transfer function, K P is used with a first-order system having its transfer function as K G(s), in unity feedback structure. ( s ) For step inputs, an increase in K P will (A) Increase the time constant and decrease the steady state error (B) Decrease the time constant of CLTF and decrease the steady state error (C) Decrease the time constant of CLTF and increase the steady state error (D) Increase the time constant and increase the steady state error kk p OLTF ( s ) RS OLTF p ss p k limoltf k k e k s0 ss p CLTF p k k e kk p CLTF s k k k k k CLTF p k p p p Gs k k p Cs ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India

22 ESE-06 EC Objective Paper-II 05. For a second-order differential equation, if the damping ratio is unity, then (A) Then poles are imaginary and complex conjugate (B) The poles are in the right half of s-plane (C) The poles are equal, negative and real (D) Both the poles are unequal, negative and real, C R s s n n n n The poles are equal, real and Ve 06. Consider the following statements associated with micro strip patch antenna:. The micro strip patch behaves more like a leaky cavity rather than like a radiator and this is not a highly efficient antenna.. They can be adapted for radiation of circularly polarized waves. Which of the above statement is/true correct? (A) only (B) only (C) Both and (D) Neither nor 07. A carrier waveform 0 cos c t and modulating signal 3 cos m t have f c = 00kHz and f m = 4kHz. Given that sensitivity of FM is 4 khz/v and FM spectra beyond J 6 is negligible, what are the channel bandwidth requirements for AM and FM, respectively? (A) khz and 48 khz (B) 8 khz and 48 khz (C) khz and 54 khz (D) 8 khz and 4 khz AM Bandwidth B 4kHz 8kHz ( B is message signal bandwidth) For FM Total frequency spread is from fc 6fm to fc 6fm Total Bandwidth f m 4 48kHz 08. When the modulating frequency is doubled, the modulation index is halved, and the modulating voltage remains constant. The modulation system is. Amplitude modulation. Phase modulation 3. Frequency modulation Select the correct answer from the codes given below: (A) only (B) only (C) 3 only (D), and 3 f Modulation index f f k A f ka f f m m m if f m is double, is This is a case of FM. 09. What is the modulation index of an FM signal having a carrier swing of 00kHz and modulating frequency of 8kHz? (A) 4.75 (B) 5.50 (C) 6.5 (D) 7.50 Total carrier swing f f 00kHz f 50kHz f 50kHz 6.5 f 8kHz m m ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India

23 ESE-06 EC Objective Paper-II 0. In a pulse code modulated system, the number of bits is increased from 7 to 8 bits. The improvement in signal to quantization noise ratio will be (A) db (B) 4dB (C) 6dB (D) 8dB SNR q 6n db n is number of bits Thus bit change SNR change is 6dB.. In the process of modulation (A) Some characteristics of a high frequency sine wave varied in accordance with the instantaneous value of a low frequency signal (B) Parameters of carrier wave are held constant (C) For proper and efficient radiation, the receiving antennas should have heights comparable to half-wavelength of the signal received (D) The signal is converted first within the range of 0 Hz to 0Hz. If the sampling is carried out at a rate higher than twice the highest frequency of the original signal (f max ), then it is possible to receive the original signal from the sampled signal by passing it through (A) A high-pass filter with the cut-off frequency equal to f max (B) A low-pass filter with the cut-off frequency equal to f max (C) A high-pass filter with the cut-off frequency greater than f max (D) A low-pass filter with the cut-off frequency greater than f max 3. The open-loop transfer function of a unity 0( 0.s) feedback system is G(s). The ( 0.5s) phase shift at = 0 and =, will be respectively (A) 90 o and 80 o (B) 0 o and 80 o (C) 90 o and 90 o (D) 0 o and 0 o 0( 0.s) G(s) ( 0.5s) The phase shift at 0 and sys ( ) Tan [0.5 ] Tan [0. ] 0 ; 0 ; 0 4. The conversion time for a 0-bit successive approximation A/D converter, for a clock frequency of MHz is (A) s (B) 5s (C) 0s (D) 5s T sec f MHz 5. The minimum bandwidth of the link needed for a guard band of 0 khz frequency to prevent interference between six channels, each with 00kHz frequency, is (A) 45kHz (B) 575 khz (C) 650 khz (D) 75 khz Total bandwidth = = 650kHz ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 3

24 ESE-06 EC Objective Paper-II 6. The different access methods which permit many satellite users to operate in parallel through a single transponder without interfering with each other are. Frequency Division Multiple Access (FDMA). Time Division Multiple Access (TDMA) 3. Code Division Multiple Access (CDMA) Which of the above are correct? (A) and only (B) and 3 only (C) and 3 only (D), and 3 7. In an optical fibre, the pulse dispersion effect is minimized by. Using a high frequency light source. Using plastic cladding 3. Minimizing the core diameter Which of the above statement is/are correct? (A) only (B) only (C) 3 only (D), and 3 8. Consider the following statements: As compared to short-circuited stubs, open circuited stubs are not preferred because the latter. Are of different characteristics impedance. Have a tendency to radiate Which of the above statements is/are correct? (A) only (B) only (C) Both and (D) Neither nor 9. Consider the following statements for multiple access system in a satellite earth station:. Access to same repeater sub-systems and same RF channel is possible. Frequency division multiple access is used. 3. Several carries are not amplified by same TWT. Which of the above statements are correct? (A) and 3 only (B) and 3 only (C) and only (D), and 3 0. The Bode plot of the open-loop transfer function of a system is described as follows: Slope 40dB/decade < 0.rad/s Slope 0dB/decade 0.<<0rad/s Slope 0 > 0rad/s The system described will have (A) pole and zeros (B) poles and zeros (C) pole and zero (D) pole and zeros Slope 40dB/dec < 0.rad/sec Slope 0dB/dec 0. < <0 Slope 0 > 0 poles at origin At = 0. slope change 40 to 0 single zero At = 0 slope change 0 to 0 single zero Total poles and zeros ICP Intensive Classroom Program IES-Live Internet Based Classes DLP All India IES-Test Series Leaders in IES Preparation 65+ Centers across India 4

(i) Determine the admittance parameters of the network of Fig 1 (f) and draw its - equivalent circuit.

(i) Determine the admittance parameters of the network of Fig 1 (f) and draw its - equivalent circuit. I.E.S-(Conv.)-1995 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - I Some useful data: Electron charge: 1.6 10 19 Coulomb Free space permeability: 4 10 7 H/m Free space permittivity: 8.85 pf/m Velocity

More information

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-2012 SCHEME OF VALUATION

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-2012 SCHEME OF VALUATION GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION JULY-0 SCHEME OF VALUATION Subject Code: 40 Subject: PART - A 0. Which region of the transistor

More information

R.B.V.R.R. WOMEN S COLLEGE (AUTONOMOUS) Narayanaguda, Hyderabad. ELECTRONIC PRINCIPLES AND APPLICATIONS

R.B.V.R.R. WOMEN S COLLEGE (AUTONOMOUS) Narayanaguda, Hyderabad. ELECTRONIC PRINCIPLES AND APPLICATIONS R.B.V.R.R. WOMEN S COLLEGE (AUTONOMOUS) Narayanaguda, Hyderabad. DEPARTMENT OF PHYSICS QUESTION BANK FOR SEMESTER V PHYSICS PAPER VI (A) ELECTRONIC PRINCIPLES AND APPLICATIONS UNIT I: SEMICONDUCTOR DEVICES

More information

OBJECTIVE TYPE QUESTIONS

OBJECTIVE TYPE QUESTIONS OBJECTIVE TYPE QUESTIONS Q.1 The breakdown mechanism in a lightly doped p-n junction under reverse biased condition is called (A) avalanche breakdown. (B) zener breakdown. (C) breakdown by tunnelling.

More information

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2013 SCHEME OF VALUATION

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2013 SCHEME OF VALUATION GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-03 SCHEME OF VALUATION Subject Code: 0 Subject: PART - A 0. What does the arrow mark indicate

More information

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2012 SCHEME OF VALUATION

GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-2012 SCHEME OF VALUATION GOVERNMENT OF KARNATAKA KARNATAKA STATE PRE-UNIVERSITY EDUCATION EXAMINATION BOARD II YEAR PUC EXAMINATION MARCH-0 SCHEME OF VALUATION Subject Code: 0 Subject: Qn. PART - A 0. Which is the largest of three

More information

Electronics Eingineering

Electronics Eingineering Electronics Eingineering 1. The output of a two-input gate is 0 if and only if its inputs are unequal. It is true for (A) XOR gate (B) NAND gate (C) NOR gate (D) XNOR gate 2. In K-map simplification, a

More information

GATE: Electronics MCQs (Practice Test 1 of 13)

GATE: Electronics MCQs (Practice Test 1 of 13) GATE: Electronics MCQs (Practice Test 1 of 13) 1. Removing bypass capacitor across the emitter leg resistor in a CE amplifier causes a. increase in current gain b. decrease in current gain c. increase

More information

ELECTRONICS ADVANCED SUPPLEMENTARY LEVEL

ELECTRONICS ADVANCED SUPPLEMENTARY LEVEL ELECTRONICS ADVANCED SUPPLEMENTARY LEVEL AIMS The general aims of the subject are : 1. to foster an interest in and an enjoyment of electronics as a practical and intellectual discipline; 2. to develop

More information

For the mechanical system of figure shown above:

For the mechanical system of figure shown above: I.E.S-(Conv.)-00 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - I Time Allowed: Three Hours Maximum Marks : 0 Candidates should attempt any FIVE questions. Some useful data: Electron charge : 1.6

More information

(A) 1 and 1 (B) 0 and 1 (C) 1 and 0 (D) 0 and A second order system is described by the equation. (A) 1 rad / sec and 5 (B) 5 rad / sec and 7

(A) 1 and 1 (B) 0 and 1 (C) 1 and 0 (D) 0 and A second order system is described by the equation. (A) 1 rad / sec and 5 (B) 5 rad / sec and 7 EC- Objective Paper-II IES-013 www.gateforum.com IES-013- Paper-II 1. The D.C. gain and steady state error for step input for ( ) = s + 1 G s are : s + s + 1 (A) 1 and 1 (B) 0 and 1 (C) 1 and 0 (D) 0 and

More information

I.E.S-(Conv.)-2007 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - II Time Allowed: 3 hours Maximum Marks : 200 Candidates should attempt Question No. 1 which is compulsory and FOUR more questions

More information

Operational Amplifiers

Operational Amplifiers Operational Amplifiers Table of contents 1. Design 1.1. The Differential Amplifier 1.2. Level Shifter 1.3. Power Amplifier 2. Characteristics 3. The Opamp without NFB 4. Linear Amplifiers 4.1. The Non-Inverting

More information

The steeper the phase shift as a function of frequency φ(ω) the more stable the frequency of oscillation

The steeper the phase shift as a function of frequency φ(ω) the more stable the frequency of oscillation It should be noted that the frequency of oscillation ω o is determined by the phase characteristics of the feedback loop. the loop oscillates at the frequency for which the phase is zero The steeper the

More information

SIR PADAMPAT SINGHANIA UNIVERSITY UDAIPUR Sample Question Paper for Ph.D. (Electronics & Communication Engineering) SPSAT 18

SIR PADAMPAT SINGHANIA UNIVERSITY UDAIPUR Sample Question Paper for Ph.D. (Electronics & Communication Engineering) SPSAT 18 INSTRUCTIONS SIR PADAMPAT SINGHANIA UNIVERSITY UDAIPUR Sample Question Paper for Ph.D. (Electronics & Communication Engineering) SPSAT 18 The test is 60 minutes long and consists of 40 multiple choice

More information

ELC224 Final Review (12/10/2009) Name:

ELC224 Final Review (12/10/2009) Name: ELC224 Final Review (12/10/2009) Name: Select the correct answer to the problems 1 through 20. 1. A common-emitter amplifier that uses direct coupling is an example of a dc amplifier. 2. The frequency

More information

Linear Algebra, Calculus, Differential Equations and Vector Analysis. Complex Anaysis, Numerical Methods and Probability and Statistics.

Linear Algebra, Calculus, Differential Equations and Vector Analysis. Complex Anaysis, Numerical Methods and Probability and Statistics. Test No Topic code Topic EC-01 GEM (Engineering Mathematics) Topic wise Tests Each test carries 25 marks and 45 minutes duration Test consists of 5 one mark questions and 10 two marks questions Tests will

More information

Difference between BJTs and FETs. Junction Field Effect Transistors (JFET)

Difference between BJTs and FETs. Junction Field Effect Transistors (JFET) Difference between BJTs and FETs Transistors can be categorized according to their structure, and two of the more commonly known transistor structures, are the BJT and FET. The comparison between BJTs

More information

GATE SOLVED PAPER - IN

GATE SOLVED PAPER - IN YEAR 202 ONE MARK Q. The i-v characteristics of the diode in the circuit given below are : v -. A v 0.7 V i 500 07 $ = * 0 A, v < 0.7 V The current in the circuit is (A) 0 ma (C) 6.67 ma (B) 9.3 ma (D)

More information

Preface... iii. Chapter 1: Diodes and Circuits... 1

Preface... iii. Chapter 1: Diodes and Circuits... 1 Table of Contents Preface... iii Chapter 1: Diodes and Circuits... 1 1.1 Introduction... 1 1.2 Structure of an Atom... 2 1.3 Classification of Solid Materials on the Basis of Conductivity... 2 1.4 Atomic

More information

PESIT BANGALORE SOUTH CAMPUS BASIC ELECTRONICS

PESIT BANGALORE SOUTH CAMPUS BASIC ELECTRONICS PESIT BANGALORE SOUTH CAMPUS QUESTION BANK BASIC ELECTRONICS Sub Code: 17ELN15 / 17ELN25 IA Marks: 20 Hrs/ Week: 04 Exam Marks: 80 Total Hours: 50 Exam Hours: 03 Name of Faculty: Mr. Udoshi Basavaraj Module

More information

Homework Assignment 06

Homework Assignment 06 Question 1 (2 points each unless noted otherwise) Homework Assignment 06 1. True or false: when transforming a circuit s diagram to a diagram of its small-signal model, we replace dc constant current sources

More information

ELECTRONIC CIRCUITS. Time: Three Hours Maximum Marks: 100

ELECTRONIC CIRCUITS. Time: Three Hours Maximum Marks: 100 EC 40 MODEL TEST PAPER - 1 ELECTRONIC CIRCUITS Time: Three Hours Maximum Marks: 100 Answer five questions, taking ANY TWO from Group A, any two from Group B and all from Group C. All parts of a question

More information

Frequently Asked Questions GE6252 BEEE UNIT I ELECTRICAL CIRCUITS AND MEASUREMENTS

Frequently Asked Questions GE6252 BEEE UNIT I ELECTRICAL CIRCUITS AND MEASUREMENTS Frequently Asked Questions GE6252 BEEE UNIT I ELECTRICAL CIRCUITS AND MEASUREMENTS 1. What is charge? 2. Define current. 3. Under what condition AC circuit said to be resonant? 4. What do you meant by

More information

4. Forward bias of a silicon P-N junction will produce a barrier voltage of approximately how many volts? A. 0.2 B. 0.3 C. 0.7 D. 0.

4. Forward bias of a silicon P-N junction will produce a barrier voltage of approximately how many volts? A. 0.2 B. 0.3 C. 0.7 D. 0. 1. The dc current through each diode in a bridge rectifier equals A. the load current B. half the dc load current C. twice the dc load current D. one-fourth the dc load current 2. When matching polarity

More information

B.E. SEMESTER III (ELECTRICAL) SUBJECT CODE: X30902 Subject Name: Analog & Digital Electronics

B.E. SEMESTER III (ELECTRICAL) SUBJECT CODE: X30902 Subject Name: Analog & Digital Electronics B.E. SEMESTER III (ELECTRICAL) SUBJECT CODE: X30902 Subject Name: Analog & Digital Electronics Sr. No. Date TITLE To From Marks Sign 1 To verify the application of op-amp as an Inverting Amplifier 2 To

More information

I.E.S-(Conv.)-1996 Some useful data:

I.E.S-(Conv.)-1996 Some useful data: I.E.S-(Conv.)-1996 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - I Time allowed: 3 Hours Maximum Marks : 200 Candidates should attempt question ONE which is compulsory and any FOUR of the remaining

More information

Subject Code: Model Answer Page No: / N

Subject Code: Model Answer Page No: / N Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

free Online GATE coaching www.egate.ws Online IES coaching for free I.E.S-(Conv.)-2000 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - II Candidates should attempt question no. 1 which is compulsory

More information

DHANALAKSHMI COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING EC6202 ELECTRONIC DEVICES AND CIRCUITS

DHANALAKSHMI COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING EC6202 ELECTRONIC DEVICES AND CIRCUITS DHANALAKSHMI COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING EC6202 ELECTRONIC DEVICES AND CIRCUITS UNIT-I - PN DIODEAND ITSAPPLICATIONS 1. What is depletion region in PN junction?

More information

Time: 3 hours Max. Marks: 70 Answer any FIVE questions All questions carry equal marks

Time: 3 hours Max. Marks: 70 Answer any FIVE questions All questions carry equal marks Code: 9A02401 PRINCIPLES OF ELECTRICAL ENGINEERING (Common to EIE, E.Con.E, ECE & ECC) Time: 3 hours Max. Marks: 70 1 In a series RLC circuit, R = 5 Ω, L = 1 H and C = 1 F. A dc v ltage f 20 V is applied

More information

UPSC Electrical Engineering Syllabus

UPSC Electrical Engineering Syllabus UPSC Electrical Engineering Syllabus UPSC Electrical Engineering Syllabus PAPER I 1. Circuit Theory: Circuit components; network graphs; KCL, KVL; circuit analysis methods: nodal analysis, mesh analysis;

More information

Homework Assignment 04

Homework Assignment 04 Question 1 (Short Takes) Homework Assignment 04 1. Consider the single-supply op-amp amplifier shown. What is the purpose of R 3? (1 point) Answer: This compensates for the op-amp s input bias current.

More information

BSNL TTA Question Paper Control Systems Specialization 2007

BSNL TTA Question Paper Control Systems Specialization 2007 BSNL TTA Question Paper Control Systems Specialization 2007 1. An open loop control system has its (a) control action independent of the output or desired quantity (b) controlling action, depending upon

More information

ELECTRONICS AND COMMUNICATION ENGINEERING

ELECTRONICS AND COMMUNICATION ENGINEERING ELECTRONICS AND COMMUNICATION ENGINEERING Q1. A transmission line of characteristic impedance 50 Ω is terminated by a 50 Ω load. When excited by a sinusoidal voltage source at 10 GHz the phase difference

More information

ELECTRONICS ENGINEERING

ELECTRONICS ENGINEERING ELECTRONICS ENGINEERING 1. Just as a voltage amplifier signal voltage a power amplifier. 1.amplifier power 2.amplifier signal 3.converts the signal ac power into DC power 4.converts a dc power into useful

More information

ECE Branch GATE Paper (C) exp ( t ) sin (25t) (B) 4cos (20t + 3) + 2 sin (710t)

ECE Branch GATE Paper (C) exp ( t ) sin (25t) (B) 4cos (20t + 3) + 2 sin (710t) Question 30 Carry One Mark Each. The following differential equation has 2 3 d y dy 2 3 4 y 2 2 dt degree = 2, order = degree = 3, order = 2 + + + = x dt degree = 4, order = 3 degree = 2, order = 3 2.

More information

Conventional Paper-II-2011 Part-1A

Conventional Paper-II-2011 Part-1A Conventional Paper-II-2011 Part-1A 1(a) (b) (c) (d) (e) (f) (g) (h) The purpose of providing dummy coils in the armature of a DC machine is to: (A) Increase voltage induced (B) Decrease the armature resistance

More information

I.E.S-(Conv.)-1992 Time Allowed : Three Hours

I.E.S-(Conv.)-1992 Time Allowed : Three Hours I.E.S-(Conv.)-1992 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - I Time Allowed : Three Hours Maximum Marks: 0 Candidates should attempt question No. 1 which is compulsory and any FOUR of the remaining

More information

Document Name: Electronic Circuits Lab. Facebook: Twitter:

Document Name: Electronic Circuits Lab.  Facebook:  Twitter: Document Name: Electronic Circuits Lab www.vidyathiplus.in Facebook: www.facebook.com/vidyarthiplus Twitter: www.twitter.com/vidyarthiplus Copyright 2011-2015 Vidyarthiplus.in (VP Group) Page 1 CIRCUIT

More information

COMBO ONLINE TEST SERIES GATE 2019 SCHEDULE: ELECTRONICS & COMMUNICATION ENGINEERING Syllabus Test Date Test Type [ EB-Engineering Branch ; EM- No. of Engineering Mathematics; GA- General Question Marks

More information

Linear electronic. Lecture No. 1

Linear electronic. Lecture No. 1 1 Lecture No. 1 2 3 4 5 Lecture No. 2 6 7 8 9 10 11 Lecture No. 3 12 13 14 Lecture No. 4 Example: find Frequency response analysis for the circuit shown in figure below. Where R S =4kR B1 =8kR B2 =4k R

More information

Code: 9A Answer any FIVE questions All questions carry equal marks *****

Code: 9A Answer any FIVE questions All questions carry equal marks ***** II B. Tech II Semester (R09) Regular & Supplementary Examinations, April/May 2012 ELECTRONIC CIRCUIT ANALYSIS (Common to EIE, E. Con. E & ECE) Time: 3 hours Max Marks: 70 Answer any FIVE questions All

More information

Chapter 13 Oscillators and Data Converters

Chapter 13 Oscillators and Data Converters Chapter 13 Oscillators and Data Converters 13.1 General Considerations 13.2 Ring Oscillators 13.3 LC Oscillators 13.4 Phase Shift Oscillator 13.5 Wien-Bridge Oscillator 13.6 Crystal Oscillators 13.7 Chapter

More information

4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET) 4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET) The Metal Oxide Semitonductor Field Effect Transistor (MOSFET) has two modes of operation, the depletion mode, and the enhancement mode.

More information

Summer 2015 Examination

Summer 2015 Examination Summer 2015 Examination Subject Code: 17445 Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme.

More information

UMAINE ECE Morse Code ROM and Transmitter at ISM Band Frequency

UMAINE ECE Morse Code ROM and Transmitter at ISM Band Frequency UMAINE ECE Morse Code ROM and Transmitter at ISM Band Frequency Jamie E. Reinhold December 15, 2011 Abstract The design, simulation and layout of a UMAINE ECE Morse code Read Only Memory and transmitter

More information

EC Objective Paper II (Set - D) 2 10 Hz (C)

EC Objective Paper II (Set - D) 2 10 Hz (C) EC Objective Paper II (Set - D) 1. Techniques that automatically move program and data blocks into the physical main memory when they are required for execution are called Main Memory techniques Cache

More information

ANNA UNIVERSITY :: CHENNAI MODEL QUESTION PAPER(V-SEMESTER) B.E. ELECTRONICS AND COMMUNICATION ENGINEERING EC334 - CONTROL SYSTEMS

ANNA UNIVERSITY :: CHENNAI MODEL QUESTION PAPER(V-SEMESTER) B.E. ELECTRONICS AND COMMUNICATION ENGINEERING EC334 - CONTROL SYSTEMS ANNA UNIVERSITY :: CHENNAI - 600 025 MODEL QUESTION PAPER(V-SEMESTER) B.E. ELECTRONICS AND COMMUNICATION ENGINEERING EC334 - CONTROL SYSTEMS Time: 3hrs Max Marks: 100 Answer all Questions PART - A (10

More information

DEPARTMENT OF ELECTRONICS

DEPARTMENT OF ELECTRONICS DEPARTMENT OF ELECTRONICS Academic Planner for odd Semesters Semester : I Subject : Electronics(ELT1). Course: B.Sc. (PME) Introduction to Number systems B Construction and types, working Review of P type

More information

EC CONTROL SYSTEMS ENGINEERING

EC CONTROL SYSTEMS ENGINEERING 1 YEAR / SEM: II / IV EC 1256. CONTROL SYSTEMS ENGINEERING UNIT I CONTROL SYSTEM MODELING PART-A 1. Define open loop and closed loop systems. 2. Define signal flow graph. 3. List the force-voltage analogous

More information

INSTITUTE OF AERONAUTICAL ENGINEERING (Autonomous) Dundigal, Hyderabad

INSTITUTE OF AERONAUTICAL ENGINEERING (Autonomous) Dundigal, Hyderabad 1 P a g e INSTITUTE OF AERONAUTICAL ENGINEERING (Autonomous) Dundigal, Hyderabad - 500 043 ELECTRONICS AND COMMUNICATION ENGINEERING TUTORIAL QUESTION BANK Name : INTEGRATED CIRCUITS APPLICATIONS Code

More information

Physical electronics, various electronics devices, ICs form the core of Electronics and Telecommunication branch. This part includes

Physical electronics, various electronics devices, ICs form the core of Electronics and Telecommunication branch. This part includes Paper-1 Syllabus for Electronics & Telecommunication Engineering: This part is for both objective and conventional type papers: 1) Materials and Components Materials and Components are the vertebral column

More information

R & D Electronics DIGITAL IC TRAINER. Model : DE-150. Feature: Object: Specification:

R & D Electronics DIGITAL IC TRAINER. Model : DE-150. Feature: Object: Specification: DIGITAL IC TRAINER Model : DE-150 Object: To Study the Operation of Digital Logic ICs TTL and CMOS. To Study the All Gates, Flip-Flops, Counters etc. To Study the both the basic and advance digital electronics

More information

Total No. of Questions : 40 ] [ Total No. of Printed Pages : 7. March, Time : 3 Hours 15 Minutes ] [ Max. Marks : 90

Total No. of Questions : 40 ] [ Total No. of Printed Pages : 7. March, Time : 3 Hours 15 Minutes ] [ Max. Marks : 90 Code No. 40 Total No. of Questions : 40 ] [ Total No. of Printed Pages : 7 March, 2009 ELECTRONICS Time : 3 Hours 15 Minutes ] [ Max. Marks : 90 Note : i) The question paper has four Parts A, B, C & D.

More information

Let us consider the following block diagram of a feedback amplifier with input voltage feedback fraction,, be positive i.e. in phase.

Let us consider the following block diagram of a feedback amplifier with input voltage feedback fraction,, be positive i.e. in phase. P a g e 2 Contents 1) Oscillators 3 Sinusoidal Oscillators Phase Shift Oscillators 4 Wien Bridge Oscillators 4 Square Wave Generator 5 Triangular Wave Generator Using Square Wave Generator 6 Using Comparator

More information

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) Summer 2016 EXAMINATIONS.

MAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) Summer 2016 EXAMINATIONS. Summer 2016 EXAMINATIONS Subject Code: 17321 Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the answer scheme. 2) The

More information

Scheme Q.1 Attempt any SIX of following: 12-Total Marks a) Draw symbol NPN and PNP transistor. 2 M Ans: Symbol Of NPN and PNP BJT (1M each)

Scheme Q.1 Attempt any SIX of following: 12-Total Marks a) Draw symbol NPN and PNP transistor. 2 M Ans: Symbol Of NPN and PNP BJT (1M each) Q. No. WINTER 16 EXAMINATION (Subject Code: 17319) Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer

More information

Table of Contents Lesson One Lesson Two Lesson Three Lesson Four Lesson Five PREVIEW COPY

Table of Contents Lesson One Lesson Two Lesson Three Lesson Four Lesson Five PREVIEW COPY Oscillators Table of Contents Lesson One Lesson Two Lesson Three Introduction to Oscillators...3 Flip-Flops...19 Logic Clocks...37 Lesson Four Filters and Waveforms...53 Lesson Five Troubleshooting Oscillators...69

More information

ELECTRICAL ENGINEERING (CODE NO. 10) PAPER - I

ELECTRICAL ENGINEERING (CODE NO. 10) PAPER - I ELECTRICAL ENGINEERING (CODE NO. 10) PAPER - I 1. Circuit theory Circuit Components, Network graphs, KCL, KVL, Circuit analysis methods: Nodal analysis, mesh analysis, basic network theorems; transient

More information

LINEAR IC APPLICATIONS

LINEAR IC APPLICATIONS 1 B.Tech III Year I Semester (R09) Regular & Supplementary Examinations December/January 2013/14 1 (a) Why is R e in an emitter-coupled differential amplifier replaced by a constant current source? (b)

More information

FREQUENTLY ASKED QUESTIONS

FREQUENTLY ASKED QUESTIONS FREQUENTLY ASKED QUESTIONS UNIT-1 SUBJECT : ELECTRONIC DEVICES AND CIRCUITS SUBJECT CODE : EC6202 BRANCH: EEE PART -A 1. What is meant by diffusion current in a semi conductor? (APR/MAY 2010, 2011, NOV/DEC

More information

Level 6 Graduate Diploma in Engineering Electronics and telecommunications

Level 6 Graduate Diploma in Engineering Electronics and telecommunications 9210-116 Level 6 Graduate Diploma in Engineering Electronics and telecommunications Sample Paper You should have the following for this examination one answer book non-programmable calculator pen, pencil,

More information

Objective: To study and verify the functionality of a) PN junction diode in forward bias. Sl.No. Name Quantity Name Quantity 1 Diode

Objective: To study and verify the functionality of a) PN junction diode in forward bias. Sl.No. Name Quantity Name Quantity 1 Diode Experiment No: 1 Diode Characteristics Objective: To study and verify the functionality of a) PN junction diode in forward bias Components/ Equipments Required: b) Point-Contact diode in reverse bias Components

More information

Emitter base bias. Collector base bias Active Forward Reverse Saturation forward Forward Cut off Reverse Reverse Inverse Reverse Forward

Emitter base bias. Collector base bias Active Forward Reverse Saturation forward Forward Cut off Reverse Reverse Inverse Reverse Forward SEMICONDUCTOR PHYSICS-2 [Transistor, constructional characteristics, biasing of transistors, transistor configuration, transistor as an amplifier, transistor as a switch, transistor as an oscillator] Transistor

More information

Integrated Circuit: Classification:

Integrated Circuit: Classification: Integrated Circuit: It is a miniature, low cost electronic circuit consisting of active and passive components that are irreparably joined together on a single crystal chip of silicon. Classification:

More information

EE LINEAR INTEGRATED CIRCUITS & APPLICATIONS

EE LINEAR INTEGRATED CIRCUITS & APPLICATIONS UNITII CHARACTERISTICS OF OPAMP 1. What is an opamp? List its functions. The opamp is a multi terminal device, which internally is quite complex. It is a direct coupled high gain amplifier consisting of

More information

Oscillators. An oscillator may be described as a source of alternating voltage. It is different than amplifier.

Oscillators. An oscillator may be described as a source of alternating voltage. It is different than amplifier. Oscillators An oscillator may be described as a source of alternating voltage. It is different than amplifier. An amplifier delivers an output signal whose waveform corresponds to the input signal but

More information

Analog Electronic Circuits Lab-manual

Analog Electronic Circuits Lab-manual 2014 Analog Electronic Circuits Lab-manual Prof. Dr Tahir Izhar University of Engineering & Technology LAHORE 1/09/2014 Contents Experiment-1:...4 Learning to use the multimeter for checking and indentifying

More information

ML4818 Phase Modulation/Soft Switching Controller

ML4818 Phase Modulation/Soft Switching Controller Phase Modulation/Soft Switching Controller www.fairchildsemi.com Features Full bridge phase modulation zero voltage switching circuit with programmable ZV transition times Constant frequency operation

More information

EC202- ELECTRONIC CIRCUITS II Unit- I -FEEEDBACK AMPLIFIER

EC202- ELECTRONIC CIRCUITS II Unit- I -FEEEDBACK AMPLIFIER EC202- ELECTRONIC CIRCUITS II Unit- I -FEEEDBACK AMPLIFIER 1. What is feedback? What are the types of feedback? 2. Define positive feedback. What are its merits and demerits? 3. Define negative feedback.

More information

Amplifier Frequency Response, Feedback, Oscillations; Op-Amp Block Diagram and Gain-Bandwidth Product

Amplifier Frequency Response, Feedback, Oscillations; Op-Amp Block Diagram and Gain-Bandwidth Product Amplifier Frequency Response, Feedback, Oscillations; Op-Amp Block Diagram and Gain-Bandwidth Product Physics116A,12/4/06 Draft Rev. 1, 12/12/06 D. Pellett 2 Negative Feedback and Voltage Amplifier AB

More information

Gechstudentszone.wordpress.com

Gechstudentszone.wordpress.com 8.1 Operational Amplifier (Op-Amp) UNIT 8: Operational Amplifier An operational amplifier ("op-amp") is a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended

More information

COMMUNICATION SYSTEMS

COMMUNICATION SYSTEMS COMMUNICATION SYSTEMS 1. A cordless telephone using separate frequencies for transmission in base and portable units is known as A. duplex arrangement B. half duplex arrangement C. either (a) or (b) D.

More information

Electrical Materials may be referred to a metal, dielectrics,electrical insulators or conductors,paramagnetic materials and many other.

Electrical Materials may be referred to a metal, dielectrics,electrical insulators or conductors,paramagnetic materials and many other. Electrical Engineering Paper-1 Syllabus : This part is for both objective and conventional types papers : 1) EM Theory- The electromagnetic force is said to be one of the fundamental interactions in nature

More information

IES Digital Mock Test

IES Digital Mock Test . The circuit given below work as IES Digital Mock Test - 4 Logic A B C x y z (a) Binary to Gray code converter (c) Binary to ECESS- converter (b) Gray code to Binary converter (d) ECESS- To Gray code

More information

HIGH LOW Astable multivibrators HIGH LOW 1:1

HIGH LOW Astable multivibrators HIGH LOW 1:1 1. Multivibrators A multivibrator circuit oscillates between a HIGH state and a LOW state producing a continuous output. Astable multivibrators generally have an even 50% duty cycle, that is that 50% of

More information

State the application of negative feedback and positive feedback (one in each case)

State the application of negative feedback and positive feedback (one in each case) (ISO/IEC - 700-005 Certified) Subject Code: 073 Model wer Page No: / N Important Instructions to examiners: ) The answers should be examined by key words and not as word-to-word as given in the model answer

More information

Testing and Stabilizing Feedback Loops in Today s Power Supplies

Testing and Stabilizing Feedback Loops in Today s Power Supplies Keywords Venable, frequency response analyzer, impedance, injection transformer, oscillator, feedback loop, Bode Plot, power supply design, open loop transfer function, voltage loop gain, error amplifier,

More information

SUMMER 13 EXAMINATION Subject Code: Model Answer Page No: / N

SUMMER 13 EXAMINATION Subject Code: Model Answer Page No: / N Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model answer and the answer written by candidate

More information

4/30/2012. General Class Element 3 Course Presentation. Practical Circuits. Practical Circuits. Subelement G7. 2 Exam Questions, 2 Groups

4/30/2012. General Class Element 3 Course Presentation. Practical Circuits. Practical Circuits. Subelement G7. 2 Exam Questions, 2 Groups General Class Element 3 Course Presentation ti ELEMENT 3 SUB ELEMENTS General Licensing Class Subelement G7 2 Exam Questions, 2 Groups G1 Commission s Rules G2 Operating Procedures G3 Radio Wave Propagation

More information

Chapter 8. Chapter 9. Chapter 6. Chapter 10. Chapter 11. Chapter 7

Chapter 8. Chapter 9. Chapter 6. Chapter 10. Chapter 11. Chapter 7 5.5 Series and Parallel Combinations of 246 Complex Impedances 5.6 Steady-State AC Node-Voltage 247 Analysis 5.7 AC Power Calculations 256 5.8 Using Power Triangles 258 5.9 Power-Factor Correction 261

More information

Chapter 1 Semiconductors and the p-n Junction Diode 1

Chapter 1 Semiconductors and the p-n Junction Diode 1 Preface xiv Chapter 1 Semiconductors and the p-n Junction Diode 1 1-1 Semiconductors 2 1-2 Impure Semiconductors 5 1-3 Conduction Processes in Semiconductors 7 1-4 Thep-nJunction 9' 1-5 The Meta1-Semiconductor

More information

Microelectronic Circuits

Microelectronic Circuits SECOND EDITION ISHBWHBI \ ' -' Microelectronic Circuits Adel S. Sedra University of Toronto Kenneth С Smith University of Toronto HOLT, RINEHART AND WINSTON HOLT, RINEHART AND WINSTON, INC. New York Chicago

More information

PAPER-II I.E.S-(OBJ) of 13

PAPER-II I.E.S-(OBJ) of 13 I.E.S-(OBJ)-000 1 of 13 ELECTRONICS & TELECOMMUNICATION ENGINEERING PAPER-II 1. A telephone channel has bandwidth B of 3 khz and SNR (S / B) of 30 db. It is connected to a teletype machine having 3 different

More information

System on a Chip. Prof. Dr. Michael Kraft

System on a Chip. Prof. Dr. Michael Kraft System on a Chip Prof. Dr. Michael Kraft Lecture 4: Filters Filters General Theory Continuous Time Filters Background Filters are used to separate signals in the frequency domain, e.g. remove noise, tune

More information

UNIT 2. Q.1) Describe the functioning of standard signal generator. Ans. Electronic Measurements & Instrumentation

UNIT 2. Q.1) Describe the functioning of standard signal generator. Ans.   Electronic Measurements & Instrumentation UNIT 2 Q.1) Describe the functioning of standard signal generator Ans. STANDARD SIGNAL GENERATOR A standard signal generator produces known and controllable voltages. It is used as power source for the

More information

R a) Explain the operation of RC high-pass circuit when exponential input is applied.

R a) Explain the operation of RC high-pass circuit when exponential input is applied. SET - 1 1. a) Explain the operation of RC high-pass circuit when exponential input is applied. 2x V ( e 1) V b) Verify V2 = = tanhx for a symmetrical square wave applied to a RC low 2x 2 ( e + 2 pass circuit.

More information

UNIT I. Operational Amplifiers

UNIT I. Operational Amplifiers UNIT I Operational Amplifiers Operational Amplifier: The operational amplifier is a direct-coupled high gain amplifier. It is a versatile multi-terminal device that can be used to amplify dc as well as

More information

Code No: Y0221/R07 Set No. 1 I B.Tech Supplementary Examinations, Apr/May 2013 BASIC ELECTRONIC DEVICES AND CIRCUITS (Electrical & Electronics Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions

More information

Electronics Prof D. C. Dube Department of Physics Indian Institute of Technology, Delhi

Electronics Prof D. C. Dube Department of Physics Indian Institute of Technology, Delhi Electronics Prof D. C. Dube Department of Physics Indian Institute of Technology, Delhi Module No. # 04 Feedback in Amplifiers, Feedback Configurations and Multi Stage Amplifiers Lecture No. # 03 Input

More information

UNIT I Introduction to DC & AC circuits

UNIT I Introduction to DC & AC circuits SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road 517583 QUESTION BANK (DESCRIPTIVE) Subject with Code: Basic Electrical and Electronics Engineering (16EE207) Year & Sem: II-B.

More information

WINTER 14 EXAMINATION. Model Answer. 1) The answers should be examined by key words and not as word-to-word as given in the

WINTER 14 EXAMINATION. Model Answer. 1) The answers should be examined by key words and not as word-to-word as given in the WINTER 14 EXAMINATION Subject Code: 17213 Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2)

More information

Downloaded From All JNTU World

Downloaded From   All JNTU World Code: 9A02403 GENERATION OF ELECTRIC POWER 1 Discuss the advantages and disadvantages of a nuclear plant as compared to other conventional power plants. 2 Explain about: (a) Solar distillation. (b) Solar

More information

SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road QUESTION BANK (DESCRIPTIVE) PART - A

SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road QUESTION BANK (DESCRIPTIVE) PART - A SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road 517583 QUESTION BANK (DESCRIPTIVE) Subject with Code: Basic Electrical and Electronics Engineering (16EE207) Year & Sem: II-B.

More information

Analytical Chemistry II

Analytical Chemistry II Analytical Chemistry II L3: Signal processing (selected slides) Semiconductor devices Apart from resistors and capacitors, electronic circuits often contain nonlinear devices: transistors and diodes. The

More information

WINTER 14 EXAMINATION

WINTER 14 EXAMINATION Subject Code:173 WINTER 14 EXAMINATION Model Answer Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The

More information

Module -18 Flip flops

Module -18 Flip flops 1 Module -18 Flip flops 1. Introduction 2. Comparison of latches and flip flops. 3. Clock the trigger signal 4. Flip flops 4.1. Level triggered flip flops SR, D and JK flip flops 4.2. Edge triggered flip

More information

Objective Questions. (a) Light (b) Temperature (c) Sound (d) all of these

Objective Questions. (a) Light (b) Temperature (c) Sound (d) all of these Objective Questions Module 1: Introduction 1. Which of the following is an analog quantity? (a) Light (b) Temperature (c) Sound (d) all of these 2. Which of the following is a digital quantity? (a) Electrical

More information

multivibrator; Introduction to silicon-controlled rectifiers (SCRs).

multivibrator; Introduction to silicon-controlled rectifiers (SCRs). Appendix The experiments of which details are given in this book are based largely on a set of 'modules' specially designed by Dr. K.J. Close. These 'modules' are now made and marketed by Irwin-Desman

More information