NCP Watt Audio Power Amplifier with Fast Turn On Time

Transcription

1 .3 Watt Audio Power Amplifier with Fast Turn On Time The NCP299 is an audio power amplifier designed for portable communication device applications such as mobile phone applications. The NCP299 is capable of delivering.3 W of continuous average power to an 8. BTL load from a 5. ower supply, and. W to a 4. BTL load from a 3.6 ower supply. The NCP299 provides high quality audio while requiring few external components and minimal power consumption. It features a lowpower consumption shutdown mode, which is achieved by driving the SHUTDOWN pin with logic low. The NCP299 contains circuitry to prevent from pop and click noise that would otherwise occur during turnon and turnoff transitions. It is a zero pop noise device when a single ended audio input is used. For maximum flexibility, the NCP299 provides an externally controlled gain (with resistors), as well as an externally controlled turnon time (with the bypass capacitor). When using a F bypass capacitor, it offers 6 ms wake up time. Due to its superior PSRR, it can be directly connected to the battery, saving the use of an LDO. This device is available in a 9Pin FlipChip CSP (LeadFree). Features.3 W to an 8. BTL Load from a 5. V Power Supply Superior PSRR: Direct Connection to the Battery Zero Pop Noise Signature with a Single Ended Audio Input Ultra Low Current Shutdown Mode: na 2.2 V5.5 V Operation External Gain Configuration Capability External Turnon Time Configuration Capability: 6 ms ( F Bypass Capacitor) Up to. nf Capacitive Load Driving Capability Thermal Overload Protection Circuitry This is a PbFree Device* 9Pin FlipChip CSP FC SUFFIX CASE 499E MBA A Y WW = Specific Device Code = Assembly Location = Year = Work Week = PbFree Package PIN CONNECTIONS 9Pin FlipChip CSP A A2 A3 INM OUTA INP B B2 C2 B3 VM_P VM C BYPASS C3 MARKING DIAGRAMS OUTB SHUTDOWN (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. A3 A MBA AYWW C Typical Applications Portable Electronic Devices PDAs Wireless Phones *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 27 January, 27 Rev. Publication Order Number: NCP299/D

2 Rf 2 k Cs F AUDIO INPUT Ci 47 nf Ri 2 k C bypass F INM INP BYPASS + + R 2 k R2 2 k OUTA OUTB 8 VIH VIL SHUTDOWN VM_P SHUTDOWN CONTROL VM Figure. Typical Audio Amplifier Application Circuit with Single Ended Input 2

3 PIN DESCRIPTION Pin Type Symbol Description A I INM Negative input of the first amplifier, receives the audio input signal. Connected to the feedback resistor R f and to the input resistor R in. A2 O OUTA Negative output of the NCP299. Connected to the load and to the feedback resistor Rf. A3 I INP Positive input of the first amplifier, receives the common mode voltage. B I VM_P Power Analog Ground. B2 I VM Core Analog Ground. B3 I Positive analog supply of the cell. Range: 2.2 V5.5 V. C I BYPASS Bypass capacitor pin which provides the common mode voltage (Vp/2). C2 O OUTB Positive output of the NCP299. Connected to the load. C3 I SHUTDOWN The device enters in shutdown mode when a low level is applied on this pin. MAXIMUM RATINGS (Note ) Rating Symbol Value Unit Supply Voltage 6. V Operating Supply Voltage Op Vp 2.2 to 5.5 V 2. V = Functional Only Input Voltage V in.3 to Vcc +.3 V Max Output Current Iout 5 ma Power Dissipation (Note 2) Pd Internally Limited Operating Ambient Temperature T A 4 to +85 C Max Junction Temperature T J 5 C Storage Temperature Range T stg 65 to +5 C Thermal Resistance JunctiontoAir R JA (Note 3) C/W ESD Protection Human Body Model (HBM) (Note 4) Machine Model (MM) (Note 5) 8 >25 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T A = +25 C. 2. The thermal shutdown set to 6 C (typical) avoids irreversible damage on the device due to power dissipation. 3. The R JA is highly dependent of the PCB Heatsink area. For example, R JA can equal 95 C/W with 5 mm 2 total area and also 35 C/W with 5 mm 2. For further information see page. The bumps have the same thermal resistance and all need to be connected to optimize the power dissipation. 4. Human Body Model, pf discharge through a.5 k resistor following specification JESD22/A4. 5. Machine Model, 2 pf discharged through all pins following specification JESD22/A5. V 3

4 ELECTRICAL CHARACTERISTICS Limits apply for T A between 4 C to +85 C (Unless otherwise noted). Characteristic Symbol Conditions Supply Quiescent Current I dd = 2.6 V, No Load = 5. V, No Load = 2.6 V, 8 = 5. V, 8 Min (Note 6) Typ Max (Note 6) Unit 4 ma Common Mode Voltage V cm /2 V Shutdown Current I SD.2.3 A Shutdown Voltage High V SDIH.2 V Shutdown Voltage Low V SDIL.4 V Turning On Time (Note 8) T WU C by = F 6 ms Turning Off Time T OFF. s Output Impedance in Shutdown Mode Z SD k Output Swing V loadpeak = 2.6 V, R L = V = 5. V, R L = 8. (Note 7) T A = +25 C T A = 4 C to +85 C Rms Output Power P O = 2.6 V, R L = 4..4 W THD + N < % = 2.6 V, R L = 8. THD + N < % = 5. V, R L = 8. THD + N < %.3.2 Maximum Power Dissipation (Note 8) P Dmax = 5. V, R L = W Output Offset Voltage V OS = 2.6 V 3 3 mv = 5. V SignaltoNoise Ratio SNR = 2.6 V, G = db Hz < F < 2 khz = 5. V, G = Hz < F < 2 khz 77 Positive Supply Rejection Ratio PSRR V+ G = 2., R L = 8. Vp ripple_pp = 2 mv C by =. F Input Terminated with F = 27 Hz = 4.2 V = 3.6 V = 3. V db F =. khz = 4.2 V = 3.6 V = 3. V Efficiency = 2.6 V, P orms = 32 mw = 5. V, P orms =. W Thermal Shutdown Temperature (Note 9) T sd C Total Harmonic Distortion THD = 2.6, F =. khz R L = 4. A V = 2. P O =.32 W.4 % % = 5. V, F =. khz R L = 8. A V = 2. P O =. W.2 6. Min/Max limits are guaranteed by design, test or statistical analysis. 7. This parameter is guaranteed but not tested in production in case of a 5. ower supply. 8. See page 9 for a theoretical approach of this parameter. 9. For this parameter, the Min/Max values are given for information. 4

5 TYPICAL PERFORMANCE CHARACTERISTICS V P = 2.5 V f = khz V P = 3. V f = khz THD + N (%) THD + N (%) P OUT (mw) Figure 2. THD+N versus Output Power P OUT (mw) Figure 3. THD+N versus Output Power THD + N (%) V P = 3.6 V f = khz THD + N (%) V P = 4.2 V f = khz P OUT (mw) Figure 4. THD+N versus Output Power P OUT (mw) Figure 5. THD+N versus Output Power THD + N (%) V P = 5. V f = khz THD + N (%) V P = 2.5 V R L = 4 f = khz P OUT (mw) Figure 6. THD+N versus Output Power P OUT (mw) Figure 7. THD+N versus Output Power 5

6 TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT POWER (mw) f = khz THD+N = % THD+N = % THD+N (%) V P = 2.5 V P OUT = mw POWER SUPPLY (V) Figure 8. Output Power versus Power Supply. Figure 9. THD+N versus Frequency V P = 3. V P OUT = 25 mw V P = 5. V P OUT = 5 mw THD+N (%) THD+N (%). Figure. THD+N versus Frequency. Figure. THD+N versus Frequency P SSR (db) 4 6 C BYP = 22 nf C BYP = nf V P = 3.6 V Input to GND R IN = 22 k, R F = 22 k P SSR (db) C BYP = nf 22 nf 44 nf. F V P = 3.6 V Input to GND R IN = 22 k, R F = k C BYP =. F F 8 Figure 2. P SRR versus Frequency and C V P = 3.6 V, A V = 2 7 Figure 3. P SRR versus Frequency and C V P = 3.6 V, A V = 6

7 TYPICAL PERFORMANCE CHARACTERISTICS 4 5 V P = 3. V Input to GND A V = 4 5 V P = 3.6 V Input to GND A V = P SSR (db) 6 A V = 4 P SSR (db) 6 A V = A V = 2 8 Figure 4. P SRR versus Frequency and V P = 3. V A V = 2 8 Figure 5. P SRR versus Frequency and V P = 3.6 V V P = 4.2 V Input to GND P SSR (db) A V = A V = 4 T ON (ms) A V = Figure 6. P SRR versus Frequency and V P = 4.2 V ROOM TEMPERATURE ( C) Figure 7. Turn On Time versus Room V BAT = 3.6 V, C BYP = F, C IN = nf, R IN = 22 k, R F = k 2 8 T ON (ms) C BYP ( F) Figure 8. Turn On Time versus C V BAT = 3.6 V, T A = +25 C, C IN = nf, R IN = 22 k, R F = k 7

8 TYPICAL PERFORMANCE CHARACTERISTICS.7.3 P D, POWER DISSIPATION (W) = 5 V F = khz THD + N < % P D, POWER DISSIPATION (W) = 3.3 V F = khz THD + N < % P out, OUTPUT POWER (W) Figure 9. Power Dissipation versus Output Power P out, OUTPUT POWER (W).4.5 Figure 2. Power Dissipation versus Output Power P D, POWER DISSIPATION (W) = 3 V F = khz THD + N < % P out, OUTPUT POWER (W) Figure 2. Power Dissipation versus Output Power P D, POWER DISSIPATION (W) R L = 4 = 2.6 V.5 F = khz THD + N < % P out, OUTPUT POWER (W) Figure 22. Power Dissipation versus Output Power P D, POWER DISSIPATION (mw) P Dmax = 633 mw for = 5 V, mm 2 5 mm 2 PCB Heatsink Area 5 mm 2 T A, AMBIENT TEMPERATURE ( C) DIE TEMPERATURE ( AMBIENT TEMPERATURE 25 C = 5 V = 4.2 V = 3.3 V Maximum Die Temperature 5 C 6 V 4 p = 2.6 V PCB HEATSINK AREA (mm 2 ) 3 Figure 23. Power Derating 9Pin FlipChip CSP Figure 24. Maximum Die Temperature versus PCB Heatsink Area 8

9 APPLICATION INFORMATION Detailed Description The NCP299 audio amplifier can operate under 2.6 V until 5.5 ower supply. With less than % THD + N, it can deliver up to.2 W RMS output power to an 8. load (V P = 5. V). If application allows to reach % THD + N, then.6 W can be provided using a 5. ower supply. The structure of the NCP299 is basically composed of two identical internal power amplifiers; the first one is externally configurable with gainsetting resistors R in and R f (the closedloop gain is fixed by the ratios of these resistors) and the second is internally fixed in an inverting unitygain configuration by two resistors of 2 k. So the load is driven differentially through OUTA and OUTB outputs. This configuration eliminates the need for an output coupling capacitor. Internal Power Amplifier The output PMOS and NMOS transistors of the amplifier were designed to deliver the output power of the specifications without clipping. The channel resistance (R on ) of the NMOS and PMOS transistors does not exceed.6 when they drive current. The structure of the internal power amplifier is composed of three symmetrical gain stages, first and medium gain stages are transconductance gain stages to obtain maximum bandwidth and DC gain. TurnOn and TurnOff Transitions A cycle with a turnon and turnoff transition is illustrated with plots that show both single ended signals on the previous page. In order to eliminate pop and click noises during transitions, output power in the load must be slowly established or cut. When logic high is applied to the shutdown pin, the bypass voltage begins to rise exponentially and once the output DC level is around the common mode voltage, the gain is established instantaneously. This way to turnon the device is optimized in terms of rejection of pop and click noises. The device has the same behavior when it is turnedoff by a logic low on the shutdown pin. During the shutdown mode, amplifier outputs are connected to the ground using a k pulldown resistor. When a shutdown low level is applied, with F bypass capacitor, it takes 65 ms before the DC output level is tied to Ground on each output. However, no audio signal will be provided to the BTL load instantaneously after the falling edge on the shutdown pin. With F bypass capacitor, turn on time is set to 6 ms. Refer to Figures 7 and 8 for a complete study of this parameter. This fast turn on time added to a very low shutdown current saves battery life and brings flexibility when designing the audio section of the final application. NCP299 is a zero pop noise device when using a singleended audio input. Shutdown Function The device enters shutdown mode when shutdown signal is low. During the shutdown mode, the DC quiescent current of the circuit does not exceed na. In this configuration, the output impedance is k on each output. Current Limit Circuit The maximum output power of the circuit (Porms =. W, = 5. V, R L = 8. ) requires a peak current in the load of 5 ma. In order to limit the excessive power dissipation in the load when a shortcircuit occurs, the current limit in the load is fixed to 8 ma. The current in the four output MOS transistors are realtime controlled, and when one current exceeds 8 ma, the gate voltage of the MOS transistor is clipped and no more current can be delivered. Thermal Overload Protection Internal amplifiers are switched off when the temperature exceeds 6 C, and will be switched on again only when the temperature decreases fewer than 4 C. The NCP299 is unitygain stable and requires no external components besides gainsetting resistors, an input coupling capacitor and a proper bypassing capacitor in the typical application. The first amplifier is externally configurable (R f and R in ), while the second is fixed in an inverting unity gain configuration. The differentialended amplifier presents two major advantages: The possible output power is four times larger (the output swing is doubled) as compared to a singleended amplifier under the same conditions. Output pins (OUTA and OUTB) are biased at the same potential /2, this eliminates the need for an output coupling capacitor required with a singleended amplifier configuration. The differential closed loopgain of the amplifier is given by Avd 2* R f Rin V orms Vinrms. Output power delivered to the load is given by Porms (Vopeak) 2 (Vopeak is the peak differential 2*RL output voltage). When choosing gain configuration to obtain the desired output power, check that the amplifier is not current limited or clipped. The maximum current which can be delivered to the load is 5 ma Iopeak V opeak. RL 9

10 GainSetting Resistor Selection (R in and R f ) R in and R f set the closedloop gain of the amplifier. In order to optimize device and system performance, the NCP299 should be used in low gain configurations. The low gain configuration minimizes THD + noise values and maximizes the signal to noise ratio, and the amplifier can still be used without running into the bandwidth limitations. A closed loop gain in the range from 2 to 5 is recommended to optimize overall system performance. An input resistor (R in ) value of 22 k is realistic in most of applications, and doesn t require the use of a too large capacitor C in. highpass filter with R in, the cutoff frequency is given by fc 2* *Rin *Cin. The size of the capacitor must be large enough to couple in low frequencies without severe attenuation. An input capacitor value between 33 nf and 22 nf performs well in many applications (With R in = 22 K ). Bypass Capacitor Selection (Cby) The bypass capacitor Cby provides halfsupply filtering and determines how fast the NCP299 turns on. With a singleended audio input, the amplifier will be a zero pop noise device no matter the bypass capacitor. Input Capacitor Selection (C in ) The input coupling capacitor blocks the DC voltage at the amplifier input terminal. This capacitor creates a AUDIO INPUT J3* C2* J2 C R nf 2 k R2 2 k INM INP F C4 + J OUTA 2 k 8 TP* TP2* TP3* OUTA OUTB J6 J8 5 k C3 R3 F BYPASS SHUTDOWN VM_P + SHUTDOWN CONTROL 2 k OUTB VM J5 J7 *C2, TP, TP2, and TP3: Not Mounted Figure 25. Schematic of the NCP299 Demonstration Board

11 Figure 26. Demonstration Board for 9Pin FlipChip CSP Device Silkscreen Layers

12 BILL OF MATERIAL Item Part Description Ref. PCB Footprint Manufacturer Manufacturer Reference NCP299 Audio Amplifier ON Semiconductor NCP299 2 SMD Resistor 2 K R, R2 85 Panasonic ERJ6GEYJ23V 4 SMD Resistor 5 K R3 85 Panasonic ERJ6GEYJ23V 5 Ceramic Capacitor 47 nf V X7R C 85 TDK C22X7R2A473K 6 Ceramic Capacitor. F V X7R C3, C4 85 TDK C22X7RA5K 7 Jumper Header Vertical Mount, 2 positions, mils J2, J6, J8 mils Tyco Electronics / AMP I/O Connector, 2 positions J, J5 2 mils Phoenix Contact Jumper Connector J7 4 mils Harwin D382B Not Mounted C2, TP, TP2, TP3 ORDERING INFORMATION Device Marking Package Shipping NCP299FCT2G MBA 9Pin FlipChip CSP (PbFree) 3/Tape and Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D. 2

13 PACKAGE DIMENSIONS 9 PIN FLIPCHIP CASE 499E ISSUE A C 4 X C SEATING PLANE C.5 C A D B E TOP VIEW A A2 A SIDE VIEW NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. MILLIMETERS DIM MIN MAX A A.2.27 A D.45 BSC E.45 BSC b e.5 BSC D. BSC E. BSC C D e B e A 9 X b C A B.3 C BOTTOM VIEW E ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 827 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative NCP299/D