Data Sheet. AFEM-S GHz WiMAX Coexistence Front End Module. Features. Description. Functional Block Diagram. Applications.

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1 AFEM-S GHz WiMAX Coexistence Front End Module Data Sheet Description Avago Technologies AFEM-S257 WiMAX Coexistence Front End Module (FEM) is designed for mobile and fixed wireless data applications in the 2.5 to 2.7 GHz frequency range. The FEM is optimized for IEEE WiMAX modulation. AFEM-S257 exhibits flat gain and good match while providing linear power efficiency to meet stringent mask conditions and supports two antenna connections for RX diversity or two simultaneous RX signals. This module utilizes Avago Technologies proprietary GaAs phemt, and FBAR technology for superior performance across voltage and temperature levels while providing excellent out of band rejection. AFEM-S257 is in a 5x7x mm MCOB package for space-constrained applications. Functional Block Diagram ANT- ANT-2 T/R- T/R-2 ANT SW RX Div. / RX Switch nfo & OMN Preselector Preselector ISMN ByPass LNA Coex Linear Amplifier ByPass LNA Coex BPF Coex BPF Coex BPF RX- T X RX-2 Features GaAs E-pHEMT, phemt and FBAR technology 50 all RF ports Typical Size: 5 x 7 x mm 3 to 5 V supply (Tx Path) Meets masks at 24 dbm Pout, 6 QAM WiMAX with 3.6 V and 420 ma 6 QAM WiMAX EVM -34 db (2.5%) at 24 dbm gain of 34 db PAE of 8% at SEM compliant Pout = 24 dbm 23 db gain step in low power mode with reduced Idsq Low power Idd, 95 ma at Pout = 0 dbm, 23 db Gain Step 35 dbc rejection at WiFi ISM band 3.5 db Noise Figure from ANT to RX 25 db of /RX Isolation 25 db of Rx/Rx2 Isolation Applications Portable and fixed WiMAX applications Package Diagram Rx2 Rx VDD_ PA_EN PA_MOD VREF LNA2_MOD VDD2_ VDD_RX LNA_MOD ANTSW ANTSW ANT TRSW TOP VIEW

2 Electrical Specifications Absolute Minimum and Maximum Ratings Table. Minimum and Maximum Ratings Parameter Specifications Description Pin Min. Max. Unit Supply Voltage VDD_ V Supply Voltage VDD2_ V Supply Voltage VDD_RX V Comments LNA High/Low Gain LNA_MODE V LNA2 High/Low Gain LNA2_MODE V PA Bias Control VREF 5.5 V PA Mode Control PA_MODE V PA Enable PA_EN V Switch Select ANT ANTSW V Switch Select ANTSW V Switch Select RX TRSW V Switch Select V Switch Select V Switch Select V RF Input 5 dbm Using 6 QAM 3/4 RF Output ANT 25 dbm Using 6 QAM 3/4 RF Output 25 dbm Using 6 QAM 3/4 Ch. Receiver Output RX 0 dbm Ch. 2 Receiver Output 0 dbm Channel Temperature 50 C Storage Temperature C 2

3 Table 2. Recommended Operating Range Parameter Specifications Description Pin Min. Typical Max. Unit Comments Supply Voltage VDD_ V 80 ma Pout = 24 dbm Supply Voltage VDD2_ V 340 ma Pout = 24 dbm Supply Voltage VDD_RX V 35 ma LNA,2 Low/High Gain LNA_MODE V Logic High LNA2_MODE 0 V Logic Low 2 A 0K 20K Input Impedance VREF Control VREF V ma PA Mode, PA_Enable Control Switch Select ANT,2 PA_MODE PA_EN ANTSW ANTSW V Logic High 0.2 V Logic Low 25 A V Logic High 0 V Logic Low 2 A s Switch time 0K 20K Input Impedance Switch Select RX, TRSW V Logic High 0 V Logic Low 2 2 ua us Switch time 0K 20K Input Impedance Frequency Range GHz Thermal Resistance, ch-b 22.6 C/W Channel to board (Tx Only) Thermal Resistance, ch-b 48. C/W Channel to board (Rx Only) Ambient Temperature C 3

4 All data measured on an FR4 demo board at VDD_ = VDD2_ = 3.6 V, VREF = 2.8 V, Tc = 25 C, 50 at all ports. Unless otherwise specified, all data is taken with OFDM 6-QAM ¾ convolutional coding modulated signal per IEEE 802.6e with 0 MHz BW. Table 3. -ANT Electrical Characteristics (25 C, 3.6 V and 50 ) Parameter 4 Performance Min. Typical Max. Unit Comments Input Return Loss 6 0 db Gain Flatness db Over any 0 MHz Gain Variation (V CC) - db 3 V to 5 V High Power EVM db Vcc = 3.6 V & Po = 24 dbm Mode 5.05 MHz -6-3 dbm/00 khz IBW = 00 khz 6.5 MHz -8-3 dbm/mhz IBW = MHz 0.5 MHz MHz MHz MHz Pout (SEM Compliant) +24 dbm WiMAX Forum Total DC Current ma Pout = 24 dbm Gain db Low Power EVM db Pout = 0 dbm Mode Gain Step db Total DC Current 95 5 ma Pout = 0 dbm 24 dbm Pout -33 dbm/mhz 24 dbm Pout -32 dbm/mhz Settling Time S leakage current 5 30 A Max defined at +85 C Output Load Mismatch Ruggednes Path Out of Band Rejection MHz 80 dbc MHz 70 dbc MHz 50 dbc MHz 40 dbc MHz 30 dbc MHz 0 dbc MHz 35 dbc MHz 25 dbc MHz 30 dbc MHz 60 dbc >7200 MHz 60 dbc Noise Power (24 dbm Output Power) 900 MHz -47 dbm/hz 575 MHz -48 dbm/hz 800 MHz -48 dbm/hz 990 MHz -48 dbm/hz 2470 MHz -35 dbm/hz 2473 MHz -34 dbm/hz 248 MHz -24 dbm/hz 8: VSWR No permanent degradation or damage at all phase angles

5 ANT RX and Electrical Characteristics Table 4. Electrical Characteristics (25 C, 3.3 V and 50 ) Parameter Performance Min. Typical Max. Unit Comments Input Return Loss 0 2 db Gain Ripple 0.5 db Over any 0 MHz LNA Gain LNA Gain 5 db High Gain Mode Total DC Current per Receiver 0 5 ma RX Gain db ANT to RX Input PdB -3 0 dbm CW Single Tone Noise Figure db By-pass Mode Total DC Current per Receiver ma RX Gain -0 db ANT to RX Input PdB 4 dbm CW Single Tone Rx to Rx2 Isolation 25 db Tx/RX- and / Isolation 25 db Switch Isolation Tx/Rx Isolation 25 db to any RX path isolation Turn On Time 2 S Rx leakage current 0 A Max defined at +85 C RX Path Out of Band Rejection MHz 70 dbc MHz 70 dbc MHz 35 dbc MHz 30 dbc MHz 30 dbc MHz 35 dbc MHz 30 dbc MHz 30 dbc MHz 30 dbc 5

6 Table 5. Logic Table PA_EN LNA_ MODE LNA2_ MODE PA_ MODE ANTSW ANTSW2 TRSW 2 DIAGRAM ANT LPM H L L L H L H L H L ANT RX ANT HPM H L L H H L H L H L ANT RX LPM H L L L L H H L H L ANT RX HPM H L L H L H H L H L ANT RX RX_ANT_Hi_Gain Lo_Gain L H L L X X L H L H ANT RX RX_ANT_Lo_Gain Lo_Gain L L L L X X L H L H ANT RX Hi_Gain RX_ANT_Lo_Gain L L H L X X L H L H ANT RX RX_ANT_Hi_Gain Hi_Gain L H H L X X L H L H ANT RX FEM Shutdown () L L L L L L L L L L VREF = 0 Notes:. VREF is High for all modes except in shutdown mode. In shutdown mode VREF = 0 V. 6

7 Evaluation Board Description Table 6. Pin Description: Top Pin No. Function Bottom Pin No. Function VDD2_ 2 VDD2_Sense 3 VDD_RX 4 5 VDD_ 6 7 ANTSW 8 9 PAMODE 0 TRSW PA_EN 5 VREF 6 7 LNA_MODE 8 9 LNA2_MODE 20 ANTSW2 Recommended turn on sequence Apply VDD_ and VDD2_ Apply VDD_RX Apply VREF Apply TRSW,2,2 and 22 Apply ANTSW and ANTSW2 Apply PA_EN For HPM Apply PAMOD HI For LPM Apply PAMOD LO For RX HG Apply LNA,2 Mode HI For RX LG Apply LNA,2 Mode LO Apply RF Input not to exceed 0 dbm Turn off in reverse order Table 7. Typical Test Conditions: ANT PIN HPM LPM Function VDD,2_ 3.6 V 3.6 V Battery PA_MODE 3.0 V 0 V Low Power Mode VREF 2.8 V 2.8 V Bias Control PA_EN 3.0 V 3.0 V PA Enable ANTSW,2 H L ANT Select,,22,2 H L H L RX/ Select Figure. Pins on back of Demoboard Table 8. RX Typical Test Conditions: ANT RX PIN HG LG Function VDD_RX 3.3 V 3.3 V Battery LNA_MODE 3.0 V 0 V LNA Control LNA2_MODE 3.0 V 0 V LNA2 Control VREF 2.8 V 2.8 V Bias Control ANTSW,2 X X ANT Select,,22,2 L H L H RX/ Select Notes: VDD_, VDD2_ can be tied together to reduce supply voltages, but VREF needs to be a regulated voltage which is optimized for 2.8 V at VDD of 3.6 V. PA_EN and PAMODE are CMOS compatible pin; however, this can be driven with 3 V0 for logic high. Use jumpers on eval board to set control signal for desired mode of operation. 7

8 Table 9. Eval Board Configuration: Jumper Position Function PA_EN PA_Enable PA_MODE High Power Mode LNAMODE LNA = High Gain LNA2MODE LNA2 = Low Gain Note: There is no shutdown mode for LNA only low gain mode. to ANT Jumper Position Jumper TRSW Path 2 Path ANTSW ANTSW2 ANT Figure 2. Front of Demoboard to Jumper Position Jumper TRSW Path 2 Path ANTSW ANTSW2 ANT to RX & to Jumper Position Jumper TRSW RX 2 ANTSW ANTSW2 8

9 Application Circuit AFEM-S257 VDD_RX R22 00 VCTRL ANTSW LNAMODE VDD_RX C 0. F C2 0 F VDD2_ + C2 47 F Size B JP JP4-7 2 VCTRL PAEN PAMODE LNAMODE LNA2MODE R6 3.3 K R3 3.3 K R2 0K R20 0K JP3 3 2 R9 0K ANTSW2 VCTRL ANTSW R8 0K R7 3.3 K R4 3.3 K C3.0 F VDD_ C5 0. F J SMA-39W J2 SMA-39W J3 SMA-39W RFRX RF RF 9 vdd_tx 8 gnd5 7 rx 6 gnd4 5 4 gnd3 tx 3 gnd2 2 rx2 gnd PAMODE TRSW 2 PAEN VREF 2.8 V vdd2_tx vdd_rx lna_mode antsw antsw2 pa_en pa_mode vref lna2_mode trsw U CoWi Module 5 trsw 6 trsw2 7 gnd6 8 ant 9 gnd7 20 gnd8 2 ant2 22 gnd9 23 trsw2 ANT VDD_RX J4 SMA-39W J5 SMA-39W JP 3 2 VCTRL TRSW R5 3.3 K R2 3.3 K LNA2MODE ANTSW2 C6 0. F Figure 3. Demoboard Schematic Land Pattern TOP VIEW LAND PATTERN Ø SQ Common metal Figure 4. Recommended footprint Add large array of thermal vias under the entire center pad of the module. Via size and precise location are not critical. Thermal vias are filled and then capped with copper. Thicker Via Cu plating and larger number of vias will improve the thermal performance. 9

10 TOP VIEW 7.00 ± ± ±0.075 AVAGO AFEM-S257 PYYWW XXXXX TYPICAL SQ 0.50 P : Manufacturing Site Code YYWW : Build Work Year and Work Week XXXX : Production Lot Code Note: There is no Solder Mask at the bottom layer. There is an oxide layer surrounding the and IO pads. The overlap is 50 m. The oxide thickness ia negligible ( m) and should not be factored in the contactor design. Figure 5. Package dimensions SQ SQ Figure 6. Recommended Soldermask 5.60 TOP VIEW SOLDERMASK RECOMMENDED STENCIL THICKNESS = 4 mils, Stainless Steel, Laser Cut Typical phone board IO pad construction Pad is mask defined Metal pad 0.5mm SQ Mask opening 0.4mm SQ Solder paste stencil 0.3mm SQ with rounded corners R0.05 All corners Figure 7. Recommended Stencil 0

11 Handling and Storage T p Ramp-up t p Critical Zone T L to Tp Temperature T L T smax T smin t L t s Preheat Ramp-down 25 t 25 C to Peak Time Typical SMT Reflow Profile for Maximum Temperature = /-5 C Profile Feature Sn-Pb Solder Pb-Free Solder Average ramp-up rate (TL to TP) 3 C/sec max 3 C/sec max Preheat Temperature Min (Tsmin) Temperature Max (Tsmax) Time (min to max) (ts) 00 C 50 C sec 50 C 200 C sec Tsmax to TL Ramp-up Rate 3 C/sec max Time maintained above: Temperature (TL) Time (TL) 83 C sec 27 C sec Peak temperature (Tp) /-5 C /-5 C Time within 5 C of actual Peak Temperature (Tp) 0-30 sec 0-30 sec Ramp-down Rate 6 C/sec max 6 C/sec max Time 25 C to Peak Temperature 6 min max. 8 min max.

12 Device Orientation REEL USER FEED DIRECTION CARRIER TAPE Avago AFEM-S257 PWWYY XXXX Avago AFEM-S257 PWWYY XXXX Avago AFEM-S257 PWWYY XXXX USER FEED DIRECTION COVER TAPE 5.0 mm TOP VIEW END VIEW 7.0 mm Avago AFEM-S257 PWWYY XXXX Tape Dimensions 8.00 ±0.0 (0.35 ±0.004).50 ±0.0 (0.059 ±0.004) 4.00 ±0.0 (0.57 ±0.004) 2.00 ±0.0 (0.079 ±0.004).75 ±0.0 (0.069 ±0.004) 7.50 ±0.0 (0.295 ±0.004) ( ) ( ) 0.38 ±0.3 (0.025 ±0.0005) 5.33 ±0.0 (0.20 ±0.004) 8 MAX 7 MAX.66 ±0.0 (0.065 ±0.004) 7.40 ±0.0 (0.29 ±0.004) A. K. B. 2

13 Reel Information T Tape Start Slot FRONT VIEW CCD/KEAC MADE IN MALAYSIA 6 PS.5 Min 20.2 Min 330 Max Diameter BACK VIEW SIDE VIEW CCD/KEAC MADE IN MALAYSIA 6 PS W Measured At Hub 3+/ 0.20 Arbor Hole 00+/ 0.50 Hub Dia. Measured At Hub W2 TAPE WIDTH T W W2 W3 6 mm 7 ± Max 5.9 Min Max W3 Measured At Outer Edge 3

14 AFEM-S257 Part Number Ordering Information Part Number Devices Per Container Container AFEM-S257-BLKG 00 Antistatic bag AFEM-S257-TRG Reel AFEM-S257-TR2G Reel For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright Avago Technologies. All rights reserved. AV EN - July 9, 20