ANALYSIS AND SIMULATION OF BUS-CLAMPING PWM TECHNIQUES BASED ON SPACE VECTOR APPROACH

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1 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, 64 7 ANALYSIS AND SIMULAION OF BUS-CLAMPING PWM ECHNIUES BASED ON SPACE VECOR APPROACH M.M.hanuja, Mr.B.Jyothi, Dr.M.Venugopal Rao At.profeor, EEE dept, G.pullaiah College of Engineering, Andhra Pradeh, India, thanuja_9@yahoomail.com At.Profeor, EEE dept, K.L.Univerity, Andhra Pradeh, India, jyo990@gmail.com Profeor, HOD of EEE, K.L Univerity, Andhra Pradeh, India, gmail.com Abtract Conventional pace vector pule width modulation employ conventional witching equence, which divide the ero vector time equally between the two ero tate in every ub cycle.exiting bu-clamping PWM technique employ clamping equence, which ue only one ero tate in a ub cycle. In the preent work a new et of BCPWM dealing with a pecial type of witching equence, termed a double-witching clamping equence, which ue only one ero tate and an active vector repeat twice in a ub cycle, will be propoed. It i hown analytically that the propoed BCPWM technique reult in reduced harmonic ditortion in the line current over CSVPWM a well a exiting BCPWM technique at high modulation indice for given a average witching frequency. hi work deal with Analyi and Simulation of double-witching clamping equence in term of tator flux ripple and line current harmonic ditortion. Simulation i done on v/f controlled Induction Motor drive in MALAB/SIMULINK environment Index erm: Bu clamping pule width modulation (BCPWM),dicontinuou PWM, harmonic ditortion, induction, motor drive,pwm inverter, pace vector PWM, tator flux ripple, witching equence *** INRODUCION Voltage ource inverter fed induction motor are widely ued in variable peed application. he harmonic ditortion in the motor phae current mut be low for atifactory operation of the motor drive. he harmonic ditortion in the current i determined by the witching frequency and PWM echnique i employed. he witching frequency cannot be increaed beyond a certain range due to practical limitation. he ditortion i reduced at a given witching frequency by a good deign of PWM echnique. hi project focue on developing and evaluating new real time PWM technique for voltage ource inverter. SPWM and CSVPWM are very popular real time technique. CSVPWM and HIPWM lead to higher line ide voltage for given dc bu voltage compare to SPWM. hee technique reult in le harmonic ditortion in motor current than SPWM at a given line voltage. Dicontinuou modulation method lead to reduction in ditortion at higher line voltage over a CSVPWM for a given average witching frequency. hi paper propoe high performance HSVPWM, which further reduce the ditortion in the line current over comparable real-time technique at a given average witching frequency. he uperiority in performance of propoed technique i etablihed theoretically a well a experimentally. With SPWM, CSVPWM and HIPWM, every phae witche once in a ub-cycle or half carrier ignal. hi paper explore novel witching equence that witch a phae twice in a ubcycle, while witching econd phae once and clamping the third phae. hi paper bring out all uch poible equence (including two new equence), which reult ame average witching frequency a CSVPWM for a given ampling frequency. he propoed hybrid PWM technique employ the equence which reult in the lowet rm current ripple over given ub cycle, out of given et of equence. Conequently the total rm current ripple over fundamental cycle i reduced IJESA Jan-Feb 0 Available 64

2 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, SWICHING SEUENCES OF INVERER 0 and 7, and employ the witching equence or in a ub cycle in ector I. he condition to be atified by a valid equence in ector I are a follow. ) he active tate and the active tate mut be applied at leat once in a ub cycle. ) Either the ero tate 0 or the ero tate 7 mut be applied at leat once in a ub cycle. Fig.. wo level inverter circuit diagram A three-phae voltage ource inverter ha eight witching tate a hown in Fig.. he two ero tate ( and +++), which hort the motor terminal, produce a voltage vector of ero magnitude a hown in the figure. he other ix tate, or the active tate, produce an active voltage vector each. hee active vector divide the pace vector plane into ix ector and are of equal magnitude a hown. he magnitude are normalied with repect to the dc bu voltage. ) In cae of multiple application of an active tate, the total duration for which the active tate i applied in a ub cycle mut atify (). 4) he total duration for which the ero vector (either uing the ero tate 0 or the ero tate 7) i applied in a ub cycle mut atify (). 5) Only one phae mut witch for a tate tranition. 6) he total number of witching in a ub cycle mut be le than or equal to three. hi enure that the average witching frequency i le than or equal to that of CSVPWM for a given ampling Frequency. Fig.. Inverter tate and voltage vector of three-phae Inverter he ix active pace vector are repreented by the following expreion: () In pace vector-baed PWM, the voltage reference, which i ampled once in every ubcycle, S. Given a ampled reference vector of magnitude VREF and angle α in ector I a hown in Fig., the dwell time of active vector, active vector and ero vector in the ubcycle are given by,, and Z, repectively, in CSVPWM divide Z equally between From the Volt-time balance principle, and given a in V ref * * in in V ref * * in can be () IJESA Jan-Feb 0 Available 65

3 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, MODERN PWM ECHNIUES he modern PWM method can be eparated into two group and thoe are: Continuou PWM(CPWM) method Dicontinuou PWM(DPWM) method In dicontinuou one the modulation wave of a phae ha at leat one egment which i clamped to the poitive or negative dc bu for at mot a total of 0 0 (over a fundamental cycle).where a in continuou PWM there i no clamping in the modulation wave. Fig.. Different poible witching equence in ector I he expreion for the modulation ignal are given a M in V V in dc μ V V dc min μ V V dc max i=a, b, c (4) he election of μ give rie to an infinite number of PWM modulation. o obtain the generalied dicontinuou modulation ignal, μ i given a : Fig.4. PWM Gate ignal when the reference vector itting in ector-i (07) Sequence 7 lead to clamping of R -phae to the poitive dc bu, while equence 0 reult in clamping of B-phae to the negative dc bu. Both equence reult in Y -phae witching twice in a ub cycle. Hence, equence 0 and 7 are termed double-witching clamping equence here. he equence illutrated in Fig. are employed in ector I. he equivalent equence in the other ector are a lited in able I. he PWM gating ignal for the CSVPWM i hown in Fig 4. μ =-[+gn (co (ωt+δ))] () When μ = 0, any one of the phae i clamped to poitive dc bu for 0 0 and then DPWMMAX i obtained. When μ =, any one of the phae i clamped to negative dc bu for 0 0 and then DPWMMIN i obtained. If μ =, then the SVPWM algorithm i obtained. Similarly, the variation of modulation phae angle δ yield to infinite number of DPWM method. If δ = 0, -pi/6, -pi/, then DPWM, DPWM and DPWM can be obtained repectively. he modulation waveform of the different PWM method are a hown in Fig.5. able : Switching Sequence in Six Sector IJESA Jan-Feb 0 Available 66

4 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, BUS-CLAMPING PWM ECHNIUES A popular exiting bu-clamping method clamp every phae during the middle 0 0 duration in every quarter cycle of it fundamental voltage. hi technique, termed a and 0 0 clamp. hi employ equence 7, 7, in the firt half, and 0, 0, in the econd half of ector I a hown in Fig. 6. In Fig. 7(a), every phae i clamped continually for 60 0 duration in every half cycle of the fundamental voltage waveform. hee technique can be termed continual clamping technique. In Fig. 7(b), the 60 0 clamping duration i plit into one interval of width in the firt quarter cycle and another interval of (60 0 -γ) in the next quarter in every half cycle. Since the clamping duration i plit into two interval, thee technique are termed plit clamping PWM technique. Fig. 8(a) and (b) preent average pole voltage waveform that illutrate the two type of clamping for γ= Fig.5.Modulation waveform of the variou PWM method he conventional SVPWM algorithm employ equal diviion of ero voltage vector time within a ampling period or ub cycle. However, by utiliing the freedom of ero tate diviion, variou DPWM method can be generated. GDPWM algorithm, which ue the utiliation of the freedom of ero tate time diviion. In thi propoed method the ero tate time will be hared between two ero tate a 0 for V 0 and 7 for V 7 repectively, and 0, 7 can be expreed a: (5) Fig.7. Exiting bu-clamping PWM technique (a) Continual clamping type (b) plit clamping type. Fig.6.Exiting bu-clamping PWM technique (0 0 clamp). IJESA Jan-Feb 0 Available 67

5 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, 64 7 Fig.8. Average pole voltage over a fundamental cycle for V REF = 0.75 correponding to (a) continual clamping and (b) plit clamping both with γ=45 0. he deign of the inverter phae voltage and common mode voltage for different pule equence are: (6) ag E ag f Speed i varied by varying the frequency; maintain v/f contant to avoid aturation of flux. With contant v/f ratio, motor develop a contant maximum torque. INDUCION MOOR MODELLING Among the variou reference frame, V/F ue the tationary reference frame. Hence, in thi work, the induction motor model i developed in the tationary reference frame, which i alo known a Stanley reference frame. Rotor and tator voltage and their flux linkage are d d vd Rid dt q Liq Lmiqr d q vq Riq d Lid Lmidr dt d dr qr Lriqr Lmiq vdr Rridr r qr dt dr Lridr Lmid d qr vqr Rriqr r dr dt he electromagnetic torque of the induction motor i given by V f e L J dm L J dt P d dt r he Electromechanical equation of induction drive i given by P e diq i q d Fig.9.Simulated Phae and line voltage waveform of the two level inverter VOLS/HZ CONROL ECHNIUE: hi i the mot popular method of Speed control becaue of implicity. he Flux and orque are alo function of frequency and voltage repectively the magnitude variation of control variable only. he air gap voltage of induction motor i Fig.0. Speed and orque characteritic with repect to time IJESA Jan-Feb 0 Available 68

6 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, 64 7 IJESA Jan-Feb 0 Available 69 Fig.. Block diagram of V/F controlled BCPWM baed IM drive 5. ANALYSIS OF HARMONIC DISORION he generalied tator q-axi and d-axi flux ripple are a hown below. = [co (α) Vref] * = [co (60 α) Vref] * Z = Vref*Z D = in (α)*. Expreion for RMS Stator Flux Ripple: he rm Stator flux ripple different equence employed and their repective vector diagram of d-axi and q-axi ripple hown in Fig. (7a) (7b) (7c) (7d) (7e) D F 07 D F 0 D F 7 D F 0 D F 7

7 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, 64 7 No-Load Current HD γ=0 0 γ=45 0 continual clamping.9%.46% Split Clamping.66%.04% Fig.. Comparion of rm tator flux ripple due to CS- 07, S-0, S-7, S-0, S4-7, S5-0 and S6-7 at different modulation indice. A. Analyi of Exiting BCPWM echnique: Fig..Stator flux ripple vector over a ubcycle for equence (a) 07, (b) 0, (c) 7, (d) 0 and (e) 7. Sequence 0 lead to le RMS current ripple over a ubcycle than 7 in the firt half of the ector, and vice vera in the econd half of the ector. F 0 (α) < F 7 (α), 0 0 < α < 0 0 (8a) F 0 (α) > F 7 (α), 0 0 < α < 60 0 (8b) F 0 (α) = F 7 ( α) (9) IJESA Jan-Feb 0 Available 70

8 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, 64 7 B. Analyi of Propoed BCPWM echnique: F 0 (α) < F 7 (α), 0 0 < α < 0 0 F 0 (α) > F 7 (α), 0 0 < α < 60 0 (0a) (0b) F 0 (α) = F 7 ( α) () able : Meaured Value of I HD for Propoed BCPWM Fig.4.Meaured no-load current waveform at V REF =0.85 for Exiting BCPWM technique. No-Load Current HD γ=0 0 γ =45 0 continual clamping 5.% 4.7% Split Clamping 4.6% 5.0% able : Meaured Value of I HD for Exiting BCPWM 6. INVERER SWICHING LOSSES hi ection preent a comparion of inverter witching loe due to CSVPWM, exiting BCPWM technique. he witching energy lo in a ubcycle in an inverter leg i proportional to the phae current and the number of witching of the phae (n) in the given ubcycle. he normalied witching energy lo per ubcycle (E SUB ) in an inverter leg i defined in (a), where i i the fundamental phae current, I m i the peak phae fundamental current and Φ i the line-ide power factor angle. E SUB n i n inωt Φ (a) I m Π Π E SUBAV ESUBdt (b) 0 Fig.6. Variation of normalied witching lo E SUB over a fundamental cycle for CSVPWM. Fig.5.Meaured no-load current waveform at V REF =0.85 for Propoed BCPWM technique. IJESA Jan-Feb 0 Available 7

9 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, 64 7 ditortion. In term of witching loe, continual clamping i better at high power factor, while plit clamping i uperior at low power factor. REFERENCES [] Advanced Bu-Clamping PWM echnique Baed on Space Vector Approach G. Narayanan, Member, IEEE, Harih K. Krihnamurthy, Di Zhao, and Rajapandian Ayyanar, Member, IEEE,006. (a) (b) [] J. Holt, Pule width modulation A urvey, IEEE ran Ind. Electron., vol. 9, no. 5, pp , Dec. 99. [] J. Holt, Pule width modulation for electronic power converion, Proc. IEEE, vol. 8, no. 8, pp. 94 4, Aug [4] D. G. Holme and. A. Lipo, Pule Width Modulation for Power Converter: Principle and Practice. New York: Wiley, 00. (c) (d) Fig. 7. Variation of normalied witching lo E SUB over a fundamental cycle for Exiting BCPWM technique. Average Switching Lo for CSVPWM = able 4: Meaured Value of Average Switching Lo 7. CONCLUSION A cla of bu-clamping PWM (BCPWM) technique, which employ only the double-witching clamping equence, i propoed. he propoed BCPWM technique are tudied, and are compared againt conventional pace vector PWM (CSVPWM) and exiting BCPWM technique at a given average witching frequency. he propoed familie of BCPWM technique reult in le line current ditortion than CSVPWM and the exiting BCPWM technique at high line voltage cloe to the highet line ide voltage during linear modulation. he analyi preented explain the difference in ditortion due to the different technique. he tudy claifie both the exiting BCPWM and the propoed BCPWM technique into two categorie, namely continual clamping method and plit clamping method, depending on the type of clamping adopted. It i hown that plit clamping method are better than continual clamping one in term of line current [5] V. Blako, Analyi of a hybrid PWM baed on modified pace-vector and triangle-comparion method, IEEE ran. Ind. Appl., vol., no., pp , May/Jun [6] D. Zhao, G. Narayanan, and R. Ayyanar, Switching lo characteritic of equence involving active tate diviion pace vector baed PWM, in Proc. IEEE APEC 04, 004, pp BIOGRAPHIES M.anuja She received B.ech from JNU, Hyderabad M.tech from JNU Hyderabad in 00And 009.Preently working a an At Profeor in G.Pullaiah college of engineering& echnology.her interet focu on Power Electronic,power electronic drive and power ytem B.Jyothi received the B.tech degree from S.K.Univerity,Anathapur in 00,M.tech Degree from JNU Hyderabad in 008.She i currently puruing Phd at Acharya nagarjuna univerity,guntur,working a an At Profeor in KL univerity,guntur,ap Her interet focu on Power IJESA Jan-Feb 0 Available 7

10 M.HANUJA* et al. ISSN: [IJESA] INERNAIONAL JOURNAL OF ENGINEERING SCIENCE & ADVANCED ECHNOLOGY Volume -, Iue -, 64 7 Electronic,power electronic drive and Electrical machine. Dr.Venu Gopala Rao.M, at preent i Profeor & Head, department of Electrical & Electronic Engineering, K L Univerity, Guntur, Andhra Pradeh, India. He received B.E. degree in Electrical and Electronic Engineering from Gulbarga Univerity in 996, M.E (Electrical Power Engineering) from M S Univerity, Baroda, India in 999, M.ech (Computer Science) from JN Univerity, Hyderabad, India in 004 and Doctoral Degree in Electrical & Electronic Engineering from J N Univerity, Hyderabad, India in 009. He i Fellow of he Intitute of Engineer (India), Life Member of Solar Energy Society of India and Member in IEEE profeional ociety. He publihed more than 5 paper in variou National, International Conference and Journal. Hi reearch interet accumulate in the area of Power uality, Ditribution Sytem, High Voltage Engineering and Electrical Machine. IJESA Jan-Feb 0 Available 7