FEATURE extraction is a fundamental task in vision systems

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1 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 12, NO. 6, NOVEBER Image Pocessing by a Pogammable Gid Compising Quantum Dots and emistos Yalcin Yilmaz and Pinaki azumde, Fellow, IEEE Abstact Real-time vision systems equie computationally intensive tasks which often benefit geatly fom fast and accuate featue extactions. Resistive gid-based analog stuctues have been shown to pefom these tasks with high accuacy and added advantages of compact aea, noise immunity, and lowe powe consumption compaed to thei digital countepats. Howeve, these ae static stuctues and can only pefom one type of image pocessing task. In this pape, an analog pogammable memistive gid-based achitectue capable of pefoming vaious eal-time image pocessing tasks such as edge and line detections is pesented. The unit cell stuctue employs 3-D confined esonant tunneling diodes that ae called quantum dots in this pape fo signal amplification and latching, and these dots ae inteconnected between neighboing cells though nonvolatile continuously vaiable esistive elements that ae moe populaly known as memistos. A method to pogam memistive connections is intoduced and veified though cicuit simulations. Vaious diffusion chaacteistics, edge detection, and line detection tasks have been demonstated though simulations using a 2-D aay of the poposed cell stuctue and analytical models have been povided. Index Tems Cellula neual netwoks, image pocessing, memistos, esonant tunneling devices RTDs. I. INTRODUCTION FEATURE extaction is a fundamental task in vision systems as extacted featues povide bases fo coelation. In digital geneal pupose pocessos, many image pocessing applications equie an immense numbe of opeations pe second, albeit these applications do not equie floating point accuacy [11]. Use of fast, simple, and elatively accuate extaction systems in vision machines diectly educes the pocessing time and equied iteations. The main pocesso element can theeby ely on the educed dataset that povides quality infomation on the extacted featues fo decision making. Inheent paallel pocessing capabilities of cellula nonlinea netwok CNN-based achitectues make them an efficient platfom fo vaious image pocessing tasks [1], [2]. Real-time opeation povides fast pocessing times, and local connections povide simplicity, scalability, and powe efficiency fo VLSI implementations [15]. Theefoe, much effot has been put into anuscipt eceived Decembe 14, 2012; evised ach 25, 2013; accepted ay 1, Date of publication ay 15, 2013; date of cuent vesion Novembe 6, This wok was suppoted in pat by the National Science Foundation unde Gant CCF The eview of this pape was aanged by Associate Edito. R. Stan. The authos ae with the Depatment of Electical Engineeing and Compute Science, Univesity of ichigan, Ann Abo, I USA yalciny@umich.edu; mazum@eecs.umich.edu. Colo vesions of one o moe of the figues in this pape ae available online at Digital Object Identifie /TNANO developing novel methods and finding adequate CNN templates to pefom detail extaction tasks in vision systems, such as edge detection [16] [18] which benefit geatly fom immense paallelism and computational efficiency. Resistive gid-based achitectues ae shown to povide simple yet efficient ways to pefom many image pocessing tasks and motion detection, and they ae simple foms of CNNs [1]. Additional advantages including compact aea, noise immunity, and lowe powe consumption compaed to digital computation stuctues, make them attactive fo eseaches. They ae also elatively insensitive to mismatches in component values in VLSI chips [12]. Howeve, most of the esistive gidbased achitectues in the liteatue ae static application specific stuctues and do not have the functional flexibility of thei digital countepats. Theefoe, novel methods and devices should be intoduced in these achitectues to achieve functional vesatility. Resonant tunneling diodes RTDs have been employed in many applications including vaious CNN achitectues due to thei negative diffeential esistance NDR and fast switching chaacteistics. In [9], RTDs have been intoduced as vaiable esistos to intoduce vesatility and compactness to CNN unit cells. In [10], a CNN achitectue employing RTDs is investigated fo its opeation and it is shown that RTDs suppot fast settling times fo vaious image pocessing applications. emistos have ecently attacted significant attention in vaious applications afte Hewlett Packad eseach labs evealed that memistance can be obseved in nanoscale thin film devices [6]. The significance of these devices aises fom the fact that they can etain thei esistive state even when powe is tuned OFF, displaying nonvolatility and they might enable scaling beyond COS technology limits. The vaiable esistance chaacteistics of these devices ae poposed to be utilized in ultadense cossba memoies [13], configuable logic applications, and as synaptic connections in neuomophic achitectues [14]. They have also been used fo caying out image pocessing tasks which benefit fom thei nonlineaity and adaptive chaacteistics [19]. ost of these applications could benefit fom the use of memistos moe if these devices show popeties of longtem stability of esistive states and little o no degadation of these states when the values stoed in these devices ae ead. Fabication esults epoted in [22] indicate the obsevation of diode-like behavio in amophous Silicon a-si devices which ae undistubed when the voltages acoss the devices ae below a cetain theshold and can etain thei states moe than 4 yeas at oom tempeatue. In this pape, a memistive gid-based achitectue which impoves the velocity tuned filte achitectue poposed by ou X 2013 IEEE

2 880 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 12, NO. 6, NOVEBER 2013 goup [4] is pesented. It is demonstated that when memistive connections ae incopoated, vaious diffusion chaacteistics ae obtained, and the poposed achitectue can be pogammed fo diffeent image pocessing applications such as edge detection and line detection poviding flexible analog pocessing envionment that can pefom vaious tasks. In addition RTDs ae utilized to povide high speed signal detection and amplification. A method to pogam memistive connections in fou diections is also poposed and demonstated. In Section II, infomation on RTDs and memistos ae povided and the poposed unit cell stuctue is intoduced. In Section III, a method to pogam memistive connections in aay configuation is demonstated. Analytical bases fo edge detection and line detection opeations ae povided in Section IV, and simulations veifying these opeations ae pesented in Section V. II. PROPOSED ARCHITECTURE A. emisto odel emisto is the fouth fundamental cicuit element which elates chage with magnetic flux as descibed by Chua in [20]. HP eseach labs evealed in [6] that two teminal thin-filmbased devices can exhibit memistive behavio. As laid out in [6], these devices can be modeled as a combination of two seies vaiable esistos, with one of the esistos having a high-dopant concentation, thus having low esistance and the othe having a low-dopant concentation, thus having high esistance. Application of a voltage acoss the teminals of the memistive device tigges dopant dift. Depending on the voltage polaity, the width of the doped egion can incease o decease. As the width of the doped egion inceases, conductance inceases and as it deceases, conductance deceases. Theefoe, the total esistance of the memisto can be expessed as R = w D R ON + 1 w R OFF 1 D whee w is the width of the doped egion, D is the total length of the thin film, R ON is the lowest esistance when w = D, and R OFF is the highest esistance when w =0. When the cuent is passed though the device, the width of the doped egion, w changes. The ate of change of w with time is dwt dt R ON = μ v it 2 D whee μ v is the dopant mobility and it is the cuent passing though the device. The above model pesented by HP labs is a linea model and does not account fo the nonlineaities that ae pesent in most fabicated devices due to second-ode bounday effects seen at thin film edges. The movement of the bounday between doped and undoped egions is geatly hindeed when the width of the doped egion appoaches device limits i.e., w = 0o w = D [21]. Afte including the bounday effects, the model Fig. 1. RTD I V cuve. The ed line coesponds to the bias level. The intesections of the two lines epesent the stable opeating points. expession becomes dwt dt R ON = μ v itfx 3 D whee fx is the window function modeling the nonlinea dopant dift. This function is an estimation of nonlineaity and depends on the specific device behavio. A sample function is povided in [21]. The actual switching chaacteistics, namely switching delay, of memistos depend on mateial popeties, device dimensions, and biasing voltage. In the poposed achitectue, memistive connections based on this model ae adopted to povide pogammability fo the ealization of diffeent chaacteistics including isotopic, anisotopic symmetical, and asymmetical diffusion in gid achitectue giving way to vaious spatiotempoal filte implementations. A SPICE model [7] based on this memisto model is adapted to cay out cicuit simulations. B. Resonant Tunneling Diode odel and Biasing RTDs have been employed in many cicuit applications utilizing thei fundamental chaacteistic of NDR. NDR implies that fo cetain ange, the incease in applied voltage acoss an NDR device will esult in deceased cuent though it, indicating inceased esistance with inceased voltage. RTD conductance is detemined by two mechanisms: the fist mechanism is esonant tunneling, which povides the NDR chaacteistic, and the othe mechanism is diode conduction. The NDR popety of the RTD I-V chaacteistics is shown in Fig. 1 utilizing the physics-based model laid out in [8]. The RTD cuent J RTD V is given by qm ktγ 1+e E F E +n 1 qv/2/kt J 1 V = 4π 2 3 in 1+e E F E n 1 qv/2/kt π 2 + actan E n 1 qv/2 4 Γ/2

3 YILAZ AND AZUDER: IAGE PROCESSING BY A PROGRAABLE GRID COPRISING QUANTU DOTS AND ERISTORS 881 J 2 V =H e n 2 qv/kt 1 5 J RTD V =J 1 V +J 2 V 6 whee J 1 V is the cuent due to esonant tunneling and J 2 V is the diode conduction cuent. E F is the Femi enegy, E is the esonant level enegy, Γ is the esonant width, n 1 and n 2 ae empiical model paametes. q, m, k, T, ae electon chage, effective mass, Boltzmann constant, absolute tempeatue, and educed Planck constant, espectively. V is the voltage acoss the device. The main advantage of the NDR chaacteistic becomes appaent when RTD is biased with a static cuent souce. If cuent magnitude of the souce is selected such that it intesects RTD I-V cuve in thee places as shown in Fig. 1, two stable voltage points ae obtained. This esult indicates that fo the same amount of cuent passing though RTD, the voltage acoss it can take two stable values which coespond to the lowest and highest voltage intesection points. RTD does not stabilize in the middle intesection point, since any small distubance causes it to switch to one of the oute intesection points. The bistable chaacteistic of this stuctue can be utilized to build voltage level detectos since any voltage below switching theshold esults in stabilizing in the low state, and any voltage above theshold esults in stabilizing in high state. RTD switching theshold can be appoximated as V th RTD = V peak + V valley 7 2 whee V peak and V valley ae the peak and the valley voltages of the RTD, espectively. When used in the detection mode, as the system stats all the RTDs ae biased to the low-voltage state, and a contolled distubance towad a highe voltage esults in the RTDs stabilizing at the highe stable level, allowing the detection and locking of the signal state. C. Unit Cell Stuctue Fig. 2a shows the poposed unit cell stuctue. It is composed of memistos to povide esistive connections to neighboing cells, diodes to intoduce unidiectionality to these connections, and RTDs to detect and latch signal levels. The poposed cell has an input node denoted by I n,m, a cente node C n,m, and an output node O n,m. The input is diven by voltage signals that coespond to the pixel intensity level which can be geneated by a photodetecto. Fou memistos ae connected to the cente nodes of the unit cell and its neighbos, making the cente node voltage a function of the cente node voltages of the neighboing cells. Resistances of memisto connections detemine how much neighbos cente voltages contibute to the cente voltage of the cell. Seies diodes allow cuent in one diection sepaating how outputs of the two neighboing cells affect each othe. The output node is isolated fom the cente node by a diode poviding a voltage baie equal to the diode theshold. RTDs enable detection and latching of output signals. When biased with a cuent souce, RTDs initially settle at the lowe stable voltage. When the volt- Fig. 2. a Poposed memistive cell. b Top view of the memistive pocessing aay. A unit cell is highlighted in ed. Red and geen lines denote pogamming connections to access tansistos. age level on the cente node goes above detection theshold, RTDs settle at the highe stable voltage. Two stable states povide a binay output. The detection theshold is equal to the sum of the diode theshold and the switching theshold of the RTD. Fig. 2b shows unit cells connected in a 2-D aay fashion. A top view fo a 4 4 sample pocessing aay is povided to show the neighboing connections. The unit cell shown in Fig. 2a is highlighted in ed. In ode to pogam cetain functionalities in the aay, the memisto esistances need to be alteed. The Geen lines in Fig. 2b indicate the pogamming connections to the cells. Each geen connection denotes pogamming-enable signal and voltage dive connections. Access tansistos ae used to isolate the connections duing nomal aay opeations. Pogamming connections can also be made to shae the same connections as cell inputs, thus educing numbe of access tansistos if the input esistances ae designed to be small at the expense of inceased pogamming time o inceased pogamming voltages due to voltage dop acoss the input esisto. Connections shown in ed and blue as well as access tansistos ae needed duing cell ease to bypass evese-biased diodes. Duing ease opeation voltage polaity acoss the memisto is evesed. III. PROGRAING ERISTIVE CONNECTIONS To be able to implement diffeent pocessing tasks in the same aay, we need a pocedue to pogam the esistances of the memistive connections. Fig. 3 shows the pogamming flow fo an N N aay. Pogamming is pefomed in fou diections left-to-ight, ight-toleft, top-to-bottom, and bottom-to-top one diection at a time. Pogamming of the whole aay is completed in fou passes acoss the aay in diffeent diections to change the esistances of memistos in these diections. While a pass is being made in one diection, the esistances ae set in a column by column fashion. Pogamming in this fashion educes the total equied time significantly compaed to pogamming evey memistos in the aay individually. The duation and voltage amplitude of

4 882 Fig. 3. IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 12, NO. 6, NOVEBER 2013 Aay pogamming flow. Fig. 5. Pogamming in one diection in a 4 4 aay. a Pogamming voltages. b emisto esistances in the same ow. Fig. 4. Pogamming in one diection. The geen lines indicate the low-voltage level 0 V; othe colos indicate alteed high voltage levels. The diffeent colos of memistos indicate diffeent final esistances. a Aay in initial state. b Pogamming stated in left to ight diection. c Pogamming of fist column of memistos completed in left to ight diection. d Pogamming of all memistos completed in left to ight diection. e Pogamming of fist column of memistos completed in ight to left diection. f emisto aay afte all memistos ae pogammed in all diections. the wite pulses detemine the esistance to be stoed in memistos. Within one diection, same voltage amplitudes and pulse duations ae used. Howeve, pulse chaacteistics can be changed in diffeent diections to pogam diffeent esistances, hence to pogam diffeent functionalities to the aay. A sample pogamming opeation in the left to ight diection is shown in Fig. 4. All the memistos in the aay ae initially at the low-esistance state. The pogamming begins by setting the fist column wite voltage to high indicated with a ed line and the emaining columns indicated with a geen line to low 0 V in ou implementation. In this configuation the fist column of memistive connections obseve a nonzeo voltage diffeence acoss, wheeas the emaining connections obseve zeo-voltage diffeence. In the fist column, only half of the memistive connections ae pogammed due to the fact that half of the seies diodes ae fowad-biased conducting high cuents, and the othe half ae evese biased. Once the esistances of the fist column memistos each the desied level, the second column wite voltage is set to high, making the voltage diffeence acoss these memistos zeo, thus stopping thei pogamming. The ise of the voltage levels on the second column in tun causes the voltage diffeence acoss the next column memistos to be nonzeo. Once these memistos each the desied esistance, the next column s voltage is aised. This pocess is epeated until all the memistos in the selected diection ae pogammed. When pogamming in the selected diection is completed, anothe diection is selected and the same pocess is epeated in this new diection. The use of diffeent voltages o change of voltage aise-duations esult in pogamming of diffeent esistances in this diection. In Fig. 5a, sample left-to-ight diection pogamming voltages to the memisto aay ae shown. As descibed ealie, wite voltages ae applied pe column basis. Voltage levels ae inceased with same time intevals. Fig. 5b shows how the esistances of the memistive connections change. The pogamming scheme succeeds in tuning all the memistos in the same diection to the same esistive state. In ode fo ou poposed method to be feasible, two citical equiements must be met: the fist equiement is that memistos should be able to be pogammed even when thee is a fowad-biased diode connected in seies. The second equiement is that the esistive state of the memisto should not change o should change negligibly when thee is a evese-biased diode connected in seies.

5 YILAZ AND AZUDER: IAGE PROCESSING BY A PROGRAABLE GRID COPRISING QUANTU DOTS AND ERISTORS 883 Fig. 7. Poposed cicuity in 1D case. Fig. 6. emistive connections unde diffeent bias conditions. Fig. 6 shows effect of having a seies diode with memisto while pefoming a pogamming opeation. The esults indicate that having a fowad-biased seies diode with memisto causes the memisto to be pogammed to a lowe esistance than when pogammed with no seies diode. This eduction in esistance can be compensated fo by inceasing pogamming time o voltage amplitude. This esult indicates that it is still possible to pogam memistive connections with seies esistance. A seies evese-biased diode causes no significant change in the esistance of the memisto duing pogamming, effectively shielding it fom the high voltage bias. This popety enables pogamming connections in opposite diections possible, which is cucial in ou poposed scheme. IV. ANALYTICAL ODELING A. Edge Detection Edge detection povides physical infomation about object boundaies in pocessed images and is a fundamental featue extaction task in vision systems. An edge is located at the tansition points between two diffeent intensity levels. The memistive gid povides diffusion chaacteistics that can be adjusted by contolling the esistances. These chaacteistics combined togethe with bistable RTD biasing can be used to implement vaious image pocessing tasks including edge detection. When all the memistos ae pogammed to the same esistance, the gid shows symmetic diffusion popeties that can be applied to detect edges o contous of an input image. An edge exists wheneve a low input is neighboed by a high input, since an edge is defined whee the discontinuity between the input voltages occu. A simplified analysis on 1-D connection see Fig. 7 is caied out to show that this stuctue can be used fo edge detection. In the figue, I n,m is the input voltage level, C n,m is the cente node voltage level, and O n,m is the output voltage level fo the nth node. We assume that thee is an edge between inputs I n,m and I n+1,m. Thus, I n,m and input befoe it ae high and I n+1,m and inputs afte it ae low 0 V fo this analysis puposes. We stat ou analysis by applying Kichoff s Cuent law to nodes C n,m and C n+1,m to obtain the node voltages. Initially, the effects of the neaest neighbohood ae ignoed I n,m C n,m = C n,m C n+1,m + C n,m R RTD1 8 whee is the input esistance, is the esistance of the memisto, R RTD1 is the effective esistance of cente node RTD, and C n,m R RTD1 indicates cuent though RTD. The cuent banch though the diode to the output nodes is also ignoed, since the diode cuent is ode of magnitude less until the cente node voltage eaches the switching theshold at the output node. When the RTD cuent equation is inseted, the equation becomes In,m C n,m Cn,m C n+1,m + qm ktγ 4π 2 3 = ln 1+e E F E +n 1 q C n,m /2 kt 1+e E F E +n 1 q C n,m /2 kt π 2 + actan E n 1 qc n,m /2 Γ/2 + H e n 2 qc n,m /kt 1. 9 Similaly, at node C n+1,m : C n,m C n+1,m C n,m C n+1,m + qm ktγ 4π 2 3 = C n+1,m + C n+1,m R RTD2 10 = C n+1,m 1+e E F E +n 1 q C n +1,m /2 kt ln 1+e E F E +n 1 q C n +1,m /2 kt π 2 + actan E n 1 qc n+1,m /2 Γ/2 + H e n 2 qc n,m /kt 1. 11

6 884 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 12, NO. 6, NOVEBER 2013 R RTD2 is the effective esistance of output node RTD. Equations 8 and 9 can be evaluated numeically to obtain the intemediate node voltages C n,m and C n+1,m. Designing what these voltages will be is essential to obtain edge detection functionality. When thee is an edge, the cente node voltage C n,m should ise to distub the detection node RTD. Paametes should be picked such that C n,m > V theshold when I n,m = V high C n+1,m <V theshold when I n+1,m = V low 0 V V theshold = V d + V RTD whee V d is the diode theshold, and V RTD is the switching theshold of the RTD. In this way, the output O n,m will switch to high stable point, indicating thee is an edge and O n+1,m will emain at low stable point. If the effects of the neaing neigbos ae consideed, one can see that since I n+2,m is also low, the actual voltage on the node C n+1,m will be lowe than the above calculated value, hence not violating the condition C n+1,m <V theshold, but instead futhe helping to meet it. Similaly, I n+1,m helps node C n,m to be highe than V theshold. In 2-D case, the state equation of the diffusion cicuity can be obtained as I n,m C n,m whee + C n+1,m C n,m + C n 1,m C n,m + C n,m+1 C n,m + C n,m 1 C n,m I RTD = c ds n,m dt 12 I RTD = C n,m 13 R RTD and c is the paasitic capacitance of the RTD. Assuming RTD has a finite esistance, eplacing 12 in 11 I n,m = C n,m = R RTD C n 1,m +C n,m 1 + C n+1,m + C n,m+1 +c dc n,m dt Taking Fouie tansfom, the tansfe function is H f m,f n,f t = S f m,f n,f t E f m,f n,f t = R RTD 2 cos 2πf m +cos2πf n + c2πif t 14 As the RTD I V cuve indicates, it acts as a positive vaiable esisto, indicating that the eal pat of the denominato of the tansfe function is always positive. B. Line Detection Intoducing anisotopy in the vetical and hoizontal diections in the memistive gid allows the implementation of line detection. In ode to detect lines, the cente node voltages should be made a weake function of the neighboing cells cente node voltages in one diection and a stonge function in the othe. Fo example, high esistance in the vetical, and low esistance in the hoizontal diection limits the effects of the neighboing cells in the vetical diection and enables diffusion in the hoizontal diection, which means the detection of lines in the hoizontal diection. Low esistance in the vetical and high esistance in the hoizontal diection limits the effects of the neighboing cells in the hoizontal diection and enables diffusion in the vetical diection, which means the detection of vetical lines. In this case, the diffusion netwok state equation becomes I n,m = C n,m 1+ 2 high + 2 low + R RTD C n 1,m + C n+1,m high C n,m 1 + C n,m+1 +c dc n,m 16 low dt whee high is the esistance of the memisto when pogammed to high, and low is the esistance of the memisto when pogammed to low. The state equation is symmetical fo vetical and hoizontal line detection cases. V. SIULATION RESULTS Simulation esults veifying vaious diffusion configuations and demonstating edge detection and line detection opeations ae pesented in this section. Simulations ae caied out on a aay. RTDs based on device chaacteistics shown in Fig. 1 as well as the memisto model fom [7] ae used. Simulations ae caied out with nominal paametes to povide poof of concept. Howeve, studies caied out in [12] show that esistive gid-based achitectues ae vaiation toleant and can opeate with nonoptimal values. Theefoe, ou poposed achitectue is expected to be vaiation toleant. Fo example, fo the edge detection case, this toleance depends on how much magin is left between the designed high/low voltages and the theshold. The poposed memistive gid can suppot the diffeent diffusion chaacteistics mentioned above. These chaacteistics ae impotant in many image pocessing applications. Anisotopic diffusion can be used fo edge extaction applications [5], anisotopic symmetical diffusion chaacteistics can be used fo line detection, and anisotopic asymmetical diffusion chaacteistics can be used fo motion detection [3]. Fig. 8 shows diffusion chaacteistics that can be ealized in ou poposed achitectue. When all the memistos ae pogammed to the same esistance, isotopic diffusion [see Fig. 8b] is obtained. When hoizontal memistos ae pogammed to low and vetical ones ae pogammed to high esistance, anisotopic symmetical diffusion in hoizontal diection [see Fig. 8c] is obtained. When the esistances of the hoizontal and vetical memistos ae pogammed evese with espect to the pevious case, anisotopic symmetical diffusion in vetical diection [see Fig. 8d] is achieved. Finally, when all

7 YILAZ AND AZUDER: IAGE PROCESSING BY A PROGRAABLE GRID COPRISING QUANTU DOTS AND ERISTORS 885 Fig. 8. Vaious diffusion chaacteistics that can be implemented in poposed achitectue. a Input. b Isotopic Diffusion. c Anisotopic symmetical diffusion in hoizontal diection. d Anisotopic symmetical diffusion in vetical diection. e Anisotopic asymmetical diffusion. Fig. 10. a Edge detection sample 2 with egula edges b Output at 2.5 ns c Output at 100 ns. Fig. 9. a Edge detection sample input with iegula edges b Output esult. esistances ae pogammed to diffeent esistances, anisotopic asymmetical diffusion [see Fig. 8e] is achieved. These chaacteistics o combinations of them can be utilized to pefom vaious vision tasks. A. Edge Detection Edge detection simulations ae caied out on two types of input images: fist, with iegula edges and intemediate pixel intensity values aound the edges shown in Fig. 9; second, with egula edges and maximum pixel intensity diffeence aound the edges shown in Fig. 10. In edge detection mode, the poposed achitectue is initiated with high and low input values coesponding to black and white pixels with scaled voltages in between coesponding to shades of gay. When the fist input type shown in Fig. 9a is applied to the aay, the edge patten shown in Fig. 9b is obseved at the O n,m nodes of the achitectue. In Fig. 9b, black lines coespond to high RTD voltage level and white lines coespond to low RTD voltage level on O n,m nodes. The esults of the above simulation suggest that edges ae extacted with elative accuacy. In the egions with thicknesses of a few pixels o whee the bodes include shades of gay, discontinuities o jumps in the bode lines ae obseved. Howeve, the quality of the esults can be impoved by fine tuning gid esistance as well as RTD design paametes. The second set of sample filteing is povided in Fig. 10a c. The second type of image contains a cicle with lage continuous aeas of the same colo pixels. In this image, thee is no egion with seveal pixels thickness except the oute line due to finite numbe of pixels available to epesent a cicle. The achitectue is able to clealy outline the edges without any discontinuities. Although the speed of opeation can be tuned by scaling the cuent capabilities of the active devices, the above simulation shows that the esults obtained afte 2.5 ns into the opeation ae almost exactly the same as the esults obtained afte 100 ns. Simulations on memistos using the model povided in [7] indicated that a ead pulse of 100 ns duation and 2-V amplitude does not change the esistance of the memisto detectably, and a wite pocess to the memisto usually takes in the ange of a few seconds depending on the esistance to be encoded. Theefoe, the achitectue can pefom the tuned opeation epeatedly without detectably alteing the tuning, thus minimizing effectively eliminating the need fo a efesh opeation. The effect of component mismatch is moe significant in input esistos i.e., vetical esistos compaed to gid esistos i.e., hoizontal esistos [12]. A set of simulation esults ae listed in Fig. 11a f, showing how the vaiation in input esistance changes edge detection esults. Simulation esults indicate that edges ae detected less accuately when the input esistance deviates fom the optimum value obtained though simulations. Exact esistance values depend on vaious cicuit and device paametes such as voltage levels used, RTD and diode cuent chaacteistics. Theefoe, the esistance vaiation is pesented in pecentages. Edge detection quality diectly depends on the vaiation of the input esistance mainly due to two factos. The fist facto is that input esistance changes the spatial fequency tuning of the achitectue making it less sensitive to edges. The second facto is that lage input esistances cause input voltage dops, thus putting the achitectue off the opeating egion.

8 886 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 12, NO. 6, NOVEBER 2013 povided to veify functionality. The simulation data establish that the poposed achitectual configuation incopoating pogammable analog esistive elements can be eused to pefom a wide gamut of image pocessing functions at extemely high speeds. REFERENCES Fig. 11. Edge detection esults with input esistance vaiation. a 50% esistance. b 75% esistance. c 100% esistance nominal case. d 500% esistance. e 1000% esistance. f 2000% esistance. Fig. 12. a Line detection sample input. b Hoizontal line detection. c Vetical line detection. B. Line Detection Fig. 12 shows line detection esults. The plotted esults ae obtained 500 ns afte system initialization. When the image in Fig. 9a is consideed, if we assume the black pixels epesent the high voltages and white pixels epesent the low voltages, the diffusion fom high voltages to low voltages will esult in the low voltages inceasing and stabilizing at the highe voltage level. The esults pesented in Fig. 12 ae inveted to clealy show the detected lines. VI. CONCLUSION An analog gid-based achitectue incopoating memisto connections fo pogammability and RTDs fo signal detection and latching is evealed. The achitectue can be pogammed to pefom vaious image pocessing tasks. A method to change the esistive state of the memistos in an aay configuation is also povided and demonstated though cicuit simulations. Analytical models chaacteizing edge detection and line detection configuations ae discussed and simulation esults ae [1] B. E. Shi and L. O. Chua, Resistive gid image filteing: input/output analysis via the CNN famewok, IEEE Tans. Cicuits Syst. I, Fundam. Theoy Appl., vol. 39, no. 7, pp , Jul [2] P. Kinget and. S. J. Steyaet, A pogammable analog cellula neual netwok COS chip fo high speed image pocessing, IEEE J. Solid- State Cicuits, vol. 30, no. 3, pp , a [3] A. B. Toalba, Analogue achitectues fo vision cellula neual netwoks and neuomophic cicuits, Ph.D. dissetation, Dept. Elect. Eng, Genoble Inst. Technol., Genoble, Fance, [4] W. H. Lee and P. azumde, otion detection by quantum-dots-based velocity-tuned filte, IEEE Tans. Nanotechnol., vol. 7, no. 3, pp , ay [5] P. Peona and J. alik, Scale-space and edge detection using anisotopic diffusion, IEEE Tans. Patten Anal. ach. Intell., vol. 12, no. 7, pp , Jul [6] D. B. Stukov, G. S. Snide, D. R. Stewat, and R. S. Williams, The missing memisto found, Natue, vol. 453, pp , ay [7] Z. Biolek, D. Biolek, and V. Biolkova, SPICE model of memisto with nonlinea dopant dift, Radioengineeing, vol. 18, pp , June [8] J. N. Schulman, H. J. D. L. Santos, and D. H. Chow, Physics based RTD cuent voltage equation, IEEE Electon Device Lett., vol. 17, no. 5, pp , ay [9]. Hanggi and L. O. Chua, Cellula neual netwoks based on esonant tunneling diodes, Int. J. Cicuit Theoy Appl., vol. 29,no.5,pp , Sep./Oct [10] P. azumde, S. R. Li, and I. Ebong, Tunneling-based cellula nonlinea netwok achitectues fo image pocessing, IEEE Tans. Vey Lage Scale Integ. VLSI Syst., vol. 17, no. 4, pp , Ap [11] T. Roska, Analogic CNN computing: Achitectual, implementation, and algoithmic advances-a eview, Poc. IEEE 5th Int. Wokshop Cellula Neual Netwoks Thei Appl., pp. 3 10, Ap , [12] B. E. Shi, The effect of mismatch in cuent vesus voltage-mode esistive gids, Int. J. Cicuit Theoy Appl., vol. 37, no. 1, pp , Feb [13] Y. Yilmaz and P. azumde, Theshold ead method fo multi-bit memistive cossba memoy, Poc. Int. Symp. Electon. Syst. Des.,pp , Dec , [14] I. Ebong, D. Deshpande, Y. Yilmaz, and P. azumde, ulti-pupose neuo-achitectue with memistos, Poc. IEEE 11th Conf. Nanotechnol., pp , Aug , [15] H. Li, X. Liao, C. Li, H. Huang, and C. Li, Edge detection of noisy images based on cellula neual netwoks, Commun. Nonlinea Sci. Nume. Simul., vol. 16, no. 9, pp , Sep [16] J. Zhao, H. Wang, and D. Yu, A new appoach fo edge detection of noisy image based on CNN, Int. J. Cicuit Theoy Appl., vol. 31, no. 2, pp , Feb [17] T. Yoshida, J. Kawata, T. Tada, A. Ushida, and J. oimoto, Edge detection method with CNN, Poc. SICE Annu. Conf., vol. 2, pp , Aug. 4 6, [18] I. N. Aizenbeg, Pocessing of noisy and small-detailed gay-scale images using cellula neual netwoks, J. Elect. Imaging, vol. 6, no. 3, pp , Jul [19] A. Gelencsé, T. Podomakis, C. Toumazou, and T. Roska, Biomimetic model of the oute plexifom laye by incopoating memistive devices, Phys.Rev.E, vol. 85, no. 4, pp , Ap [20] L. O. Chua, emisto-the missing cicuit element, IEEE Tans. Cicuit Theoy, vol. 18, no. 5, pp , Sep [21] Y. N. Jogleka and S. J. Wolf, The elusive memisto: Popeties of basic electical cicuits, Eu. J. Phys., vol. 30, pp , [22] K. Kim, S. H. Jo, S. Gaba, and W. Lu, Nanoscale esistive memoy with intinsic diode chaacteistics and long enduance, Appl. Phys. Lett., vol. 96, no. 5, pp , Feb

9 YILAZ AND AZUDER: IAGE PROCESSING BY A PROGRAABLE GRID COPRISING QUANTU DOTS AND ERISTORS 887 Yalcin Yilmaz eceived the B.S and.s. degees in electical engineeing fom the Univesity of ichigan, Ann Abo, USA, in 2009 and 2011, espectively, whee he is cuently woking towad the Ph.D. degee. He is cuently a Gaduate Student Reseach Assistant in the Electical Engineeing and Compute Science Depatment at the Univesity of ichigan, Ann Abo, USA. His cuent eseach inteests include the modeling, simulation, low-powe digital and analog cicuit designs fo emeging technologies including spin-based devices, esonant tunneling diodes, and memistos. Pinaki azumde F 99 eceived the B.S. degee in electical engineeing fom the Indian Institute of Science, Bangaloe, Kanataka, and the B.Sc. Physics Hons. degee fom Guwahati Univesity, Guwahati, Assam, India, the.s. degee in compute science fom the Univesity of Albeta, AB, Canada, and the Ph.D. degee in electical and compute engineeing fom the Univesity of Illinois at Ubana-Champaign, Ubana, USA, in 1988., He is cuently, a Pofesso of electical engineeing and compute science at the Univesity of ichigan, Ann Abo, USA, whee he has been teaching fo the past 25 yeas. He spent 3 yeas at National Science Foundation seving as the lead Pogam Diecto of Emeging odels and Technologies Pogam in the CISE Diectoate as well as leading the Quantum, olecula and High Pefomance Simulation Pogam in the Engineeing Diectoate. He had woked fo 6 yeas in industial R&D laboatoies which included AT&T Bell Laboatoies in USA and Bhaat Electonics, Ltd., in India. He spent his sabbatical at Stanfod Univesity, Univesity of Califonia at Bekeley, and NTT Cente Reseach Laboatoy in Japan. He has published moe than 260 technical papes and 4 books on vaious aspects of VLSI technology.