Performance Analysis of Z-Source Inverter Considering Inductor Resistance

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1 Pefomance Analysis of Z-Souce Invete Consideing Inducto Resistance Fatma A. Khea * and Essam Eddin M. Rashad ** Electic Powe and Machines Engineeing Depatment, Faculty of Engineeing, anta Univesity, anta, Egypt * eng.fatma333@yahoo.com ** emashad@ieee.og Abstact his pape pesents mathematical and expeimental analysis of Z-souce invetes (ZSI) when feeding inductive loads. A focus has been given to the effect of consideing inductos esistance of the invete. A simple mathematical fom has been deived to obtain the voltage tansfe atio (VR) in tems of invete and load paametes fo diffeent contol techniques. Compaison between expeimental and calculated esults showed acceptable validity fo both maximum boost and maximum constant boost contol techniques. he obtained analysis and elations ae useful in designing and opeating Z-souce invetes. Keywods Z-souce invetes; maximum boost contol; maximum constant boost contol I. INRODUCION Nowadays, using enewable enegy and distibuted geneation souces in electic powe systems is inceasing apidly. Many of these souces may opeate as a low DC voltage souce []. In ode to achieve load equiements o compatibility with powe gid, the need fo voltage boosting convetes became mandatoy. aditional techniques depend upon dc/dc boosting convete followed by a voltage souce invete (VSI). Such systems still have poblems such as high cost and complexity associated with two-stage powe convesion []. Recently, Z-souce invetes (ZSI) ae used as an altenative to achieve the same goal. Such a type of convete is contolled using pulse width modulation (PWM). his development has been fistly suggested by F. Z. Peng [3] in 003. he unique featue of the PWM Z-souce invete is that it can be used as a voltage buck-boost invete while conventional VSI achieve buck opeation only. ZSI was applied fo diffeent applications such as adjustable speed dive systems [4-5], fuel cell vehicles [6], esidential photovoltaic systems [7], wind powe geneation [8] and taction dive applications [9]. he tansient modeling and contolle was also investigated in [0] and []. In ecent yeas, ZSI has attacted eseaches to investigate its opeation and enhance contolle behavio [5]-[]. In pinciple, a ZSI consists of a diode, impedance netwok and a taditional VSI. Impedance netwok is composed fom two identical inductos and two identical capacitos connected in X shape as shown in Fig.. Existence of impedance netwok allows VSI to be opeated in a new state called shoot though state which is used to get boosting behavio. Z-souce invetes can be contolled using seveal boosting techniques, e. g. simple boost (SB) [3], maximum boost (MB) [3], maximum constant boost (MCB) [4] and modified space vecto pulse width modulation (MSVPWM) [5]. Most of published wok neglects the effects of intenal inducto esistance that esults in inaccuate design and contolled behavio. Hence, the motivation of this wok is to investigate the effect of this esistance and detemine voltage tansfe atio VR fo ZSI to obtain a simple and closed fomula. E s V D D V C V L L C C L V L V C V dc S S 3 S 4 S 6 Fig.. hee-phase Z-Souce Invete S 5 S o load Section II pesents opeation pinciples fo ZSI, the equivalent cicuits and the diffeent modulation boosting schemes. Section III explains how output-to-input voltage tansfe atio is detemined fo two case, ideal system and consideing inducto paasitic esistance. In section IV, expeimental and simulation esults ae compaed with those obtained using suggested theoetical analysis. Finally conclusions ae given in section V. II. PRINCIPLES OF Z-SOURCE INVERER AND MODULAION SCHEMES In a taditional opeation of VSI, thee ae eight switching states, six of them ae called active states" whee the load is connected diectly to the supply voltage. he emaining two states ae named as "null states" whee eithe all uppe o all lowe switches ae conducted simultaneously. he null states achieve zeo line voltage acoss load teminals [6].

Fo ZSI, thee is an additional state called shoot though state. In this state, the dc link teminals ae shoted by gating both the uppe and lowe devices of at least one invete leg [].

he last way is obtained by shoting thee phase legs simultaneously.

2 Fo ZSI, thee is an additional state called shoot though state. In this state, the dc link teminals ae shoted by gating both the uppe and lowe devices of at least one invete leg []. hee ae seven diffeent ways to geneate shoot-though states, thee of them can be achieved by shoting any one phase leg. Othe thee ways ae obtained by shoting any two phase legs simultaneously. he last way is obtained by shoting thee phase legs simultaneously. Both null and shoot though states achieve zeo load voltage but the main diffeence is that, shoot though facilitates boosting of dc link voltage though the impedance netwok. When using any technique of SB, MB and MCB, the PWM switching patten fo a ZSI can be geneated accoding to the following switching manne. Both active and null states ae geneated using taditional sinusoidal pulse width modulation (SPWM) technique. he shoot-though states ae geneated by compaing othe modulating signals with the employed tiangula caie signal. he shoot-though states ae distibuted within the null states, so that active states intevals aen't affected. Fig. shows the sketch map of SB, MB and MCB boosting techniques. the second case: the effect of the inducto esistance is consideed while setting all components in ideal case. As descibed in [], thee ae two available states of opeation. he fist is shoot though state which has the equivalent cicuit shown in Fig. 3.a. his state begins when the Z-souce netwok is shoted by any of the seven shoot though states fo an inteval of sh. In this state, the sum of two capacito voltages is geate than the souce voltage E s, so that the diode is evese biased with voltage V D. Hence, the stoed enegy in the capacitos is tansfeed to inductos, theeby achieving the boosting of the voltage applied to the VSI. he second case is non shoot though state (eithe active o null state). he equivalent cicuit of is shown in Fig 3.b. the ZSI opeates in one of the six active and two null states fo total inteval of an. In this state, the diode is fowad biased. So, the capacitos begin to chage and the enegy that initially stoed in the inductos will be tansfeed to the load. A. Ideal Case he analysis of ideal case can be pefomed by setting =0 in equivalent cicuit of Fig. 3 A.. Shoot-though state 0 t sh Fom the equivalent cicuit: V L = V C () V dc = 0 () (a) V D = E s V C (3) A.. Non shoot-though state sh t Accoding to the equivalent cicuit given in Fig 3.b V L = E S V C (4) (b) V dc = V C V L (5) Is Es Vdc (c) Fig.. Modulation schemes (a) SB, (b) MB and (c) MCB hee phase sinusoidal efeence signals Shoot though modulating signal Caie signal (a) III. OUPU-O-INPU VOLAGE RANSFER RAIO Output-to-input voltage tansfe atio is defined as the atio between invete output peak phase voltage to the dc supply voltage. his atio has been obtained fo two cases. he Fist case is when neglecting the paasitic esistances of all components (diode, inductos, capacitos, MOSFEs etc). In Es Is Vdc o Load Fig. 3. Equivalent cicuit of the Z-souce invete (a) Shoot though state (b) Non shoot though state. (b)

3 Substituting fom (4) into (5) fo V L esults in: V dc = V C E S (6) At steady state, the aveage value of the inducto voltage ove one switching peiod equals zeo [], V C can be assumed constant within the time sh, by using () and (4): V L t dt = 0 sh (V c ) dt + 0 E S V c dt = 0 (7) sh fom which, the aveage capacito voltage is given by: V c = an an sh E S (8) whee sh, an is the shoot though and non shoot though peiods espectively. is switching peiod whee: = sh + an (9) Let D sh and D az ae the shoot though and non shoot though duty atios espectively whee: D sh = sh D an = an (0) () Fom (8), (9), (0) and (), the aveage capacito voltage is given by: V c = D sh D sh E S () Substituting fom () into (6) fo V c, the peak dc-link voltage acoss invete teminals is given by: V dc (peak ) = Let boost facto B is defined as follows: B = D sh E S (3) D sh (4) Fo stable opeation, D sh is in the ange between zeo and 0.5. heefoe, B vaies fom one to infinity. Pactically, values of B ae affected by souce of non idealities such as intenal esistance of inductance. he peak of the fundamental output phase voltage ( V m) can be expessed in tems of peak dc link voltage and modulation index M as follows []: whee G = MB is the ZSI gain []. In ZSI, voltage tansfe atio V m/ E S is simila to that of VSI but multiplied by boost facto (B). Accoding to [3-5], a geneal fom fo modulation index M as a function of duty atio D sh can be put in the following fom: M = n ( D sh ) (7) Similaly, the geneal fom fo gain G as a function of modulation index M is obtained as follows: G = M nm (8) whee n depends on the employed modulation technique as given by the following table: ABLE I. VALUES OF PARAMEER N FOR DIFFEREN MODULAION ECHNIQUES Modulation technique SB MB & MSVPWM CB n 3 3/π 3 Fom (6) voltage tansfe atio VR can be defined as follows fo =0: VR = G B. Consideing Inducto Resistance (9) Pactically, all components (such as invete switches, diode, inductos and capacitos) have intenal paasitic esistances. he inducto esistance has a majo effect because it caies highe cuent levels compaed with othe components. In this section, ZSI steady state analysis is given when consideing inducto paasitic esistance connected in seies. B.. Shoot-though state 0 t sh he equivalent cicuit fo this state is shown in Fig. 3.a. Fom which the following equations can be witten: V L = V C I L (0) V dc = 0 () B.. Non shoot-though state sh t he equivalent cicuit of this state is shown in Fig. 3.b. Fom which the following equations can be witten: V m = M V dc peak Substituting fom (3) and (4) into (5), esults in: (5) V L = E S V C I L () V dc = V C V L I L (3) V m = G E S (6) Substituting fom () into (3) fo V L esults in: V dc = V C E S (4) 3

4 At steady state, the aveage value of the inducto voltage ove one switching peiod equals zeo []. Using (0) and (), the aveage capacito voltage is given by: V c = D sh E D S I sh D L (5) sh Substituting fom (5) into (4) fo V c, the peak dc-link voltage acoss invete teminals ove a switching peiod is given by: V dc (peak ) = E D S I sh D L (6) sh substituting fom (6) into (5), the fundamental peak of output phase voltage can be obtained as follows: V m = G (E S I L ) (7) Inducto cuent I L can be calculated fom powe balance equation as follows: whee P o = P s P loss (8) P o = 3 V m I m cos(ф) (9) P o is the load powe, Ф is load powe facto angle, P s is the aveage souce powe and P loss is the inducto powe loss Equation (9) can be witten in the following fom: whee I m = V m P o = 3 V m cos(ф) (30) and is the load impedance he aveage souce powe and inducto powe loss ae given by: Substituting fom (33) into (7), the fundamental peak of output phase voltage is: 6G E S V m = 6 + cos(ф) G Z (35) L Equation (35) can be witten in the following fom: whee G n = V m = G n E S 6G (36) 6 + cos(ф) G (37) whee G n is ZSI gain when consideing inducto esistance. he output to input voltage tansfe atio (V m /E S ) is given by: 8G VR = 6 + cos(ф) (38) G Z L It is to be noted that, if the inducto esistance () appoaches zeo, equation (38) tends to (9). It is obvious that, VR depends on not only modulation index M (since G is a function of M accoding to (8)), but also load paametes and inducto esistance. Fig. 4 shows VR vesus modulation index M fo thee phase RL load of 60 Ω and 0.3H pe phase at 50Hz. In this figue, the effect of is given fo SB, MB and MCB contol techniques fo the inducto esistance of.5ω. It's obvious that, at low values of modulation index, effect of inceases. his is attibuted to high dawn souce cuent which esults in high voltage dop. P s = E S I S (3) P loss = I L (3) Since, the aveage capacito cuent is zeo, the aveage inducto cuent I L equals aveage supply cuent I S. heefoe Fom (8) to (3), inducto cuent is given by: E s E S cos(ф)v P (33) I L = 4 Substituting fom (33) into (6), the peak value of dc link voltage (stess voltage V s ) is given by: V dc (peak ) = 4(nG ) 4 + cos(ф) (ng ) E S (34) Fig. 4. Voltage tansfe atio vesus modulation index consideing and neglecting inducto intenal esistance whee =.5Ω As shown in Fig. 4, VR inceases with deceasing modulation index, until it eaches to the maximum value of M m. Beyond this point VR begins to decease due to high inducto cuent that causes high voltage dop. At this point: d VR d M = 0 (39) 4

Using (38) and (39), M m can be obtained to be as follows: M m = 6n + 4 cos(ф) 6n cos(ф) (40) M m depends on load paametes, inducto esistance and adopted contol technique.

5 Using (38) and (39), M m can be obtained to be as follows: M m = 6n + 4 cos(ф) 6n cos(ф) (40) M m depends on load paametes, inducto esistance and adopted contol technique. It is good to opeate at modulation index geate than M m to avoid high opeating inducto cuent. Fig. 5 shows voltage tansfe atio vesus modulation index fo diffeent inducto esistance 0,, 4 and 6Ω fo MCB technique. Fig. 5. Voltage tansfe atio vesus modulation index fo diffeent inducto esistance fo MCB contol technique Fig. 6 shows boost facto (V dc /E s ) vesus modulation index M when consideing inducto esistance (). Fig. 6. Boost facto vesus modulation index consideing and neglecting inducto intenal esistance IV. EXPRIMENAL RESULS o demonstate the validity of the above analysis fo the pefomance of thee-phase ZSI invete feeding inductive load, simulation and expeiments wee conducted with the configuation in Fig.. Simulation and expeimental paametes ae: ABLE II. EXPERMINAL PARAMEERS Souce voltage (E s) 0 V Load esistance (R L) 60Ω Z-inductance (L Z) 0.45H Load inductance (L) 0.95H Z-capacitance (C Z) µf Sampling time ( s) 5µsec Output fequency 50Hz Caie fequency (f c) khz he simulation study has been caied out using SimPoweSystem toolbox povided within MALAB/SIMULINK package. Capacitos, diode and MOSFEs have been consideed as ideal components except the inductos. he simulation esults show a complete coincidence with the pevious analysis. he system was poweed fom a dc input souce at 0V and was diven by a contolle using a dspace DS04 cad. he employed DSP capabilities limit sampling time to sec. he switching fequency is set to khz to povide a pope numbe of samples in the switching cycle. Fig. 7 and Fig. 8 show voltage tansfe atio VR vesus modulation index M fo two contol techniques (MB and MCB) that ae obtained fo two values of inducto esistance.5 and 4.5Ω. In both figues, fou goups of esults ae illustated; namely: Neglecting all souces of non-ideality (, ds, V f etc), (theoetical esults) Consideing only intenal esistance of inducto (theoetical esults) Consideing V f, and ds (simulation esults) Expeimental esults Accoding to the given esults in Fig. 7 and Fig. 8, the following notes can be extacted: At highe values of modulation index, the expeimental and theoetical esults ae well-matched whee effects of non-idealities ae a little. Fo modulation index M less than about 0.65, thee is still discepancy between expeimental and theoetical esults ae consideable even when V f, and ds ae taken into account. his diffeence may be attibuted to:. Assuming inductos and capacitos and esistos ae linea, time-invaiant, and fequency independent.. he employed DSP capabilities limit sampling time to sec, which may cause losing of some voltage intevals. 3. Neglecting othe types of non-idealities (e.g stay inductances and capacitances) []. It is noted that, value of Mm (maximum VR) in case of consideing only is vey close to that obtained in case of consideing, ds and V f. 5

6 (a) (a) Inducto esistance =.5 (b) Fig. 7. Voltage tansfe atio vesus modulation index fo MB technique (b) Inducto esistance =4.5 Fig. 8. Voltage tansfe atio vesus modulation index fo MCB technique It is not ecommended to opeate at M less than Mm due to high dawn souce cuent. Moeove, the same VR can be obtained at values of M geate than Mm with achieving less dawn cuent. Effect of V f and ds is low compaed with effect of. Hence, the obtained simple and closed fomula fo VR (38) consideing only is sufficient especially when value of is high compaed with ds. V. CONCLUSION A steady-state analysis of Z-souce invete has been pesented in details consideing inducto paasitic esistance. he output-to input voltage tansfe atio fo ZSI has been deived fo ideal case and when consideing inducto paasitic esistance only. A laboatoy pototype and simulink model was built to veify the validity of theoetical analysis. Both simulation and expeimental esults ae in a good ageement with those obtained using the suggested fomula fo consideing inducto intenal esistance. Neglecting, ds and V f Consideing only Consideing, ds and V f **** Expeimental esults REFERENCES [] L.Feis, D.Infield, enewable enegy in powe systems. United Kingdom: John Wiley and Sons, 008. [] N. Mohan, W. P. Robbin, and. Undeland, Powe Electonics: Convetes, Applications, and Design, nd ed. New Yok: Wiley, 995. [3] F. Z. Peng, Z-souce invete, IEEE ans. Ind. Applicat.,vol.39,no., pp , Ma [4] F. Z. Peng, A. Joseph, J. Wang, M. Shen, L. Chen, Z. Pan, E. O. Rivea, and Y. Huang," Z-Souce Invete fo Moto Dives" IEEE ansactions on Powe Electonics, vol. 0, no. 4, july 005. [5] R. Suta, S. R. Jagtap, J. amboli," Pefomance Analysis of Z- souce Invete Fed Induction Moto Dive," Intenational Jounal of Scientific & Engineeing Reseach, Vol 3, Issue 5, May-0 [6] M. Shen, A. Joseph, J. Wang, F. Z. Peng, and D. J. Adams, Compaison of aditional Invetes and Z-Souce Invete fo Fuel Cell Vehicles, IEEE ans. Powe Electon., vol., no. 4, pp , Jul

7 [7] Y. Huang, M. Shen, F. Z. Peng, and J. Wang, Z-Souce Invete fo Residential Photovoltaic Systems, IEEE ans. Powe Electon., vol., no. 6, pp , Nov [8] U.Supatti, and F. Z. Peng, Z-souce Invete Based Wind Powe Geneation System, IEEE Intenational Confeence Sustainable Enegy echnologies, pp , 008 [9] F. Z. Peng, M. Shen, and K. Holland, Application of Z-Souce Invete fo action Dive of Fuel Cell-Battey Hybid Electic Vehicles, IEEE ans. Powe Electon., vol., no. 3, pp , May 007. [0] P. C. Loh, D. M. Vilathgamuwa, C. J. Gajanayake, Y. R. Lim, and C. W. eo ansient Modeling and Analysis of Pulse-Width Modulated Z- Souce Invete in Poc. of IEEE Industy Applications Society Annual Meeting, Volume 4, pp , -6 Oct [] J. B. Liu, J. G. Hu, and L. Y. Xu, Dynamic Modeling and Analysis Of Z-Souce Convete-Deivation Of AC Small Signal Model And Design-Oiented Analysis, IEEE ans. Powe Electon., vol., no. 5, pp , Sep [] V. P. Galigekee and M. K. Kazimieczuk; Analysis of PWM Z- Souce DC-DC Convete in CCM fo Steady State, IEEE ansactions on Cicuits and Systems, vol. 59, no. 4, apil 0 [3] F. Z. Peng, M. Shen, and Z. Qian, "Maximum Boost Contol of the Z-Souce Invete," IEEE ansactions on Powe Electonics, vol. 0, no. 4, july 005. [4] M. Shen, J. Wang, A. Joseph, F. Z. Peng, L. M. olbet, and D. J. Adams, Constant Boost Contol of the Z-souce Invete to Minimize Cuent Ripple and Voltage Stess, IEEE ans. Ind. Appl., vol. 4, no. 3, pp , May/Jun [5] P. C. Loh, M. Vilathgamuwa, Y. S. Lai, G.. Chua and Y. W. Li, "Pulse Width Modulation of Z-Souce Invetes," IEEE ansactions on Powe Electonics, Vol. 0, No. 6, pp [6] Muhammad H. Rashid, Powe Electonics: Cicuits, Devices and Applications. 3 d ed. USA: Pentice Hall, 004 7

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