ECEN326: Electronic Circuits Fall 2017

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1 ECEN36: Electonic Cicuits Fall 07 Lectue 4: Cascode Stages and Cuent Mios Sam Palemo Analog & Mixed-Signal Cente Texas A&M Univesity

2 Announcements HW3 due 0/4 Exam 0/9 9:0-0:0 (0 exta minutes) Closed book w/ one standad note sheet 8.5 x font & back Bing you calculato Coves though half of Lectue 4 (cascode mateial) Sample Exam posted on website eading azavi Chapte 9

3 Agenda Diffeential Amplifie (Lab 4) Simulation Tips Cascode Stages Cuent Mios 3

4 Simulating Diffeential Amplifies To simulate diffeential amplifies, like to use voltage-contolled voltage souces (VCVS o E elements) to geneate the diffeential input signal and combine the diffeential output into a single-ended signal Note: This example doesn t meet the Lab 4 gain spec Single-ended input souce VCVS to combine diffeential output DC voltage souce to set input DC level VCVS to geneate diffeential o common-mode inputs 4

5 VCVS o E Elements n_p n_n Out_p Out_n Out_p Out_n = Gain*(n_p n_n) 5

6 Simulating Diffeential Gain Set nputs E Gain=0.5 and E Gain=-0.5, Output E3 Gain= With input souce AC=, simply plot the output of E3 (Vo) to get the diffeential AC gain Gain= Single-ended input souce DC=0 AC= DC voltage souce to set input DC level Gain=0.5 Gain=-0.5 6

7 Simulating Diffeential Gain A dm = 30.7 V/V = 9.7dB 7

8 Simulating Diffeential ind The diffeential input esistance is equivalent to the diffeential input (Vi) divided by the input cuent, whee use the base cuent of Q o B(Q) ind = 5.5k 8

7 = 63mV Note that the even-ode hamonics (HD, HD4, ) ae vey small (ideally

9 Simulating THD Set input souce to Diffeential Output Amplitude/A dm Fo Lab 4, that is 5V/A dm n this example set the diffeential input VAMPL = 5V/30.7 = 63mV Note that the even-ode hamonics (HD, HD4, ) ae vey small (ideally zeo) A nice popety of ideal diffeential amplifies is that they eject evenode hamonics 9

10 Simulating Common-Mode Gain Set nputs E Gain= and E Gain=, Output E3 Gain= With input souce AC=, plot one of the single-ended outputs (Vo o Vo) to get the common-mode gain Single-ended input souce DC=0 AC= DC voltage souce to set input DC level Gain= Gain= 0

11 Simulating Common-Mode Gain A cm = -57.5dB at khz

12 CM Definitions CM is the atio of the diffeential-mode gain (A DM ) ove the common-mode to diffeential convesion gain (A CM-DM ) CM A A DM CM DM Howeve, this can be had to simulate without intoducing vaiations in the cicuit, as A CM-DM will be zeo without vaiations Thus, the lab uses an altenative CM definition which is the atio of the diffeential-mode gain (A DM ) ove the common-mode gain (A CM ), which is also a useful figue of meit CM lab Using the pevious simulation data, the CM lab would be 9.7dB (-57.5db) = 87.dB A A DM CM

13 Agenda Diffeential Amplifie (Lab 4) Simulation Tips Cascode Stages Cuent Mios 3

14 CH 9 Cascode Stages and Cuent Mios 4 Boosted Output mpedances S O S m out E O E m out g g

15 CH 9 Cascode Stages and Cuent Mios 5 Bipola Cascode Stage )] ( [ g g O O m out O O O m out

16 Maximum Bipola Cascode Output mpedance out, max m O out,max g O The maximum output impedance of a bipola cascode is bounded by the eve-pesent between emitte and gound of Q. CH 9 Cascode Stages and Cuent Mios 6

17 Example: Tying to double Output mpedance using E elative to a simple bottom Q cascode, lets ty and double this by adding an additional E out g m o o g g n ode to oughly double outa o out Afte some algeba, we find that outa we need o E m o E m o E Typically is smalle than O, so in geneal it is impossible to double the output impedance by degeneating Q with a esisto. o outa CH 9 Cascode Stages and Cuent o Mios 7

18 CH 9 Cascode Stages and Cuent Mios 8 PNP Cascode Stage )] ( [ g g O O m out O O O m out

19 Anothe ntepetation of Bipola Cascode nstead of teating cascode as Q degeneating Q, we can also think of it as Q stacking on top of Q (cuent souce) to boost Q s output impedance. CH 9 Cascode Stages and Cuent Mios 9

20 CH 9 Cascode Stages and Cuent Mios 0 False Cascodes When the emitte of Q is connected to the emitte of Q, it s no longe a cascode since Q becomes a diode-connected device instead of a cuent souce. O m O m m out O m O O m m out g g g g g g

21 MOS Cascode Stage out g m O O O out g m O O CH 9 Cascode Stages and Cuent Mios

22 Anothe ntepetation of MOS Cascode Simila to its bipola countepat, MOS cascode can be thought of as stacking a tansisto on top of a cuent souce. Unlike bipola cascode, the output impedance is not limited by. CH 9 Cascode Stages and Cuent Mios

23 PMOS Cascode Stage out g m O O O out g m O O CH 9 Cascode Stages and Cuent Mios 3

24 Example: Paasitic esistance out ( g )( ) m O O P O P will lowe the output impedance, since its paallel combination with O will always be lowe than O. CH 9 Cascode Stages and Cuent Mios 4

25 Shot-Cicuit Tansconductance Book Convention G m i out v in v out 0 The shot-cicuit tansconductance of a cicuit measues its stength in conveting input voltage to output cuent. Note, in Lectue we defined Gm with iout flowing out of the cicuit. Eithe convention is OK, as long as the appopiate Av expession is used CH 9 Cascode Stages and Cuent Mios 5

26 Tansconductance Example G g m m CH 9 Cascode Stages and Cuent Mios 6

27 Deivation of Voltage Gain v v out out v i in out out G m G out m v in out Note: f you define G m with i sc flowing outwad, then A v =G m out By epesenting a linea cicuit with its Noton equivalent, the elationship between V out and V in can be expessed by the poduct of G m and out. CH 9 Cascode Stages and Cuent Mios 7

28 Example: Voltage Gain A g v m O CH 9 Cascode Stages and Cuent Mios 8

29 Compaison between Bipola Cascode and CE Stage Since the output impedance of bipola cascode is highe than that of the CE stage, we would expect its voltage gain to be highe as well. CH 9 Cascode Stages and Cuent Mios 9

30 Voltage Gain of Bipola Cascode Amplifie G m g m A v g m O g m ( ) O Since O is much lage than /g m, most of C,Q flows into the diode-connected Q. Using out as befoe, A V is easily calculated. CH 9 Cascode Stages and Cuent Mios 30

31 Pactical Cascode Stage out g mo ( O O3 ) Since no cuent souce can be ideal, the output impedance dops. CH 9 Cascode Stages and Cuent Mios 3

32 mpoved Cascode Stage out g ( O 4 3) gmo ( O ) m3 O3 n ode to peseve the high output impedance, a cascode PNP cuent souce is used. CH 9 Cascode Stages and Cuent Mios 3

33 CH 9 Cascode Stages and Cuent Mios 33 MOS Cascode Amplifie ) ( O O m m v O O O m m v out m v g g A g g A G A

34 mpoved MOS Cascode Amplifie on op out g g m m3 on O O3 O O4 op Simila to its bipola countepat, the output impedance of a MOS cascode amplifie can be impoved by using a PMOS cascode cuent souce. CH 9 Cascode Stages and Cuent Mios 34

35 Agenda Diffeential Amplifie (Lab 4) Simulation Tips Cascode Stages Cuent Mios BJT Cuent Mio Basics MOS Cuent Mios Basics 35

36 Tempeatue and Supply Dependence of Bias Cuent V CC ( nc ox W L ) V T ln( V DD S ) V TH Since V T, S, n, and V TH all depend on tempeatue, fo both bipola and MOS depends on tempeatue and supply. CH 9 Cascode Stages and Cuent Mios 36

37 Concept of Cuent Mio The motivation behind a cuent mio is to sense the cuent fom a golden cuent souce and duplicate this golden cuent to othe locations. CH 9 Cascode Stages and Cuent Mios 37

38 Bipola Cuent Mio Cicuity Neglecting base cuent fo now (assuming high ), this voltage foms thev copy fom the V BE S e C VBE VBE V V C S e T Se T the voltage poduced by the diode connected tansisto is EF VT ln S, EF of the output cuent souce to poduce V EF T ln S, EF VT expession S S, EF EF copy S, EF EF The diode-connected Q EF poduces an output voltage V that foces copy = EF, if Q = Q EF. CH 9 Cascode Stages and Cuent Mios 38 S

39 Multiple Copies of EF Neglecting B copy, j S, j S, EF EF Multiple copies of EF can be geneated at diffeent locations by simply applying the idea of cuent mio to moe tansistos. CH 9 Cascode Stages and Cuent Mios 39

40 Cuent Scaling Neglecting B copy, j n EF By scaling the emitte aea of Q j n times with espect to Q EF, copy,j is also n times lage than EF. This is equivalent to placing n unit-size tansistos in paallel. CH 9 Cascode Stages and Cuent Mios 40

41 Example: Scaled Cuent Neglecting B CH 9 Cascode Stages and Cuent Mios 4

42 Factional Scaling Neglecting B copy EF 3 A faction of EF can be ceated on Q by scaling up the emitte aea of Q EF. CH 9 Cascode Stages and Cuent Mios 4

43 Example: Diffeent Mioing atio Neglecting B Using the idea of cuent scaling and factional scaling, copy is 0.5mA and copy is 0.05mA espectively. All coming fom a souce of 0.mA. CH 9 Cascode Stages and Cuent Mios 43

44 Mioing Eo Due to Base Cuents copy n EF n B B, EF Fom a KCL at the base/collecto of EF copy copy n copy copy n copy n nef n copy Q EF CH 9 Cascode Stages and Cuent Mios 44

45 mpoved Mioing Accuacy copy n EF n Fom a Fom a KCL at the base of KCL at the collecto of C, EF Because of Q F, the base cuents of Q EF and Q ae mostly supplied by Q F athe than EF. Mioing eo is educed times. Q F is often called a helpe CH 9 Cascode Stages and Cuent Mios 45 EF E, F B, F B, F copy C, F copy n copy copy EF Q n n and Q n n Q EF EF copy n

46 Example: Diffeent Mioing atio Accuacy The key to finding the copied cuents is to fist compute the copy, total n total cuent copied using copy copy total 0 EF 4 EF Then scale the individual output cuents n EF total copy, total copy, total EF 5 4 0EF 5 4 CH 9 Cascode Stages and Cuent Mios 46

47 PNP Cuent Mio PNP cuent mio is used as a cuent souce load to an NPN amplifie stage. But what if we only have ideal efeence cuent that flows fom V CC, as in all the pevious NPN cuent mio examples? CH 9 Cascode Stages and Cuent Mios 47

48 Geneation of EF fo PNP Cuent Mio CH 9 Cascode Stages and Cuent Mios 48

49 Example: Cuent Mio with Discete Devices Let Q EF and Q be discete NPN devices. EF and copy can vay in lage magnitude due to S mismatch. Thus, cuent mios may not be used that often in discete (boad-level) design, but ae pevasive in integated cicuit (C) design CH 9 Cascode Stages and Cuent Mios 49

50 Agenda Diffeential Amplifie (Lab 4) Simulation Tips Cascode Stages Cuent Mios BJT Cuent Mio Basics MOS Cuent Mios Basics 50

51 CH 9 Cascode Stages and Cuent Mios 5 MOS Cuent Mio EF EF n TH n TH EF ox n EF ox n copy GS n TH EF ox n EF X n TH GS ox n D L W L W V V L W C L W C V V L W C V V V L W C,,,, the output cuent souce to poduce of the voltage foms this the voltage poduced by the diode connected tansisto is Fom the satuation cuent equation EF EF copy L W L W

52 Example: Cuent Scaling Simila to thei bipola countepat, MOS cuent mios can also scale EF up o down ( = 0.mA, = 0.5mA). CH 9 Cascode Stages and Cuent Mios 5

53 CMOS Cuent Mio The idea of combining NMOS and PMOS to poduce CMOS cuent mio is shown above. CH 9 Cascode Stages and Cuent Mios 53

54 Next Time Fequency esponse azavi Chapte 54

Chapter 9 Cascode Stages and Current Mirrors

Chapter 9 Cascode Stages and Current Mirrors Chapte 9 Cascode Stages and Cuent Mios 9. Cascode Stage 9. Cuent Mios CH 9 Cascode Stages and Cuent Mios Boosted Output Impedances S O S m out E O E m out g g Bipola Cascode Stage [ g ( )] out m O O O