A Novel Resonant LLC Soft-Switching Inverting-Buck Converter

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1 Novel Resonant LLC Soft-Switching Inveting-Buck Convete Masoud Jabbai, Nahid Hematian Najafabadi, Ghazanfa Shahgholian, Mehdi Mahdavian Electical Engineeing Depatment, Najafabad Banch, Islamic zad Univesity, Isfahan, Ian Electical Engineeing Depatment, Naein Banch, Islamic zad Univesity, Naein, Ian bstact a new soft-switching esonant inveting-buck convete with high efficiency is pesented. The poposed convete steps down and invets the input voltage. The zeocuent-switching (ZCS) technique is employed to educe switching losses and Electomagnetic Intefeences (EMI). n LLC esonant netwok is utilized to povide soft-switching conditions fo all semiconducto devices. Expeimental esults veify the integity of the poposed convete opeation and the pesented theoetical analysis. Keywods inveting- buck convete; soft-switching; esonant powe convesions; ZCS; powe supply. I. INTRODUCTION Switching convetes have been widely employed fo DC DC powe convesion because the convete opeating fequency is consideably inceased and consequently the convete size and weight ae educed. Opeational amplifies (OP- MP), dynamic ead-only memoies (RM), localized mico-pocessos, data acquisition systems and telecommunication modules ae the geneal devices/systems wheein a egulated supply with negative voltage is equied. In these applications, it is essential to educe the convete size and loss, and isolation is not equied. Soft-switching techniques ae developed to educe switching losses and electomagnetic intefeence (EMI). t soft-switching condition, switching fequency can be inceased to enhance the convete powe density. This condition is commonly attained by zeo-voltage switching (ZVS) and/o zeo-cuent switching (ZCS) [] [0] /3/$ IEEE To povide a egulated negative voltage, the PWM buck-boost convete, and switched capacito convetes (SCCs) ae employed classically. Quasiesonant buck-boost convete is a soft-switching countepat of the PWM buck-boost convete in which a high-fequency esonant tank is utilized to educe switching losses. The main advantage of this technique is its less additional elements. Howeve, two inductos ae equied whee the main inducto of paent convete is still a elatively bulky component. Moeove, the voltage stess of switch is highe than that of the PWM countepat [] [5]. SCCs ae attactive fo chip design puposes because no magnetic component is utilized. majo dawback is the cuent spikes poduced by chaging /dischaging of the cicuit capacitos via only paasitic esistos of the switches. Vey low powe handling and high EMI ae consequences of this kind of opeation [6], [7]. Resonant SCCs (RSCs) ae SCC altenatives in which the switches cuent is contolled by placing a small inducto in seies with the switching capacitos [6] [3]. Howeve, not only the convete voltage gain is not adjustable in RSCs [3], but also it vaies against load changing [9]. To povide a factional voltage gain, many diodes and capacitos ought to be used, which esult in an incease of the convete cost, volume and conduction losses [8], [9]. Resonant convetes ae a family of softswitching convetes, in which enegy is tansfeed though a high fequency esonant tank and switching is pefomed at zeo-cossing instants of cuent and/o voltage. The main advantage of esonant convetes is that the size of passive components is educed geatly [], [6] [8]. In seies-esonant convete (SRC), the convete passive components include only a high-fequency

2 esonant tank and a filteing capacito at the output [], [4], [5]. The significant limitation of conventional esonant convetes is that the souce and load do not possess common gound between input and output teminals. Hence, these convetes ae mostly viewed fo isolated puposes. Employing a tansfome to ceate a common gound seems to be uneasonable fo the afoementioned applications. This pape pesents a new esonant softswitching step-down convete with inveted output voltage polaity. The passive components include only a high fequency esonant LLC tank and a filteing capacito at the output. Howeve, the poposed convete possesses common gound between input and output teminals and hence is suitable fo non-isolated applications. ll semiconducto devices opeate unde soft-switching condition at tun-on and tun-off switching instants, independent of the load cuent and opeating voltages. Unlike RSCs, voltage gain is adjustable and less numbe of elements is employed. Compaing with [9]-[0], one small esonant inducto is added (LLC tank); howeve, the numbe of diodes ae deceased fom 4 in [9] to in this pape, which esults in less conduction losses and lowe pice. Moeove, the added inducto inhibits ceation of spiky cuent poduced in the conventional bidge ams due to the sevee evese ecovey poblem of the switches anti-paallel diodes. The convete can be designed to limit output powe and is automatically shut down at output shot cicuited. Expeimental esults fom a 0W/00 khz pototype veify the integity of opeation and pesented theoetical analysis. II. NLYSIS OF PROPOSED BUCK CONVERTOR Fig. illustates the topology of poposed inveting-buck convete which is constucted by two switches Q, Q, a esonant LLC netwok (L, L, and C ), the ectifying diode D, and the output filteing capacito C. The coesponding equivalent cicuits and steady-state wavefoms ae shown in Figs. and 3. V S Fig. Poposed buck convete topology Following quantities ae defined. L L L + L, α () L ω, f LC π L C () L R Vo Z,, (3) C Z Vs v i( t) V, I (4) V V Z s Q Q i q i L d i L d C s Fo simplicity it is assumed all the cicuit elements ae ideal and the output capacito is lage enough so that the output voltage is constant duing one switching cycle. The initial cuents of all inductos ae zeo and the initial voltage of the esonant capacito C is V V O. The cicuit has five opeating modes as follows. Mode I (t 0 -t ): t t 0 Q is tuned on. Since the initial cuents of both inductos ae zeo, accoding to KCL, Q tun-on is unde the ZCS conditions. The esonant inducto L inhibits ceation of spiky cuent at the tun-on instant of Q which is ceated in the conventional bidge stuctue due to the sevee evese-ecovey of the anti-paallel diode of Q and its output capacitance. fte one half sinusoidal- cycle the cuent of Q eaches zeo and hence this switch is tuned off at ZCS. Duing this mode C has been chaged up to V S -V O. + v D C R V O + ( ) ω I sin ( t t 0 ) α α (5)

3 V ω t) ( )cos ( t t ) α ( 0 (6) αt t t0 (7) V ( t ) ( ) (8) Mode I Mode II Q Q Iq Iq Mode III Mode IV Id I Mode V Fig. 3 Equivalent cicuits of the poposed buck convete V V O V S -V O T m T S Mode III (t -t 3 ): t t, the diode D is fowad biased and clamps the voltage of C at -V O. The stoed magnetic enegy in L and L is deliveed to the output via this diode. By demagnetizing L and L at t, the switch Q and the diode D both tuned off at ZCS. Fig. Steady-state key wavefoms I I( t) + ω ( t3 ) (3) t Mode II (t -t ): Q is tuned on at t unde the ZCS conditions. The voltage of C stats evesing though a esonance with L and L until at t the esonance voltage v eaches -V O. I ( ( t )) ( ) sin ω (9) t ( ( t t )) V ( t ) ( ) c os ω (0) t t π cos ω I () ( t ) - () V (4) - t 3 t (5) ω I ( t 3 ) 0 (6) Mode IV (t 3 -t 4 ): In this peiod the anti-paallel diode of Q is fowad biased at ZCS and thus the voltage polaity of C eveses via a esonance with L and L. The gate signal of Q can be eset at any instant duing this inteval. I ( ( t )) sin ω (7) t

4 ( ( t t )) V ( t ) cos ω (8) α0 T t 4 t3 (9) V ( t 4 ) (0) V o m α Mode V (t 4 -t 5 ): In this mode, Q and Q ae OFF and the load is supplied by the output capacito. Duation of this inteval is detemined by the contolle so that pope voltage egulation is attained (dead-time contol). III. VOLTGE GIN t steady state, the convete voltage gain can be calculated by satisfying the enegy consevation pinciple in one Switching cycle as (). By substituting (5) into () and simplifying, () is obtained in which f s /T s is the switching fequency. t Vsi dt t 0 o V Ts () R /π Fig. 4 Maximum attainable voltage gain against /π t output shot cicuited, is zeo and thus accoding to (3) T m goes infinity. Since T m is the shotest switching peiod, powe tansfeing is automatically stopped when the output is shotcicuited (self shot-cicuit potection). IV. DESIGN PROCEDURE N EXMPLE The paamete α can be used as one degee of feedom fo optimizing the convete. Fo a given value of α, the convete design is pefomed as follows. f S. π f s () η 9.5 η max at α 0.8 In absence of dead-time (Mode V), the convete opeates at its maximum powe handling capability, whee the switching fequency is also at maximum. Maximum voltage gain m Is also attained at this situation. The inteval fom t 0 to t 4 is defined as T m. By using (7), (), (5), (9) following elation is obtained. T T m + α + π cos (3) By substituting f s T m in (), (4) is obtained, wheein in fact, m is a function of. This equation is equied fo convete design. m against /π is sketched in Fig. 4. m m π α m m π + + cos (4) m m α Fig. 5 Maximum attainable efficiency against α The maximum attainable voltage gain is obtained as m V O /V S min. By substituting m in (4), the nomalized load,, is calculated. Then accoding to (3), the esonant tank chaacteistics impedance is obtained by Z P out max /. The esonant tank chaacteistics angula fequency ω detemines switching fequency and should be ascetained by consideing the technology of the employed switches.

5 Example: Conside a 0W pototype convete fo V s 48V±0% to Vo36V±% with 0% ovedesign and esonant fequency f 00KHz. Solution: The convete is designed by employing the afoementioned pocedue fo seveal values of α. Hee, the paamete α is used to optimize the convete efficiency. Vaiations of the convete efficiency vesus α ae shown in Fig. 5. This cuve is obtained by simulating the convete with OCD PSpice softwae. ccoding to Fig. 5, the efficiency is maximum fo α0.8. Then the convete elements ae calculated as L 4.03µH, L 3.50 µh, C 44nF and C33µF. Q: ZCS TURN-ON Q: ZCS TURN-OFF Q: ZCS TURN-ON Q : V DS Q : V DS i Q: ZCS TURN-OFF V. EXPERIMENTL RESULTS The employed switches ae Q IRF640, Q IRF540, and D BYT56. Both inducto coes ae feite, and the esonant capacito is MKP type (metalized polyethylene). guad-time about 400ns exists between Q tun-off and Q tun-on. Fo P out 0W, the pactical esults of the designed pototype ae shown in Fig. 6. ccoding to this figue, soft-switching conditions ae attained fo both switches at both tun-on and tun-off switching instants. The inging wave of voltage switches appeaed at tun-off instants ae due to the switches output capacitances which oscillate with the tank inductances. VI. CONCLUSIONS new LLC esonant step-down convete with inveted voltage polaity is pesented. The poposed convete can be applied fo poducing negative voltage fom a positive voltage. ll semiconducto devices opeate at soft-switching conditions which esults in high efficiency and low EMI. Expeimental esults confim the integity of the theoetical analysis. Fig. 6 Pactical Results, espectively fom the top: V DS of Q (50V/div), V DS of Q (50V/div), I (00m/div), and V (50V/div). Time scale5μs/div. Fig. 7 Implemented convete REFERENCES [] N. Mohan, T.M. Undelan, W.P. Robbins, Powe Electonics Convetes, pplications and Design, John Wiley & Sons, 00, 3d ed. [] K.H. Liu, R.Ouganti, F.C.Lee: Quasi-esonant convetes topologies and chaacteistics, IEEE Tans. Powe Electon., 987,, (), pp [3] D. Maksimovic, S. Cuk, geneal appoach to synthesis and analysis of quasi-esonant convetes: IEEE Tans Powe Electon., 99, 6, (), pp [4] B.T. Lin, Y.S. Lee, unified appoach to modeling, synthesizing, and analyzing quasi-esonant convetes:, IEEE Tans. Powe Electon., 997,, pp [5].K.S. Bhat, F.D. Tan: unified appoach to chaacteization of PWM and quasi-pwm switching convetes: topological constaints, classification, and synthesis, IEEE Tans. Powe Electon., 6, (4), pp [6] K.W.E. Cheng : New geneation of switched capacito convetes, IEEE PESC, 998,, pp v

6 [7] K.W.E. Cheng : Zeo-cuent-switching switched-capacito convetes, IEE Poc., Electical. Powe ppl., 00, 48, pp [8] Y.P.B. Yeung, K.W.E. Cheng, D. Sutanto : Multiple and factional voltage convesion atios fo switched-capacito esonant convetes, Poc. IEEE PESC, 3nd nnual Meeting, 00, (3), pp [9] Y.P.B. Yeung, K.W.E. Cheng, S.L. Ho, K.K. Law, D. Sutanto : Unified analysis of switched-capacito esonant convetes, IEEE Tans. Ind. Electon., 004, 5, (4), pp [0] Y.P.B. Yeung, K.W.E. Cheng, D. Sutanto, S.L. Ho : Zeo-cuent switching switched-capacito quasi esonant step-down convete, IEE Poc., Electical. Powe ppl., 00, 49, (), pp. [] M. Shoyama, T. Naka, T. NinomiaI : Resonant switched capacito convete with high efficiency, PESC 04 Recod, June 004, pp [] K.K. Law, K.W.E. Cheng, Y.P.B. Yeung : Design and analysis of switched-capacito-based step-up esonant convetes, IEEE Tans. Cicuits Syst., 005, 5, (5),pp [3]. Ioinovici, H.S.H. Chung, M.S. Makowski, C.K. Tse: Comments on unified analysis of switched-capacito esonant convetes, IEEE Tans. Ind. Electon., 007, 54, (), pp [4] E.E. Buchanan, E.J. Mille : Resonant switching powe convesion technique, IEEE Powe Electonics Specialists Conf., 975, pp [5] R.L. Steigewald : compaison of half-bidge esonant convete topologies, IEEE Tans. Powe Electon., 988, 3, (), pp [6] M. Jabbai H. Fazanefad : Family of soft switching esonant dc dc convetes, IET Powe Electon., 009,, (), pp. 3 4 [7] C R.-T. Hen, Y.-Y. Chen : Single-stage esonant convete with powe facto coection, IET Electical. Powe ppl., 007,, (3), pp [8].K.S. Bhat : nalysis and design of a seies-paallel esonant convete, IEEE Tans. Powe Electon., 993, 8, (), pp. [9] M. Jabbai H. Fazanefad Resonant inveting-buck convete, IET Powe Electonics,00, vol.3,no.43,pp [0] M. Jabbai H. Fazanefad, nalysis and Expeimental Results of Switched-Resonato-Based Buck-Boost and Inveting-Buck Convetes, in Poc. IEEE PEDG,00,pp.4-46

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