Chapter 9 Cascode Stages and Current Mirrors

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1 Chapte 9 Cascode Stages and Cuent Mios 9. Cascode Stage 9. Cuent Mios

2 CH 9 Cascode Stages and Cuent Mios Boosted Output Impedances S O S m out E O E m out g g

3 Bipola Cascode Stage [ g ( )] out m O O O g out m O O CH 9 Cascode Stages and Cuent Mios 3

4 Example 9. CH 9 Cascode Stages and Cuent Mios 4

5 Maximum Bipola Cascode Output Impedance out, max m O out,max g O The maximum output impedance of a bipola cascode is bounded by the eve-pesent between emitte and gound of Q. CH 9 Cascode Stages and Cuent Mios 5

6 Example 9. CH 9 Cascode Stages and Cuent Mios 6

7 Example 9.3 outa O O Typically is smalle than O, so in geneal it is impossible to double the output impedance by degeneating Q with a esisto.c CH 9 Cascode Stages and Cuent Mios 7

8 PNP Cascode Stage [ g ( )] out m O O O g out m O O CH 9 Cascode Stages and Cuent Mios 8

9 Anothe Intepetation of Bipola Cascode V b detemines the cuent level. Instead of teating cascode as Q degeneating Q, we can also think of it as Q stacking on top of Q (cuent souce) to boost Q s output impedance. CH 9 Cascode Stages and Cuent Mios 9

10 CH 9 Cascode Stages and Cuent Mios 0 False Cascodes When the emitte of Q is connected to the emitte of Q, it s no longe a cascode since Q becomes a diode-connected device instead of a cuent souce. O m O m m out O m O O m m out g g g g g g

11 MOS Cascode Stage out out g m g O m O O O O CH 9 Cascode Stages and Cuent Mios

12 Example 9.5 CH 9 Cascode Stages and Cuent Mios

13 Anothe Intepetation of MOS Cascode Simila to its bipola countepat, MOS cascode can be thought of as stacking a tansisto on top of a cuent souce. Unlike bipola cascode, the output impedance is not limited by. CH 9 Cascode Stages and Cuent Mios 3

14 PMOS Cascode Stage out out g m g O m O O O O CH 9 Cascode Stages and Cuent Mios 4

15 Example 9.6 Duing manufactuing, a lage paasitic esisto, P,has appeaed in a cascode as shown in Fig. 9.. Detemine the output esistance. out ( gm O )( O P ) O P will lowe the output impedance, since its paallel combination with O will always be lowe than O. CH 9 Cascode Stages and Cuent Mios 5

16 Shot-Cicuit Tansconductance G m i out v in v out 0 The shot-cicuit tansconductance of a cicuit measues its stength in conveting input voltage to output cuent. CH 9 Cascode Stages and Cuent Mios 6

17 Example 9.7 Calculate the tansconductance of the CS stage shown in Fig. 9.3(a). G g m m CH 9 Cascode Stages and Cuent Mios 7

18 Deivation of Voltage Gain v v out out i v in out out G m G out m v in out By epesenting a linea cicuit with its Noton equivalent, the elationship between V out and V in can be expessed by the poduct of G m and out. CH 9 Cascode Stages and Cuent Mios 8

19 Example 9.8 Detemine the voltage gain of the common-emitte stage shown in Fig. 9.5(a). A g v m O CH 9 Cascode Stages and Cuent Mios 9

20 Compaison between Bipola Cascode and CE Stage Since the output impedance of bipola cascode is highe than that of the CE stage, we would expect its voltage gain to be highe as well. CH 9 Cascode Stages and Cuent Mios 0

21 Voltage Gain of Bipola Cascode Amplifie G m g m Av gm O gm( O ) Since O is much lage than /g m, most of I C,Q flows into the diode-connected Q. Using out as befoe, A V is easily calculated. CH 9 Cascode Stages and Cuent Mios

22 Example 9.9 G m g m Av gmo gm ( O ) Cascoding thus aises the voltage gain by a facto of CH 9 Cascode Stages and Cuent Mios

23 Altenate View of Cascode Amplifie A bipola cascode amplifie is also a CE stage in seies with a CB stage. CH 9 Cascode Stages and Cuent Mios 3

24 Pactical Cascode Stage out gmo ( O O3 ) Since no cuent souce can be ideal, the output impedance dops. CH 9 Cascode Stages and Cuent Mios 4

25 Impoved Cascode Stage out g ( O 4 3) gmo ( O ) m3 O3 In ode to peseve the high output impedance, a cascode PNP cuent souce is used. CH 9 Cascode Stages and Cuent Mios 5

26 Example 9.0 Compaed to the ideal cuent souce case, the gain has fallen by appoximately a facto of 3 because the pnp devices suffe fom a lowe Ealy voltage and β. CH 9 Cascode Stages and Cuent Mios 6

27 CH 9 Cascode Stages and Cuent Mios 7 MOS Cascode Amplifie ) ( O m O m v O O O m m v out m v g g A g g A G A

28 Impoved MOS Cascode Amplifie on op out g g m m3 on O O3 O O4 op Simila to its bipola countepat, the output impedance of a MOS cascode amplifie can be impoved by using a PMOS cascode cuent souce. CH 9 Cascode Stages and Cuent Mios 8

29 Tempeatue and Supply Dependence of Bias Cuent V I CC ( nc ox W L ) V T ln( I V DD I S ) V TH Since V T, I S, n, and V TH all depend on tempeatue, I fo both bipola and MOS depends on tempeatue and supply. CH 9 Cascode Stages and Cuent Mios 9

30 Concept of Cuent Mio The motivation behind a cuent mio is to sense the cuent fom a golden cuent souce and duplicate this golden cuent to othe locations. CH 9 Cascode Stages and Cuent Mios 30

31 Bipola Cuent Mio Cicuity I copy I I S S, EF I EF The diode-connected Q EF poduces an output voltage V that foces I copy = I EF, if Q = Q EF. CH 9 Cascode Stages and Cuent Mios 3

32 Bad Cuent Mio Example I Without shoting the collecto and base of Q EF togethe, thee will not be a path fo the base cuents to flow, theefoe, I copy is zeo. CH 9 Cascode Stages and Cuent Mios 3

33 Bad Cuent Mio Example II Although a path fo base cuents exists, this technique of biasing is no bette than esistive divide. CH 9 Cascode Stages and Cuent Mios 33

34 Multiple Copies of I EF I copy, j I I S, j S, EF I EF Multiple copies of I EF can be geneated at diffeent locations by simply applying the idea of cuent mio to moe tansistos. CH 9 Cascode Stages and Cuent Mios 34

35 Cuent Scaling I copy, j ni EF By scaling the emitte aea of Q j n times with espect to Q EF, I copy,j is also n times lage than I EF. This is equivalent to placing n unit-size tansistos in paallel. CH 9 Cascode Stages and Cuent Mios 35

36 Example 9.4 : Scaled Cuent A multistage amplifie incopoates two cuent souces of values 0.75mA and 0.5mA. Using a bandgap efeence cuent of 0.5mA, design the equie cuent souces. Neglect the effect of the base cuent fo now. CH 9 Cascode Stages and Cuent Mios 36

37 Factional Scaling I copy I EF 3 A faction of I EF can be ceated on Q by scaling up the emitte aea of Q EF. CH 9 Cascode Stages and Cuent Mios 37

38 Example 9.5 : Diffeent Mioing atio It is desied to geneate two cuents equal to 50uA and 500uA fom a efeence of 00uA. Design the cuent mio cicuit. Using the idea of cuent scaling and factional scaling, I copy is 0.5mA and I copy is 0.05mA espectively. All coming fom a souce of 0.mA. CH 9 Cascode Stages and Cuent Mios 38

39 Mioing Eo Due to Base Cuents I copy ni EF n CH 9 Cascode Stages and Cuent Mios 39

40 Impoved Mioing Accuacy I copy ni EF n Because of Q F, the base cuents of Q EF and Q ae mostly supplied by Q F athe than I EF. Mioing eo is educed times. CH 9 Cascode Stages and Cuent Mios 40

41 Example 9.6 : Diffeent Mioing atio Accuacy Compute the I copy and I copy in this figue befoe and afte adding a followe. Befoe : I I copy copy I 4 EF 5 0I EF 5 4 Afte : I I copy copy I EF 5 4 0I EF 5 4 CH 9 Cascode Stages and Cuent Mios 4

42 Example 9.7 : Diffeent Mioing atio Accuacy Design this cicuit fo a voltage gain 00 and a powe budget of mw. Assume VA,npn = 5V, VA,pnp = 4V, IEF = 00uA, and V CC =.5V. The gain is smalle than 00 because low Ealy voltages and VT, a fundamental constant of the technology, independent of the bias cuent. CH 9 Cascode Stages and Cuent Mios 4

43 PNP Cuent Mio PNP cuent mio is used as a cuent souce load to an NPN amplifie stage. CH 9 Cascode Stages and Cuent Mios 43

44 Geneation of I EF fo PNP Cuent Mio CH 9 Cascode Stages and Cuent Mios 44

45 Cuent Mio with Discete Devices Let Q EF and Q be discete NPN devices. I EF and I copy can vay in lage magnitude due to I S mismatch. CH 9 Cascode Stages and Cuent Mios 45

46 MOS Cuent Mio The same concept of cuent mio can be applied to MOS tansistos as well. CH 9 Cascode Stages and Cuent Mios 46

47 Bad MOS Cuent Mio Example This is not a cuent mio since the elationship between V X and I EF is not clealy defined. The only way to clealy define V X with I EF is to use a diodeconnected MOS since it povides squae-law I-V elationship. CH 9 Cascode Stages and Cuent Mios 47

48 Example 9.0 : Cuent Mio? Is this cuent mio? Explain what happens. This cicuit is not a cuent mio because the gates of MEF and M ae floating. CH 9 Cascode Stages and Cuent Mios 48

49 Example 9. : Cuent Scaling Simila to thei bipola countepat, MOS cuent mios can also scale I EF up o down (I = 0.mA, I = 0.5mA). CH 9 Cascode Stages and Cuent Mios 49

50 CMOS Cuent Mio The idea of combining NMOS and PMOS to poduce CMOS cuent mio is shown above. CH 9 Cascode Stages and Cuent Mios 50

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