VLA Hybrid IC IGBT Gate Driver

Transcription

1 Powerex, Inc., 173 Pavilion Lane, Youngwood, Pennsylvania (724) Hybrid I IBT ate Driver A B K D J H D F INTRFA LATH TIMR AND RST IRUIT DTT IRUIT V ONTROL PIN FOR t trip DTT PIN V O Description: The is a hybrid integrated circuit designed to provide optimum gate drive for IBT modules. This device provides high current optically isolated gate drive with a large output voltage swing. The driver also provides short circuit protection based on desaturation detection Ω OPTO OUPLR AT SHUTDOWN IRUIT 8 6 FAULT OUTPUT V Features: lectrical Isolation Voltage Between Input and Output with Opto-coupler (25 Vrms for 1 Minute) Outline Drawing and ircuit Diagram Dimensions Inches Millimeters A B D F / /-.1 H J.2.6/ /-.1 K.18±.6 4.5±1.5 Two Supply Driver Topology Built-in Short-ircuit Protection (With a Pin for Fault Output) TTL ompatible Input Interface Application: To drive IBT modules for inverter or A servo systems applications Recommended IBT Modules: 6V module up to 2A 12V module up to 1A Note: All dimensions listed are maximums except, H, J, and K. Rev. 4/7

2 Powerex, Inc., 173 Pavilion Lane, Youngwood, Pennsylvania (724) Absolute Maximum Ratings, T a = 25 unless otherwise specified haracteristics Symbol Units Supply Voltage, D V 18 Volts V -15 Volts Input Signal Voltage (Applied between Pin 13-14, 5% Duty ycle, Pulse Width 1ms) V i -1 ~ 7 Volts Output Voltage (When the Output Voltage is "H") V O V Volts Output urrent I OHP -3 Amperes (Pulse Width 2µs, f 2kHz) I OLP 3 Amperes Isolation Voltage (Sine Wave Voltage 6Hz, for 1 Minute) V O 25 V rms ase Temperature T 85 Operating Temperature (No ondensation Allowable) T opr -2 ~ 6 Storage Temperature (No ondensation Allowable)* T stg -25 ~ 1 Fault Output urrent (Applied Pin 8) I FO 2 ma Input Voltage at Pin 1 (Applied Pin 1) V R1 5 Volts *Differs from H/ condition. lectrical and Mechanical haracteristics, T a = 25 unless otherwise specified, V = 15V, V = -1V) haracteristics Symbol Test onditions Min. Typ. Max. Units Supply Voltage V Recommended Range Volts V Recommended Range -7-1 Volts Pull-up Voltage on Primary Side V IN Recommended Range Volts "H" Input urrent I IH Recommended Range ma Switching Frequency f Recommended Range 2 khz ate Resistance Recommended Range 3 W "H" Input urrent I IH V IN = 5V 16 ma "H" Output Voltage V OH Volts "L" Output Voltage V OL -8-9 Volts "L-H" Propagation Time t PLH I IH = 16mA.4 1 µs "L-H" Rise Time t r I IH = 16mA.3 1 µs "H-L" Propagation Time t PHL I IH = 16mA µs "H-L" Fall Time t f I IH = 16mA.3 1 µs Timer t timer Between Start and ancel 1 2 ms (Under Input Sign "L") Fault Output urrent I FO Applied 8 Pin, R = 4.7kΩ 5 ma ontrolled Time Detect Short-ircuit 1 t trip1 Pin 1: 15V and More, Pin 2: Open 2.6 µs ontrolled Time Detect Short-ircuit 2** t trip2 Pin 1: 15V and More, Pins 2-4: 1pF 3 µs (onnective apacitance) S Detect Voltage V S ollector Voltage of Module 15 Volts **Length of wiring capacitor controlled time detect short-circuit is within 5cm from Pin 2 and Pin 4 coming and going. Rev. 4/7

3 Powerex, Inc., 173 Pavilion Lane, Youngwood, Pennsylvania (724) Application ircuit 5V ONTROL FAULT B1 PS trip 3V V 4.7k IBT MODUL V omponent Selection: Design Description V, V 15V/-1V Typical, See data sheet for usable limits Adjust for application requirements. See IBT module application notes for recommendations and power rating 1, 2 1µF-1µF 25V low impedance electrolytic Ultra fast recovery t rr <1ns, High voltage V rrm >V ces (IBT) trip -2pF adjusts desaturation trip time (t trip ) B1 MOS Buffer 74H4 or similar Must actively pull high to maintain noise immunity Single Supply Operation Notes: (1) Power supply decoupling capacitors 1 and 2 should be connected as close as possible to the pins of the gate driver and must be sized to have appropriate SR and ripple current capability for the IBT being driven. (2) trip should be connected as close as possible to the pins of the gate driver to avoid noise pick-up. (3) All zener diodes 1W, all resistors.25w unless otherwise noted. 5V ONTROL FAULT B1 PS trip 3V 2.7k 4.7k IBT MODUL V 8.2V Rev. 4/7

4 Powerex, Inc., 173 Pavilion Lane, Youngwood, Pennsylvania (724) PROPAATION DLAY TIM L-H, t PLH, (µs) PROPAATION DLAY TIM H-L, t PHL, (µs) PROPAATION DLAY TIM VS. AMBINT HARATRT V = 15V V = 1V = 12W V IN = 5.V t PHL t PLH.2 LOAD: M2DY AMBINT TMPRATUR, T a, ( ) PROPAATION DLAY TIM L-H, t PLH, (µs) PROPAATION DLAY TIM H-L, t PHL, (µs) PROPAATION DLAY TIM VS. INPUT VOLTA HARATRT V = 15V V = 1V = 12W T a = 25 LOAD: M2DY-12 t PHL t PLH INPUT SINAL VOLTA, V i, (VOLTS) ONTROLLD TIM SHORT-IRUIT DTT, t trip1, t trip2, (µs) PROPAATION DLAY TIM AMBINT TMPRATUR HARATRT VS. 6 V = 15V V 5 = -1V t trip2 : trip = 1pF t trip1 : trip = pf AMBINT TMPRATUR, T a, ( ) ONTROLLD TIM SHORT-IRUIT DTT, t trip, (µs) ONTROLLD TIM SHORT-IRUIT DTT VS. ONNTIV APAITAN HARATRT 9 V 8 = 15V V = -1V 7 T a = POWR DSIPATION, P D, (WATTS) POWR DSIPATION VS. AMBINT TMPRATUR HARATRT (MAXIMUM RATIN) QUNT URRNT, I D, (mamprs) QUNT URRNT VS. SUPPLY VOLTA HARATRT (PIN: 4 6) INPUT SINAL L 25 T a = ONNTIV APAITAN, trip, (p F ) (PIN: 2 4) AMBINT TMPRATUR, T a, ( ) SUPPLY VOLTA, V, (VOLTS) (PIN: 4 6) SWITHIN TIM DFINITIONS V IN (PIN 14 TO 13) t r tf 9% 5% V O (PIN 5 TO 6) t PLH t PHL 1% 4 Rev. 4/7

5 Powerex, Inc., 173 Pavilion Lane, Youngwood, Pennsylvania (724) eneral Description The -1 is a hybrid integrated circuit designed to provide gate drive for high power IBT modules. This circuit has been optimized for use with Powerex NF-Series and A-Series IBT modules. However, the output characteristics are compatible with most MOS gated power devices. The features a compact single-in-line package design. The upright mounting minimizes required printed circuit board space to allow efficient and flexible layout. The converts logic level control signals into fully isolated 15V/-8V gate drive with up to 5A of peak drive current. ontrol signal isolation is provided by an integrated high speed opto-coupler. Short circuit protection is provided by means of destauration detection. Short ircuit Protection Figure 1 shows a block diagram of a typical desaturation detector. In this circuit, a high voltage fast recovery diode () is connected to the IBT s collector to monitor the collector to emitter voltage. When the IBT is in the off state, V is high and is reverse biased. With off the () input of the comparator is pulled up to the positive gate drive power supply (V) which is normally 15V. When the IBT turns on, the comparators () input is pulled down by to the IBT s V (sat). The (-) input of the comparator is supplied with a fixed voltage (V TRIP ). During a normal on-state condition the comparator s () input will be less than V TRIP and it s output will be low. During a normal off-state condition the comparator s () input will be larger than INPUT DLAY t trip AND AT DRIV OMPAR SHUTDOWN V V trip IBT MODUL Figure 1. Desaturation Detector V TRIP and it s output will be high. If the IBT turns on into a short circuit, the high current will cause the IBT s collector-emitter voltage to rise above V TRIP even though the gate of the IBT is being driven on. This abnormal presence of high V when the IBT is supposed to be on is often called desaturation. Desaturation can be detected by a logical AND of the driver s input signal and the comparator output. When the output of the AND goes high a short circuit is indicated. The output of the AND can be used to command the IBT to shut down in order to protect it from the short circuit. A delay (t TRIP ) must be provided after the comparator output to allow for the normal turn on time of the IBT. The ttrip delay is set so that the IBTs Vce has enough time to fall below V TRIP during normal turn on switching. If t TRIP is set too short, erroneous desaturation detection will occur. The maximum allowable t TRIP delay is limited by the IBT s short circuit withstanding capability. In typical applications using Powerex IBT modules the recommended limit is 1μs. Operation of the Desaturation Detector The Powerex incorporates short circuit protection using desaturation detection as described above. A flow chart for the logical operation of the short-circuit protection is shown in Figure 2. When a desaturation is detected the hybrid gate driver performs a soft shut down of the IBT and starts a timed (t timer ) 1.5ms lock out. The soft turn-off helps to limit the transient voltage that may be generated while interrupting the large short circuit current flowing in the IBT. During the lock out the driver pulls Pin 8 low to indicate the fault status. Normal operation of the driver will resume after the lockout time has expired and the control input signal returns to its off state. Adjustment of Trip Time The has a default short-circuit detection time delay (t TRIP ) of approximately 2.5μs. This will prevent erroneous detection of short-circuit conditions as long as the series gate resistance ( ) is near the minimum recommended value for the module being used. The 2.5μs delay is appropriate for most applications so adjustment will not be necessary. However, in some low frequency applications it may be desirable to use a larger series gate resistor to slow the switching of the IBT, reduce noise, and limit turn-off transient voltages. When R is increased, the switching delay time of the IBT will also increase. If the delay Rev. 4/7

6 Powerex, Inc., 173 Pavilion Lane, Youngwood, Pennsylvania (724) START V > V S YS INPUT SINAL ON becomes long enough so that the voltage on the detect Pin 1 is greater than V S at the end of the t TRIP delay the driver will erroneously indicate that a short circuit has occurred. To avoid this condition the has provisions for extending the t TRIP delay by connecting a capacitor ( TRIP ) between Pin 2 and V (Pins 4). The effect of adding TRIP on trip time is shown in Figure 3. If t TRIP is extended care must be exercised not to exceed the short-circuit withstanding capability of the IBT module. Normally this will be satisfied for Powerex NF and A-Series IBT modules as long as the total shut-down time does not exceed 1μs. YS DLAY t trip FAULT SINAL (PIN 8) 1V t timer 1V YS t trip V > V S YS SLOW SHUTDOWN DABL OUTPUT ST FAULT SINAL WAIT t timer -5V V O (PIN 5) Figure 3. Adjustment of ttrip YS INPUT SINAL OFF YS LAR FAULT SINAL NABL OUTPUT Figure 2. Desaturation Detector Rev. 4/7