Design of LNA and MIXER for CMOS Receiver Front ends

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1 Design of LNA and MIXER for CMOS Receiver Front ends R.K.Sreelakshmi and D.Sharath Babu Rao 2 PG Scholar, Dept of ECE (VLSI&ES), GPREC (Autonomous), JNTUA, Kurnool, AP, India. 2 Assistant Professor, Dept of ECE, GPREC (Autonomous), JNTUA, Kurnool, AP, India. Abstract A CMOS receiver architecture with combined LNA and Mixer is presented in this paper. This architecture works at 2.4 GHz RF frequency. These two components play a key role in wireless CMOS receivers. They serve as receiver front end. Cadence virtuoso tool is used to design LNA and Mixer (80nm).In this design, differential LNA is used, in order to achieve high gain and low noise figure and regarding the mixer, Gilbert Mixer which has high conversion gain is used. The measurement results show that gain of 22db and Noise figure of 7db. Index Terms Mixer, LNA I. INTRODUCTION Over the last decade the proliferation of wireless communication has played a significant role in accessing and using the ever increasing amount of data that surround us. In wireless communication products demand is increasing for high bit rate. The important issues for developing components of wireless communications systems are low power and highly integrated circuits(ic).a wide network of sensors autonomously monitor biomedical and environmental conditions due to advances in the semiconductor and wireless industry which have enabled a plethora of technologies. The design of ultralow power radio frequency (RF) transceivers is vital to the existence of such wireless sensor networks. In addition low power consumption is critical to reduce dead weight on battery most notably in portable devices. The reduction of power consumption of radio frequency front end is very important in wireless communications. Radio frequency front end mainly consists of two paths, namely receive path (RX) and transmit path (TX). In this paper, the main aim is to reduce the power consumption in the receive path of the radio frequency (RF). Strictly speaking, there are three general approaches for designing low power receive path(rx).the same technique can also be applied to the building blocks of transmit (TX)path. The straight forward and general approach is to independently optimise the power consumption of each block in the receive path (RX), e.g. low noise amplifier (LNA), mixer and voltage controlled oscillator (VCO). The subsequent approach is to combine and co design two or more receiver blocks in a single block and thus saving the power by reusing the bias currents. The final approach is to use appropriate techniques to extract the information from the RF received signal without using traditional low noise amplification and down conversion techniques. The prominent solutions in the third class are envelope detectors, super regenerative receivers and injection locked based demodulators. However these techniques are application specific and may only appropriate for specific modulation schemes. For this reason the main focus is on the second approach which offers cascade of blocks and can be used for any modulation scheme. There are three ways of combining receiver blocks. There are three prevalent ways of combining receiver blocks. These include the combination of voltage controlled oscillator and mixer which is commonly called as self oscillating mixer(som).this structure has moderate noise figure(nf) and voltage gain in order to compensate this a pre low noise amplifier is needed. Another technique combines LNA, VCO and mixer although it is interesting structure but its power consumption is in the range of mw which is not preferred for wireless sense networks (WSN) applications. The combination of blocks which is used in this work is LNA (low noise Amplifier) and mixer which is commonly known as Low Noise Converter (LNC), this structure offers a good amount of voltage gain and noise figure (NF). IJIRT INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH IN TECHNOLOGY 97

2 smaller than the output resistance of M.By using power constraint noise optimisation technique the width of M is obtained as the following. Fig : Block Diagram of LNA and MIXER II. LNA DESIGN The low noise amplifier (LNA) is the first building block of wireless sensor node receiver. It plays a crucial role in the receiver chain.lna receives very low power signal coming from the antenna and amplifies it and decreases the noise as much as possible. The noise performance mostly influences the overall system noise performance. The performance of LNA is mainly affected by three parameters. The first one is the input impedance of LNA should be matched to the impedance of antenna which is typically in range of 50Ω.The subsequent one is the noise figure of LNA should be minimised because it directly adds to the total noise of the receiver. The final and most important one is the gain of the amplifier should be large as it deduces the effect of noise from subsequent blocks. The design of LNA involves trade off between gain, linearity, and noise figure (NF) and power consumption. The design optimisation technique is used to get trade off between gain and linearity Different topologies of LNA available, among them inductive degenerated differential LNA (low noise amplifier) is used in this work. The source degenerated LNA is shown in the fig.inductane L d which is at drain of M 2 along with node capacitance resonate at the operating frequency and provide M 3 and it is also in current mirror connection with M and their ratio will determine the current through the cascade branch.the voltage across gate source of M is determined by the proper selection of width of M.The value of the resistance R should be greater than the output impedance of preceding stage. The infinite input impedance is provided to the cascade by M.The advantage of cascode is that it is able to reduce the effect of gate to drain capacitance i.e., miller capacitance since the input resistance of M 2 is much Fig 2 Source degenerate LNA W opt = W opt = 3 2c ox LQ in R s 3L R s C ox L is the effective channel length of the transistor M W opt is the width transistor M C ox is the oxide capacitance Q in is the input quality factor The parameters L g and L s which are used for input impedence matching are obtained by using equivalent small signal.the small signal model which is used for input impedence matching is shown below Fig 3 : Small signal Model for Fig The input impedance can be calculated from small signal model and it is given by At resonance Z in (j ) = g m L s C gs + j[ (L g +L s ) - C gs ] IJIRT INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH IN TECHNOLOGY 98

3 2 0 = (L g +L s )C gs The differential LNA can be designed from single ended source degenerated LNA. It has several important advantages when compared to single ended circuits. The main advantage of using differential LNA is, it offers a stable reference point. The measured values of this LNA are always taken with respect to other half circuit. The main benefit of using this LNA over other topologies is noise reduction. Two single ended circuits are needed in order to make one differential circuit in which each transistor and circuit has complimentary transistor. The positive voltage is applied to the gate of one half circuit while negative voltage is applied to the gate another half circuit. The small signal model of differential LNA is shown below. III. LNA RESULTS Fig 6 : S (input return Loss) Fig 7: S22 (output return loss) Z in (s) = Fig 4 Small signal model for differential LNA SC gs + s( L g +L s ) + g m C L s gs C gs =C gs +C x The schematic circuit of Differential LNA is shown below. Fig 8 S2 (forward gain) Fig 5 Differential LNA IJIRT INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH IN TECHNOLOGY 99

4 Fig 9 : S2 (Reverse gain ) Fig 0 : Noise figure Fig : IIP3 (Input Intercept Point) IV. DESIGN OF MIXER Mixer is an essential component in the wireless sense networks. It is a non linear device which performs frequency translation. It works on the principle that incoming Local oscillator (LO) RF drive would cause switching radio frequency (RF) to intermediate frequency (IF)[7]. Translation of frequency makes signal processing easier. Conversion of RF (radio frequency) to IF (intermediate frequency) is called down conversion which is used in receivers. The conversion process is performed by multiplying RF signal and LO signals in time domain. The design metrics regarding mixer are noise figure (NF), linearity, conversion gain and linearity. Non linearity of mixer plays an effective role in frequency translation which produces sum and difference of signals [9].Different topologies of mixer are available, active and passive. Passive mixers although have better IM3 performance, high conversion losses and noise figure when compared to the active mixer. Furthermore there are single balanced and double balanced mixers. Single balanced mixers are simple in design but have poor performance in terms of RF to LO and RF to IF isolation when compared to double balanced mixer. Among them double balanced Gilbert mixer is preferred. It is an active mixer. Gilbert mixer is used in this work [0].Gilbert mixer consists of four stages. Gain stage: It is considered as the first stage of the mixer it should have high linearity in order to handle the high power coming from the amplifier in the circuit. The transistors are biased such that they remain in saturation region. Gain of the amplifier is directly proportional to the g m of the circuit.increasing current also increases the gain which is shown below. g m = 2I d V gs Vt Switching stage: The transistors in the switching stage also should operate in the saturation region in order to enable perfect switching and reduce the feed through. When one transistor pair is conducting other pair should be completely off. When two pairs conduct at the same time there is possibility of more noise. LO signals should be reasonably large in order to make sure mixer switches properly. Current sink: Current mirror in the circuit provide current sink for the mixer. Transistors in the current sink should remain in saturation region. Differential Output: The output of the mixer is taken at the IF+ and IF- terminals. The load resistor is adjusted in order to increase the gain of the amplifier. Gilbert mixer exploits the symmetry and removes unwanted RF and LO from IF by cancellation. The RF signal is applied to M and M 2 transistor pair which performs voltage to current conversion. By adding degeneration resistors to the source terminals of M 2 and M 3 the performance can be improved.in order to have proper operation, these devices should IJIRT INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH IN TECHNOLOGY 00

5 not be driven into saturation. The transistors M 4 through M 7 form multiplication function.when the voltage at LO- terminal is large then M 3 and M 6 are turnd ON and the voltage at LO+ is small then the transistors M 4 and M 5 are turned OFF.As a result, M 6 is connected toright R l and M 3 is connected to left R l.these transistorsact as closed switches during this cycle.in the next cycle, the voltage at the terminal LO+ is large when compared to the voltage at LO- terminal then the transistors M 4, M 5 are turned ON.The transistors M 3 and M 6 are turned OFF.As a result M 4 is connected to left R l and M 5 is connecedto right R l They multiply RF signal current from M 2 and M 3 with the LO signal applied across M 4 and M 7.Thse transisitors act as closed switches.the two resistorsa the load form current to voltage transformation which gives differential output IF signal.since it forms a differential configuration the output at IF terminal will have same value of previous output but of opposite polarity. The biasing stage is added to the Gilbert Mixer circuit in order to provide an appropriate RF signal so that it does not disturb the DC bias point. Resistance R is adjusted in order to transfer the exact voltage of transistor M 0 as input RF signal to the RF terminals of gain stage. Proper biasing is needed to provide effective isolation the RF terminals which act as input to the Mixer stage. The schematic circuit of Gilbert Mixer is shown below. The conversion gain of mixer is given by the following G c = 2 g mr L G c = 2 µ nc ox W L I tail R L VI. V. MIXER RESULTS Fig 3 : Conversion Gain Fig 4 : IIP3 ( Input Intercept point) LNA + MIXER SIMULATION RESULTS The LNA and Mixer are combined in order to ensure the matching between interfaces, whether it is designed correctly or not. Fig 2 Gilbert Mixer Fig 5: Voltage Conversion Gain of Cascade LNA and mixer IJIRT INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH IN TECHNOLOGY 0

6 Fig 6: S of cascaded LNA and Mixer Fig 7: Noise figure of LNA and Mixer VII. CONCLUSION In this paper,a diffeerential LNA is integrated with double balanced gilbert mixer for wireless communication was successfully designed and verified using CADENCE 80nm technology. By simulating LNA input return loss(s ) of -.9db,forward gain of 25db,Noise figure of 0.5db,IIP3 of.86 dbm are observed.simulating Gilbert mixer conversion gain 6.6db of and IIP3(Input Intercept Point).5dbm. The proposed LNA mixer combination operates at 2.4 Ghz has a input return loss 0f -37dBm(S ), Noise figure of 7db and overall conversion gain of 22db. REFERENCES Frequency Integrated circuits symposium pp (99-202) balti more, USA June 20 by Taris, T., Begueret J B., and Deval 20. [ 3 ] CMOS tehnology for analog and RF IC design by B.Razavi. IEEE solid J.solid stuie circuits Vol.34, pp March 999. [ 4 ] Pletcher N, M., Gambini S., and Rabaey J.(2009).A 52µW wake up receiver using an uncertain IF architecture. IEEE journal of Solid state circuits 44() [ 5 ] An ultracompact wideband combined LNA oscillator and mixer in biomedical applicaions by Ortiguera E., Fernandes J.,Silva M., & Oliveira L.B(202).In IEEE Midwest Symposium On circuits and systems (pp 62-65) Boise, USA, August 202. [ 6 ] R M Weng C Y Liu and P C Lin.A low power full band LNA for ultrawide band receivers. IEEE Trans. Microwave Theory and Techniques, Vol 58no.8pp ,June 200. [ 7 ] Design of CMOS integrated circuits by Thomas H Lee. [ 8 ] M.Muhamad, N.Soin H. Ramiah N.M.Noh W.K. Chong.Design Of CMOS Differential LNA at 2.4 Ghz /3,203 IEEE. [ 9 ] Pham B.A.9GHz Gilbert Mixer in 80nm CMOS for a cabel tuner Department of Electronics, Carleton University Canada, [ 0 ] S.Long Agilent EEs of EDA-RFIC MOS Gilbert cell Mixer Design, June 999. [ ] Cadence Design Systems. Virtuoso Spectre Circuit Simulator RF Analysis User Guide, Unites states of America [ ] IEEE journal of solid state circuits 42(5) A low power current reused 2.4GHz receiver front end and frequency source for wireless sensor networks by Song T., H.S Oh, Yoon E., and Hong S.(2007). [ 2 ] A 60µW LNA for 2.4Ghz wireless sensor network applications. In IEEE Radio IJIRT INTERNATIONAL JOURNAL OF INNOVATIVE RESEARCH IN TECHNOLOGY 02