Analysis and Implementation of a Half Bridge Class-DE Rectifier for Front-End ZVS Push-Pull Resonant Converters

Transcription

1 66 Jounal of Powe Electonics, ol. 13, No. 4, July 13 JPE htt://dx.doi.og/1.6113/jpe Analysis and Imlementation of a Half Bidge lass-de Rectifie fo Font-End ZS Push-Pull Resonant onvetes hainain Ekkaavaodome and Kamon Jiaseeeamonkul * Det. of Instumentation and Electonics Engineeing, King Mongkut s Univesity of Technology Noth Bangkok, Bangkok, Thailand * Det. of Electonic and Telecommunication Engineeing, King Mongkut s Univesity of Technology Thonbui, Bangkok, Thailand Abstact An analysis of the junction caacitance in esonant ectifies which has a significant imact on the oeating oint of esonance cicuits is studied in this ae, whee the junction caacitance of the ectifie diode is to decease the esonant cuent and outut voltage in the cicuit when comaed with that in an ideal ectifie diode. This can be eesented by a simlified seies esonant equivalent cicuit and a voltage tansfe function vesus the nomalized oeating fequency at vaied values of the esonant caacito. A low voltage to high voltage ush-ull D/D esonant convete was used as a design examle. The design ocedue is based on the incile of the half bidge class-de esonant ectifie, which ensues moe accuate esults. The oosed scheme ovides a moe systematic and feasible solution than the conventional esonant ush-ull D/D convete analysis methodology. To incease cicuit efficiency, the main switches and the ectifie diodes can be oeated unde the zeo-voltage and zeo-cuent switching conditions, esectively. In ode to achieve this objective, the aametes of the D/D convete need to be designed oely. The details of the analysis and design of this D/D convete s comonents ae descibed. A ototye was constucted with a 6 88 khz vaiable switching fequency, a 1 D inut voltage, a 38 D outut voltage, and a ated outut owe of 15 W. The validity of this aoach was confimed by simulation and exeimental esults. Key wods: lass-de esonant ectifie, Push-ull esonant convete, Zeo-cuent switching, Zeo-voltage switching I. INTRODUTION The ush-ull esonant convete toologies in [1]-[3] wee used in font-end D/D convetes fo distibuted owe geneation based on battey-based enegy stoage o enewable enegy systems [4]-[8] such as hotovoltaic, fuel cells, wind tubines, etc. The ush-ull esonant convete toology is suitable fo unegulated low-voltage, D, to high-voltage, HD, owe convesion systems, which feed stand-alone and gid-connected invetes. The owe conditioning system achitectue consists of a fist stage D/D convete and a second stage D/A invete, Manuscit eceived Jan. 13, 13; evised A. 3, 13 Recommended fo ublication by Associate Edito Joung-Hu Pak oesonding Autho: chainaine@kmutnb.ac.th Tel: , Fax: , KMUTNB * Det. of Electonic and Telecommunication Engineeing, King Mongkut s Univesity of Technology Thonbui, Thailand D HD Fig. 1. Powe conditioning system fo enewable enegy. and is deicted in Fig. 1. The advantages of the ush-ull esonant convetes include thei low comonent count and thei ability to oeate unde zeo voltage switching (ZS) and zeo cuent switching (ZS) conditions [9], [1]. These advantages esult in a highe oveall system efficiency. Fo highe owe alications, aalleling D/D convetes is a bette choice than aalleling too many owe MOSFETs [11], [1]. Thee ae active aalleling techniques with the cuent shaing contol method. Howeve, they make the contolle moe comlicated and incease the contolle cost. uent fed ush-ull convetes that use only an inut

2 Jounal of Powe Electonics, ol. 13, No. 4, July :1: n TR N N N P1 : P : S s u P1 u i P in i M u D1 D i D i R P1 lp1 ls mp1 S u DS1 M u DS M D P mp lp 1:1: n N : N : N P1 P S (a) (b) Fig.. Poosed ZS ush-ull esonant convete and tansfome model. inducto to obtain a small ile in the inut cuent have been esented [13], [14]. In eality, the junction caacitance of the ectifie diode of a ush-ull esonant D/D convete cannot be neglected in high voltage and high-fequency oeations. This is because the junction caacitance deceases the esonant cuent and outut voltage. Due to the effect of the junction caacitance, it is vey difficult to design all of the aametes fo the convete [15-16]. The objective of this ae is to intoduce an analysis of the junction caacitance in a half bidge ectifie diode which has a significant imact on the oeating oint of the esonance cicuit. This is accomlished by using the incile of a half bidge class-de ectifie with a ush-ull esonant convete. The oosed scheme ensues moe accuate esults and ovides a moe systematic and feasible solution. The effects of the commutation of the tansfome magnetizing cuent, the dain-souce junction caacitance, the leakage inductance of the tansfome, the esonant caacitance, the owe MOSFETs and the owe diodes can be tuned on unde the ZS and tuned off unde the ZS conditions, esectively. In ode to achieve this objective, the aametes of the D/D convete need to be designed oely and the details of analysis and design of this D/D convete s comonents need to descibe. This ae is divided into six sections. In Section II, the cicuit descition is esented. In Section III, an analysis of the junction caacitance in the half bidge class-de esonant ectifie fo a ZS ush-ull esonant convete is esented. The design ocedue fo the comonents is eoted in Section I. Simulation and exeimental esults to suot the theoetical analysis ae esented in Section. Some conclusions ae given in Section I. II. IRUIT DESRIPTION Figue (a) illustates the cicuit of the oosed ZS ush-ull esonant convete with a half bidge class-de esonant ectifie studied in this ae. It consists of a high-fequency cente-taed tansfome TR, and has a cente-ta at the imay winding of the ush-ull tye convete. The ZS ush-ull esonant convete is comosed of bidiectional two-quadant switches, and M, with a duty atio of nealy.5. Each switch is comosed of a tansisto and an anti-aallel diode. The switch can conduct eithe ositive o negative cuent. The outut voltage egulation is contolled by vaying the oeating fequency. The esonant inducto,, consists of the seconday leakage inducto of the high-fequency tansfome, ls, and two additional imay leakage inductos, lp1 and lp. It is: n ( lp1 lp ) æ ö + ç + ls è ø The value of the leakage inducto of the high-fequency tansfome deends on the hysical conditions [17] such as the magnetic mateial, ai ga size, winding, etc. The equivalent cicuit of the tansfome is illustated in Fig. (b), whee the aamete values of the tansfome ae measued by an R mete. Howeve, the magnetizing inducto of the tansfome is vey lage. Thus the magnetizing cuent can be neglected. The esonant caacito,, is elatively the seies caacito, s, and the junction caacitos, 1 of half bidge class-de esonant ectifie diode. and ae emloyed to achieve soft switching oeation. The class-de ectifie makes the outut voltage equal to twice the eak outut of the tansfome by a two bulk-filte caacitos, 1, whee caacito is lage enough. Theefoe, the outut voltage,, can be consideed as constant and is sulies a load esisto, R. The seies cicuit, s, is fed by the squae-wave outut voltage of the seconday side of the high-fequency tansfome and conveted to a high-fequency cuent souce to dive the half bidge class-de esonant ectifie. (1)

3 68 Jounal of Powe Electonics, ol. 13, No. 4, July 13 u DS1 i u DS i M u D1 i D1 i D1 u D I m in I I D w t s w t s w t s w t s w t s w t s w t s w t s w t s w t s w t s ZS condition by commutation of the tansfome magnetizing cuent and dain-souce junction caacitance. At the same time, the junction caacito voltage uds of switch M is chaged fom zeo to in. In the seconday side, diode D tuns off unde the zeo-cuent condition by cuent i D though the ectifie diode by the seies esonant cicuit. Mode : This mode is the commutation time of the convete. Switches and M ae tuned off. The junction caacito between the dain-souce of switch, M1, chages voltage uds1 until it is inceased to in and the junction caacito between the dain-souce of switch M, M, dischages voltageuds until it is educed fom in to zeo. Simultaneously, the half bidge ectifie junction caacito 1 of diode dischages to zeo and junction caacito of diode D chages fom zeo until its voltage eaches as shown in Fig. 4(b). Mode 3: Figue 4(c) shows that junction caacito voltage of switch is comletely chaged anduds1 inceases to in. Then is tuned off unde the zeo-cuent condition. Switch M begins conducting. uent i M though switch M at imay side of the tansfome oeates at zeo-voltage. At the same time, diode ectifie of the class-de ectifie tuns off unde the zeo-cuent condition by cuent i D1 though the ectifie diode. i D i D Mode1 Mode Mode3 Mode4 Fig. 3. Key wavefoms of the oosed ush-ull convete. III. w s t w s t ANAYSIS OF THE JUNTION APAITANE IN HAF BRIDGE ASS-DE RETIFIER DIODES The incile of oeation of the half bidge class-de ectifie with a ush-ull esonant convete is exlained by the wavefoms shown in Fig. 3. The main switches and the ectifie diodes can oeate unde ZS and ZS conditions, esectively. It is easonable to conside the tansfome seconday side as a sinusoidal cuent souce, which is also the inut cuent souce of the half bidge class-de ectifie. The oeation of the oosed convete can be divided into fou modes. The cicuit schemes of the oeating modes ae deicted in Fig. 4. A detailed analysis of the comlete oeation including the fou modes is descibed as follows: Mode 1: In this mode, deicted in Fig. 4(a), the junction caacito voltage of switch is comletely dischaged and deceases to zeo. Then switch is tuns on unde the uds1 Mode 4: In Fig. 4(d), both switches and M ae tuned off, the junction caacito between the dain-souce of switch, M1, dischages voltage uds1 fom in until its voltage educes to zeo. The junction caacito between the dain-souce of switch M, M, chages voltageuds until it is inceased to in. Simultaneously, at the half bidge ectifie, junction caacito 1 of diode is chaged until its voltage eaches and junction caacito of diode D dischages its voltage to zeo. Then, D tuns off unde zeo-cuent. It should be noted that the cicuits in Fig. 4(b) and (d), effects the commutation of the tansfome magnetizing cuent and the dain-souce junction caacitances, M1 and M of switches, and M. The owe MOSFETs can be tuned on unde ZS, when the voltage of the aasitic dain-souce caacito falls to zeo. Howeve, the switch must be tuned on befoe ( t ) is inceased to /. The aasitic dain-souce caacito is chaged again to exceed zeo when ( t ) is equal to /. Thus the main switch is not oeated unde ZS. Theefoe, the dead time in this oosed ush-ull esonant convete is lagely fom oeating modes and 4. The analysis of the junction caacitance in the half bidge class-de esonant ectifie fo ush-ull ZS esonant

4 Jounal of Powe Electonics, ol. 13, No. 4, July convetes is demonstated by the equivalent cicuit, as shown in Fig. 5. The diode,, of the half bidge class-de esonant ectifie oeates duing the ositive half-cycle of the high-fequency tansfome seconday side squae-wave voltage, while the equivalent cicuits of seconday side of the high-fequency tansfome ae modeled by a squaewave voltage souce, us. The fundamental comonent is us ( t) S sin wst, whee w s is the switching angula fequency and the diode, D, oeates duing the negative half-cycle. The equivalent cicuit descibing the imact of the junction caacitance of the half bidge class-de esonant ectifie diode in high outut voltage and high switching fequency i u D1 D D (a) i D1 D i R i R D i D1 D1 (b) i i R R i i Z i D (c) Z i (d) M in u DS1 u DS M (a) Mode 1 i D D s is R is us i R is Z i (e) (f) i M in u DS1 u DS D Fig. 5. The equivalent cicuit descibing the imact of the junction caacitance of the half bidge class-de ectifie diode. i M in M u DS1 u DS i M in M u DS1 u DS M (b) Mode M (c) Mode 3 M (d) Mode 4 i D1 D D Fig. 4. The oeation mode of the oosed cicuit. oeations is shown in Fig. 5(a). Because the two dc voltage souces, /, aeas as a shot cicuit to the ac comonent, the junction caacitos, 1 and, ae intechangeable, as shown in Fig. 5(b). In this cicuit, caacito E1 is connected in aallel with caacito and they can be combined into one caacito 1 +, as shown in Fig. 5(c). Figue 5(d) illustates the model of the half bidge class-de ectifie with a ush-ull esonant convete. The inut imedance of the class-de ectifie is eesented by a aallel R i i cicuit, which can then be conveted into a seies combination of the inut esisto, R is, and the inut caacito, is, based on the incile of the half bidge class-de ectifie [18-], as shown in Fig. 5(e). Howeve, the value of the inut caacito, is, of the half bidge class-de ectifie deends on the junction caacitance in ectifie diode,, which has a significant imact on the oeating oint of the esonance cicuit, as shown in Fig. 5(f). Hence, the nomalized inut imedance of the half bidge class-de ectifie can be descibed by: Zi ws DZi Ris - jxis () whee R is and X is ae the nomalized esistance and eactance which can be obtained by:

5 63 Jounal of Powe Electonics, ol. 13, No. 4, July 13 8R Ris ( + R ) 8R æ - R ö 1-1æ - R X cos ö is - ç ( R) ç è + ø è + R ø The seies caacitos s is cicuit is elaced by an equivalent caacito, which is eesented by s is /( s + is ), as shown in Fig. 5(f). As a esult, the junction caacitance in the half bidge class-de esonant ectifie diode is highly imotant because of the effects of the esonance, which ensues moe accuate esults than the ush-ull esonant convetes eoted eviously [13-14]. The lots of the magnitude of the A/D voltage tansfe function / S vesus the oeating fequency f s /f at vaied values of the esonant caacito,, ae shown in Fig. 6. It can be seen the imact of the junction caacitance of the ectifie diode cannot be neglected, because the junction caacitance is to decease the outut voltage of the oosed cicuit. The ange of is fom 1.5 to.. With the above design, the oeating egion of the convete is shown as the shaded aea in Fig. 7. It can be seen fom the oeating egion that unde a light load, the switching fequency needs to incease a geat deal to kee the outut voltage egulated. This is a main dawback fo seies esonant convetes. Thus the ush-ull D/D convete oosed in this ae is suitable fo a naow load ange. I. DESIGN PROEDURE The design of the oosed ZS ush-ull esonant convete with a half bidge class-de ectifie can be functionally divided into two ats: the ZS ush-ull convete and the ZS half bidge class-de ectifie. The design ocedue fo the ZS ush-ull esonant convete with the effect of the junction caacitance, by using the incile of the class-de esonant ectifie is detemined as follows: 1. hooses the outut voltage,, and the maximum outut owe, P out, and then calculate the minimum load, R min.. Find the loaded-quality facto,, value by assuming that the switching fequency, f s, is aoximately equal to the esonant fequency, f, fo full owe. 3. Find the inut imedance of the half bidge class-de esonant ectifie, Z i_f R is_f jx is_f. 4. Find the esonant inducto,, which is comosed of the seconday leakage inducto, ls, and two additional imay leakage inductos, lp1 and lp. 5. Find the esonant caacito,. 6. Find the seies caacito, s, which is elated to the esonant caacito,, and the inut caacitance, is, of half bidge class-de esonant ectifie. 7. Find the value of outut caacito,, choose the ile (3) (4) out / S f / f Fig. 6. / S vesus f s /f at vaied values of esonant caacito. out / S Oeation Region f / f s s 3 4 Fig. 7. / S vesus f s /f at vaied values of quality facto. voltage and assume that the is lage enough. Thus can be consideed as a constant. 8. Finally, the tansfome design of the oosed ZS ush-ull esonant convete with a half bidge class-de esonant ectifie is the same as the ulse-width modulation (PWM) ush-ull D/D convete. A. D/D onvete Design The equivalent cicuit of the half bidge class-de ectifie with the ZS ush-ull convete is shown in Fig. 5. Fo steady-state oeation, whee the oeation at an 88 khz switching fequency, the inut voltage is in 1 D, the outut voltage is 38 D and R min is: R min out Poutmax W.. (5) whee the maximum outut owe is 15 W, the outut voltage [18] can be descibed by (6) and the maximum value of the esonant cuent, I, is given by (19): I R min + wsdrmin

6 Jounal of Powe Electonics, ol. 13, No. 4, July (6) + ( ) Assume that f s f at full owe. The loaded-quality facto,, is then given by: + πf R πf Ris s is is s is 3-6 π 88? 336?.96. (7) Unde a full load, the inut imedance of the half bidge class-de esonant ectifie can be exessed as: whee: Z i _ f Ris _ f - jxis _ f j7.96 W, (8) R R is fd( + R ) and: is ( )( +.16) D 8R æ - R ö 1-1æ - R cos ö - ç ( R) ç è + ø è + R ø W. (9) æ -.16 ö 1-1æ -.16 ö - cos ç (.16) ç è + ø è +.16 ø 7.7nF. (1) whee R 4 f R.16 is the nomalized effective D min load esistance. Hence, the esonant inducto is given by: R f The esonant caacito is obtained by: 1 fris is μH. (11) nF. (1) Howeve, to comensating the decease in the esonant caacitance,, due to the junction caacitance, is, with an incease in the seies caacito, s, is given by: Finally, the value of the outut caacito,, is used fo enegy stoage and to achieve a ile voltage, ile, of less than %. Thus the value of the filte caacito is given by: out ³ fsrminile nF. (14) Theefoe, a standad value of 1μF is selected fo. B. onduction oss Analysis The oosed cicuit is comosed of thee majo comonents. These thee comonents ae the owe MOSFET, owe diode, and ush-ull tansfome. The equivalent cicuit of the oosed convete fo conduction loss analysis is shown in Fig. 8. The MOSFETs ae modeled by switches with the on-esistances, DS1 and DS. The esistances, P1, P, and S eesent the equivalent esistances of the hysical imay and seconday leakage inductos, lp1, lp and ls of the tansfome, esectively. The owe diodes ae modeled by switches with the constant voltage souce, F, and the on-esistances, D1 and D. Theefoe, the maximum value of the dain cuent, I m, is given by (15). In testing the efficiency of the ush-ull tansfome unde full owe, it can be assumed that the total efficiency,h, was equal to.93. onsequently, the owe loss in each MOSFET fowad esistance, DS, is given by (16): I in I m P 15 out 1.11A. (15) h.93 1 in -3 ImDS P DS 51.34mW. (16) 4 4 The convete emloys (IRFP97 Intenational Rectifie) MOSFETs, each with an on-esistance, DS, of 4.5 mω. The owe loss in the diodes, D, due to the fowad voltage, D D1 D, is obtained as: P DB D I D D P out out mW. (17) 38 The half bidge ectifie was built using a (MUR84 Intesil) fast-ecovey diode with a n junction diode ( D 1.3 ). The ESR of the imay leakage inducto is P P1 P.9 mω. Theefoe, the conduction loss in the esonant inducto, P P1 P1, is: s is is nF. -9 (13) P -3 ImP W. (18) 4 4

7 63 Jounal of Powe Electonics, ol. 13, No. 4, July 13 Paamete TABE I IRUIT PARAMETERS OF THE PROTOTYPE Symbol alue and Pat Numbe Inut voltage in 1 D Outut voltage 38 D Maximum outut owe P out 15 W Switching fequency f s 6 88 khz Tuns atio N P1 : N P : N S 1 : 1 : 17 MOSFETs, M IRFP97 Fast ecovey diodes, D MUR84 Seies caacito s 1.16 nf Diode junction caacitos 1, 1 F Bulk-filte caacitos 1, 1 μf Resonant inducto 336 μh The aasitic esistance of the seconday leakage inducto, S, is 64 mω, and the maximum value of the esonant cuent, I, is given by (19). Thus the conduction loss in the inducto, ls, is obtained by (): ( + f R ) out D min I Rmin ( ) A. (19) -3 I S P s 49.3mW. () onduction losses due to the aasitic esistance in the all of caacitos ae vey small. Theefoe, thei affects wee neglected.. SIMUATION AND EXPERIMENTA RESUTS A. Simulation Results The simulated outut voltage vesus the vaied junction caacitance of the ectifie diode and the vaied switching fequency ae shown in Fig. 9 and 1, esectively. It can be seen that the imact of the junction caacitance of the ectifie diode cannot be neglected at high fequency and high voltage conditions, whee the lage junction caacitance of the ectifie diode and the high-fequency oeation ae to decease the outut voltage in the cicuit. These issues can be solved by using the incile of the half bidge class-de ectifie with a ush-ull esonant convete. The oosed scheme can ensues moe accuate esults and ovided a moe systematic and feasible solution than the conventional esonant ush-ull D/D convete analysis methodology. u DS1 i in DS1 i M DS P1 lp1 N P1 N P P u DS lp TR ls N S S s u D1 u D Fig. 8. Equivalent cicuit of the oosed cicuit. F 1 F1 D F F Figue 11 deicts the outut voltage vesus the vaied load esistance. It can be seen that the outut voltage egulation is contolled by the fequency modulation technique. The simulated wavefoms of the diode junction caacitance voltage and cuent of diode, the dain-souce voltage and dain cuent of MOSFET, and the inut cuent ae shown in Fig. 1. They oughly match the key wavefoms of the oosed ush-ull convete shown in Fig. 3. Due to the effects of the commutation of the tansfome magnetizing cuent and dain-souce junction caacitances, M1 and M, of switches, and M, the owe MOSFETs can be tuned on unde the ZS condition. The diode begins to tun off when its cuent eaches zeo. The cuent assing though Outut oltage, () Junction aacitance of Diode, (F) i R x1-1 Fig. 9. Simulated outut voltage vesus vaied junction caacitance of ectifie diode. Outut oltage, () Switching Fequency, f s (Hz) 5 x1 Fig. 1. Simulated outut voltage vesus vaied switching fequency.

8 Jounal of Powe Electonics, ol. 13, No. 4, July Outut oltage, () oad Resistance, R ( W) 3 x1 Fig. 11. Simulated outut voltage vesus vaied load esistance. constucted using the comonent values obtained fom the design ocedue given above. The cicuit aametes ae esented in Table I. The switching fequency was vaied at about 6 88 khz. The inut voltage was set to 1 D. The wavefoms of the inut cuent and esonant cuent ae shown in Fig. 14. These wavefoms show that the inut and esonant cuents become close to sinusoidal. The wavefoms of the switch voltage and switch cuent of ae deicted in Fig. 15. Figue 16 illustates the switch voltage and switch cuent wavefoms of D of the half bidge class-de ectifie. It can be seen that the owe MOSFETs and owe diodes ae u -u D1 D1 i D1.5A u DS1 μs i Fig. 13. omaison of the simulated esonant cuent wavefoms of the ideal and non-ideal diodes of the half bidge esonant ectifie. h1 1A Mode1 Mode Mode3 Mode4 Fig. 1. The simulated wavefoms of the junction caacitance diode voltage ud1 and cuent i D1 of diode, dain-souce voltage uds1 and cuent i M1 of switch, and inut cuent. the junction caacitances, 1 and, shaes the voltage acoss the diode in accodance with the equation id1, D1,d ( ud1, ) / dt. Because i D1, is zeo at tun-off, the diode tuns off at a low dυ/dt. The diode tuns off at a low dυ/dt to educe the tun-off switching loss and noise. Figue 13 shows the simulated esonant cuent wavefoms of the ideal diode and non-ideal diode of the half bidge esonant ectifie. These wavefoms show that the esonant cuent in the non-ideal diode of the half bidge esonant ectifie has to decease the value when comaed to the ideal diode. The highe value fo the junction caacitance is the main dawback of this cicuit. B. Exeimental Results A ototye of the oosed half bidge class-de esonant ectifie with a ZS ush-ull esonant convete was h μs Fig. 14. Exeimentations inut cuent and esonant cuent wavefoms. h1 h h1 h A ZS A u DS1 i B 1μs 1μs B 1A 1 1A 1 1A Fig. 15. Exeimentations switch voltage and cuent wavefoms of, with the lowe two wavefoms as zoomed-in views of the to two wavefoms.

9 634 Jounal of Powe Electonics, ol. 13, No. 4, July 13 h1 h h1 h A A u D i D B ZS 1μs 1μs B.5A.5A Fig. 16. The measued wavefoms of the diode voltage ud and cuent i D, with the lowe two wavefoms as zoomed-in views of the to two wavefoms. h1 Math h in P in 5μs 5 5W 1A Fig. 17. Measued inut voltage, cuent, and ated outut owe wavefoms. h (%) (W) P out Fig. 18. Efficiency as a function of outut owe. tuned on unde ZS and tuned off unde ZS conditions, esectively. This is due to the effects of the commutation of the tansfome magnetizing cuent, the dain-souce junction caacitance, the leakage inductance of the tansfome, and the esonant caacitance. The measued efficiency of the class-de ectifie with a ZS ush-ull convete was aoximately 9.97% at full owe, as shown in Fig. 17. Figue 18 shows the convesion efficiency vesus the outut owe when the sulied load is changed fom 3 to 15 W. The maximum convesion efficiency was %. () f s (W) P out f s (khz) Fig. 19. Outut voltage vesus outut owe and vaied switching fequency. Because the maximum efficiency occued in the high-fequency tansfome, the coe losses equal the coe losses. The min and max values of efficiency ae slightly diffeent. The elationshi of the outut owe and the convesion efficiency, when the switching fequency was vaied, is shown in Fig. 19. Thus the outut voltage egulation is contolled by the fequency modulation mean. It can be shown that the low voltage to high voltage esonant ush-ull D/D convete oosed in this ae is suitable fo a naow load ange. I. ONUSION In this ae, the junction caacitance in a half bidge ectifie diode which has a significant imact on the oeating oint of the esonance cicuit at high-fequency and high voltage conditions has been analyzed, by using the incile of the half bidge class-de esonant ectifie with a ush-ull esonant convete. The oosed scheme ensues moe accuate esults and ovided a moe systematic and feasible solution than the conventional esonant ush-ull D/D convete analysis methodology. All of the owe switches ae oeated unde the soft switching condition. The ototye font-end ZS ush-ull convete, oeate at a 6 88 khz vaiable fequency, and has a 1- D inut voltage, a 38- D outut voltage, and a ated outut owe of 15 W. The designed ZS class-de ectifie with a ZS ush-ull esonant convete had a measued efficiency of aoximately 9.97% at full owe. The esented simulation and exeimental esults veify the analysis. AKNOWEDGMENT This ae is suoted by the Deatment of Instumentation and Electonics Engineeing, Faculty of Engineeing, King Mongkut s Univesity of Technology Noth Bangkok and the Deatment of Electonic and Telecommunication Engineeing, Faculty of Engineeing,

10 Jounal of Powe Electonics, ol. 13, No. 4, July King Mongkut s Univesity of Technology Thonbui, Bangkok, Thailand. REFERENES [1] M.J. Ryan, W. E. Bumsickle, D.M. Divan, and R.D. oenz, A new ZS -esonant ush-ull D-D convete toology, IEEE Tans. Powe Electon., ol. 34, No. 5, , Se./Oct [] I. Boonyaoonate and S. Moi, A new ZS esonant ush-ull D/D convete toology, 17 th Annual IEEE Alied Powe Electonics onfeence and Exosition, ol., ,. [3] D. H. Han, Y. J. ee, W. S. Kwon, M. A. B. Rabee, and G. H. hoe, Imoving the oveall efficiency fo D/D convete with o-hi system, Jounal of Powe Electonics, ol. 1, No. 3, , May 1. [4] A. Emadi, and S.S. Williamson, Status eview of owe electonic convetes fo fuel cell alication, Jounal of Powe Electonics, ol. 1, No., , Oct. 1. [5] J. M. Han, B. H. Jeong, J. S. Sok, and G. H. hoe, Analysis of PWM convete fo -I outut chaacteistics of sola cell, Jounal of Powe Electonics, ol. 1, No.,. 6 67, Oct. 3. [6] P. Thounthong, S. Raël, and B. Davat, ontol algoithm of fuel cell and batteies fo distibuted geneation system, IEEE Tans. Enegy onves., ol. 3, No. 1, , Ma. 8. [7] P. Thounthong, B. Davat, S. Raël, and P. Sethakul, Fuel cell high owe alications, IEEE Industial Electonics Magazine, ol. 3, No. 1,. 3 46, Ma. 9. [8] P. Thounthong, S. Raël, and B. Davat, Enegy management of fuel cell/battey/suecaacito hybid owe souce fo vehicle alications, Jounal of Powe Souces, ol. 193, No. 1, , Jan. 9. [9] B.R. in and.a. in, Analysis and imlementation of a D-D convete with an active snubbe, Jounal of Powe Electonics, ol. 11, No. 6, , Nov. 11. [1] M. Boage, K.. Nagesh, M. S. Bhatia, and Sunil Tiwai, Aoximate equivalent-cicuit modeling and analysis of tye-ii esonant immittance convetes, Jounal of Powe Electonics, ol. 1, No., , Ma. 1. [11] D. Han, Y. ee, B. Jeong, and G. hoe, Multi-level esonant ush-ull convete fo fuel cell system, 8 th IEEE Intenational onfeence on Powe Electonics and EE Asia (IPE & EE), , 11. [1] B. R. in and S. J. Shen, Inteleaved ZS esonant convete with a aallel-seies connection, Jounal of Powe Electonics, ol. 1, No. 4, , Jul. 1. [13].. hu and. H. i, Analysis and design of a cuentfed zeo-voltage-switching and zeo-cuent-switching -esonant ush-ull D-D convete, IET Powe Electonics, ol., No. 4, , Jul. 9. [14] J. M. Blanes, A. Gaigos, J. A. aasco, J. E. Mati, and E. S. Kildes, High-efficiency egulation method fo a zeo-cuent and zeo-voltage cuent-fed ush ull convete, IEEE Tans. Powe Electon., ol. 6, No., , Feb. 11. [15] Z. Yao,. Xiao, Y. Huang, and W. Yang, Push-ull fowad thee-level convete fo high-voltage fuel cell alications, IEEE Intenational onfeence on Electical Machines and Systems, , 8. [16] Y. Du, G. Wang, J. Wang, S. Bhattachaya, and A.. Huang, Modeling of the imact of diode junction caacitance on high voltage high-fequency ectifies based on 1k Si JBS diodes, IEEE Intenational onfeence on Enegy onvesion ongess and Exosition, , 1. [17] J. H. Jung, J. M. hoi, and J. G. Kwon, Design methodology fo tansfomes including integated and cente-taed stuctues fo esonant convetes, Jounal of Powe Electonics, ol. 9, No.,. 15 3, Ma. 9. [18] D.. Hamill, lass-de invetes and ectifies fo D-D convesion, IEEE Powe Electonics Secialists onfeence, ol. 1, , [19]. Ekkaavaodome, A. Nathakaanakule, and I. Boonyaoonate, Single-stage electonic ballast using lass-de low-dυ/dt cuent-souce diven ectifie fo owe-facto coection, IEEE Tans. Ind. Electon., ol. 57, No. 1, , Oct. 1. []. Ekkaavaodome and K. Jiaseeeamonkul, Single-stage high-owe facto electonic ballast with a symmetical lass-de esonant ectifie, Jounal of Powe Electonics, ol. 1, No. 3, , May 1. hainain Ekkaavaodome was bon in Songkhla, Thailand, in He eceived his B.S. in Industial Electical Technology fom the King Mongkut s Institute of Technology Noth Bangkok (KMITNB), Bangkok, Thailand, in 3, and his M.S. and Ph.D. in Electical Engineeing and Enegy Technology fom the King Mongkut s Univesity of Technology Thonbui (KMUTT), Bangkok, Thailand, in 5 and 9, esectively. He is cuently a ectue with the Deatment of Instumentation and Electonics Engineeing, Faculty of Engineeing, KMUTNB. His cuent eseach inteests include electonic ballasts, owe facto coection cicuits, esonant ectifies, and soft-switching owe convetes. Kamon Jiaseeeamonkul was bon in Phuket, Thailand, in He eceived his B.S. and M.S. in Electical Engineeing, and his Ph.D. in Electical and omute Engineeing fom the King Mongkut s Univesity of Technology Thonbui (KMUTT), Bangkok, Thailand, in 1997, 1, and 6, esectively. He is cuently a ectue with the Deatment of Electonic and Telecommunication Engineeing, Faculty of Engineeing, KMUTT. His cuent eseach inteests include electonic ballasts, high-fequency owe convetes, and owe facto coection cicuits.