An Intelligent Controller designed to improve the Efficiency of Cascade Gama-LC Resonant Converters

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1 Austalian Jounal of Basic and Applied Sciences, 5(): 36-35, 0 ISSN An Intelligent Contolle designed to impove the Efficiency of Cascade Gama-C esonant Convetes Mohammad Jafai, Zaha Malekjamshidi Depatment of Electical Engineeing Fasa banch, Islamic Azad Univesity, Fasa, IAN Depatment of Electical Engineeing Mavdasht banch, Islamic Azad Univesity, Mavdasht, IAN Abstact: In this pape a cascade C esonant powe convete on base of a hybid contolle is intoduced. The hybid contolle is composed of an Atificial Neual Netwok (ANN) and a PID classic contolle. The stuctue of convete and its opeation in steady state conditions was explained accoding to steady state model of convete. The ANN contolle changes the switching fuency to maximize the voltage gain and consuently the efficiency of convete in case of lage load vaiations. A classic PID contolle egulates the voltage on base of an online PWM pocess. A pototype was designed and implemented on base of theoetical analysis and was expeimentally tested. Compaison between simulation and expeimental esults shows validity of the hybid contolle and its eliability fo expanding to othe topologies of DC convetes. Key wods: Atificial Neual Netwoks, Hybid, PID contolle, Cascade esonant, DC Convete, Simulation INTDUCTIN Dc-dc convetes ae inteesting uipments fom the contol point of view, due to thei intinsic nonlineaity chaacteistics. Common contol appoaches, like Voltage Contol and Cuent Injected Contol uie a good knowledge of the system and its accuate tuning in ode to obtain desied pefomances. These contolles ae simple to implement and easy to design, but thei pefomances geneally depend on the woking point, so that the pesence of paasitic elements, time-vaying loads and vaiable supply voltages can make difficult selection of the contol paametes which ensue a pope behavio in any opeating conditions (Aulselvi, S., 00). The design and analysis of esonant convetes is often complex due to the lage numbe of opeating states occuing within a pulse peiod (Cavalcante, F.S. and J.W. Kola, 003). Many adaptive contolles fo the esonant Convete ae suggested duing the ecent yeas, such as Fuzzy contol (Viswanathan, K., 00), Fuzzy-PID contol (Malekjamshidi, Z., 009; Isin Eenoglu, 006), Fuzzy-Neual contol (Kuo-Hsiang Cheng, 007), Sliding Mode contol (Siew-Chong Tan, 008), Suential State Machine (Aigne, H., 005), Gain Scheduled contol (Astom, K.J., B. Wittenmak, 995) and Passivity Based contol (Cecati, C.,; tega,., 998). In this a new hybid contolle fo esonant convetes is intoduced. The poposed contolle is composed of an Atificial Neual Netwok (ANN) and an online PID classic contolle. The output voltage of convete emains constant in case of any changes in load and line voltage by PID contolle. n the othe hand the switching fuency was changed by ANN contolle to maximize the convete voltage gain and consuently to optimize the convete efficiency via a step by step gadual change. The ANN contolle only opeates in case of lage changes in load value ( I %5 ) with a cetain time delay, via a step by step gadual change to pevent any intefeence between two contolles opeation. The online PID contolle changes the Duty Cycle of switches to egulate the output voltage of convete pemanently accoding to a PWM pocess. In the next sections, the stuctue of convete and its opeation modes ae discussed and the poposed contol technique was explained, simulated and expeimentally tested. Stuctue f C esonant Convetep: The C esonant convete topology is shown in figue. In this topology voltage dop on seies capacitos C and C is Vin/ and switches Q and Q conduct on altenate half cycles. The switching pocess applies an AC squae wave to the esonant cicuit. The fundamental component of the squae wave applied to the esonant netwok and the esulting sine wave AC cuent allows us to use classical AC analysis. The AC voltage is ectified by the fast ecovey Schottky diodes and filteed. As is illustated in figue, if Q and Q ae ''on'' simultaneously even fo a shot time- thee is a shot cicuit acoss the supply voltage (Vin) and switches will be destoyed. Coesponding Autho: Mohammad Jafai, Depatment of Electical Engineeing Fasa banch, Islamic Azad Univesity, Fasa, IAN. mohammad_jafai@iaufasa.ac.i 36

2 Aust. J. Basic & Appl. Sci., 5(): 36-35, 0 Fig. : Basic schematic of cascade C esonant DC convete. To make sue that this doesn't happen, the maximum duty cycle fo Q and Q, which occus at minimum input voltage will be set at %80 of a half peiod (Malekjamshidi, Z., 009). Steady State Analysis f Convete: In this section, the steady state analysis of C esonant convete is undetaken. To study the voltage tansfe gain and fuency esponse of convete ou study needs some assumptions and simplifications. At the fist step the ectifie and output filte ae expessed as an uivalent load esistance. The cuent injected by ectifie into the output filte and the load, is a squae wave which its fundamental component was used to achieve the uivalent esisto (uo, F.., H. Ye, 006). Fig. : Equivalent load esistance. The input voltage to ectifie is a sine wave voltage and the esulting uivalent esisto which is shown in figue. can be calculated by (3)( uo, F.., H. Ye, 006). I () ms I V ( ms) V () ms. V ms 8. I 8 V (3) I The uivalent esisto is used to simplify the AC cicuit diagam of convete as pesented in figue. 3. Fig. 3: Equivalent cicuit of convete. The voltage tansfe gain of convete accoding to this model can be calculated as: 37

3 Aust. J. Basic & Appl. Sci., 5(): 36-35, 0 V ( S) G( S) () V ( s) A( s) i A( S) [ s s( 3 ) s ( C C C ] 3 C 3 s C C ) (5) The esonant components (,, C3, C ) ae selected as follows to pevent complex mathematical analysis., C 3 C C, C (6) The quality facto Q is defined as: Q. Z (7). C. Whee In this uation is switching fuency and, Z is selected as chaacteistic impedance. The elative switching fuency can be obtained by (8). The voltage gain ( ) () (uo, F.., H. Ye, 006). is the natual esonant fuency of esonant netwok. (8) C G can be simplified as (0) and phase of G also can be obtained by uation A( ) [ 3 j( ). Q] (9) G( ) [( 3 ) ( ).. Q ] (0) G( ) tan ( ).. Q () 3 Figue shows the chaacteistics of both voltage tansfe gain G (S) and the phase angle ( ) vesus elative fuency ( ) and changes in quality facto (Q). Fig. : Gaphical epesentation of G(S) vesus Q and. 38

4 Aust. J. Basic & Appl. Sci., 5(): 36-35, 0 As is clea fom figue, the voltage tansfe gain G(s) is highe than unity fo some switching fuencies. It means that the esonant cicuit in this convete enlages the input enegy fo switching fuencies highe than esonant fuency ( ) (uo, F.., H. Ye, 006). The maximum voltage tansfe gain can be calculated fom uations () and (3). d G( ) d( ) 6 (3Q ( 8Q 0 8). ). Q 6 0 () (3) The uation 3, give us the fuency which maximum voltage tansfe gain can be achieved fo cetain values of Q. fo example fo Q= the elative switching fuencies fo maximum gain ae. 53 and 0.. As is clea fom uations (3, 7, 9, 0) and (3), the maximum voltage tansfe gain G(s) depends on quality facto of convete and the load value ( ) fo cetain values of,, C and 3 C. Theefo the maximum value of voltage tansfe gain is a function of changes in output load and consuently, the uation 3 can be witten as below [3( ) 8]. C [ 8( ) ]. ( ) 6 0 C. C () To maximize the G(s), the elative switching fuency of convete should be changed accoding to changes in load value. The changes in output load can be eceived by changes in load cuent I (S) fo a set value of output voltage V (S). Changes in I o and V applied to the ANN contolle as input vaiables. The output signal of ANN contolle esulted changes in switching fuency to maximize the voltage tansfe gain in any opeating point. Thee is also a second contol loop, included an online PID contolle which egulates the output voltage of convete on base of PWM stategy. The output signal of PID contolle make changes in the duty cycle ( D ) of convete switches (Q and Q). In the next sections, details of both ANN and PID contolles ae discussed. Analysis f Contol Stategy: A. Design of ANN Contolle: In this section the design pocedues fo Atificial Neual Netwok (ANN) based contolle will be descibed in bief. In this eseach, a multi-laye feed-fowad atificial neual netwok is employed to achieve eal-time contol. The input vaiables of ANN ae, output cuent vaiation ( I o ) and the changes in output DC voltage (Vo) which ae calculated accoding to uations (5) to (6). Since the changes in switching fuency is a nonlinea function of load changes, theefoe it was chosen to be the output of the neual netwok contolle as is shown in figue 5. Io ( K) Io( K) Io( K ) (5) V ( K) V ( K) V ( ef ) (6) o o o ( K) ( K) ( K ) (7) To compensate the output voltage vaiation and maintain a constant output voltage, the duty cycle of the convete switches ( D ), should change invesely popotional to (Vo). 39

5 Aust. J. Basic & Appl. Sci., 5(): 36-35, 0 Fig. 5: The oveall stuctue of designed contolle. The taining data of ANN contolle was poduced using a wide ange pais of and espected Q and accoding to the uation (3). The esulted tained ANN was tested on an ideal simulated model of the convete which is illustated in figue 6. The ideal model is simulated using MATAB softwae and the wavefoms of simulated convete ae shown in figues 8(A,B). Fig. 6: The simulated cicuit of C esonant DC convete using MATAB/SIMUINK. In ode to satisfy this uiements, a multi-laye feed-fowad ANN, was selected to be tained. It is clea that a multi-laye feed-fowad ANN can appoximate any nonlinea function. The nonlinea sigmoid function is chosen as the activation function (Xiao-Hua Yu,; Kaman, F., 998; Queo, J.M., 00; i, W., X.H. Yu, 007). f ( x) ax (8) e Afte simulation of convete, a sensitivity based neual netwok puning appoach is employed to detemine an optimal neual netwok contolle configuation (Kanin, E., 990). In this appoach, the contibution of each individual weight to the oveall neual netwok pefomance is indicated by a sensitivity facto j ( w ).The sensitivity of a global eo function, with espect to each weight, S can be defined as the following. S S J ( w 0) J ( w J ( without w w f ) ) J ( with w ) (9) In these uations, w is the weight of the neual netwok and w is the final value of weight afte taining. The uation (9) can be appoximated by (0) fo the back-popagation algoithm (Xiao-Hua Yu,; Kaman, F., 998). f S N w ( n) n ( w w f f w ) i (0) 350

6 Aust. J. Basic & Appl. Sci., 5(): 36-35, 0 Whee N is the numbe of taining pattens fo each ANN weight update, is the leaning ate which is chosen to be 0.3 and W is the weight update. The sensitivity calculations wee done on based of Equation (0). The weights that ae insignificant can be deleted if thei sensitivity facto was smalle than a defined theshold and also a neuon can be emoved when the sensitivities of all the weights elated with this neuon ae below than the theshold (Kaman, F.,998). This pocess educed the numbe of active weights and neuons and was effective in development of ANN contolle speed. The thee laye feed-fowad neual netwok which has one hidden laye with 0 neuons was selected and the netwok weights ae selected andomly with unifom distibution ove the inteval [-, ]. B. Stuctue of PID Contolle: The ideal continuous PID contolle is pesented accoding to uation below: D K P en Ti t 0 edt T d de dt () As we ae concened with digital contol, and fo small sampling peiods the uation may be appoximated by a discete appoximation. The deivative tem was eplaced by a backwad diffeence and the integal by a sum using ectangula integation. The appoximation is: D K P V K V ( K) V ( K ) ( K) V ( j). TS Td () T i j TS Index (K) efes to the time instant (Malekjamshidi, Z., 009). We have used Ziegle-Nichols method to adjust the K, T, T paametes which is a well-known method. P i d Expeimental esults: An expeimental model of C esonant convete is designed and implemented on base of the topology pesented in figue.. Table shows the convete chaacteistics and paametes in bief. Table : Chaacteistics of implemented convete. Paamete Input voltage(dc) utput voltage(dc) utput max cuent ated Powe Value 0 V 5 50V 6 A 300 W Paamete Switching fuency Switching devices ectifying devices Pocessing device Value 0-80 KHZ IF80 F07 80C96KB The input voltage selected 0 volts (+_%0) and inductos ae made of feite coe (==00 H ) and the capacitos ae made of plain polyeste (C=C=0.6 F ). Powe MSFETs IF80 ae used as active switches and fast ecovey Schottky diodes F07 as ectifies. The softwae pogamming of ANN and PID contolles wee developed in C language and the signals D and W wee calculated as a nonlinea function of the input vaiables by micocontolle (80C96KB). The input vaiables wee analogue signals which connected to intenal analog-to-digital (ADC) convetes of micocontolle. The convete was implemented in electical laboatoy of Islamic Azad Univesity (Fasa banch) and expeimentally tested (figue 6). It takes an aveage of 00 instuction cycles fo the 80C96 pocesso to execute a complete cycle of pogam and povide the gate pulses with new duty cycle fo the main switches. The expeimental wavefoms of esonant netwok cuent and voltage, voltage of capacito(c) and changes in output voltage of implemented convete ae shown in figue 7 (A, B, C and D). it can be seen that simulation and expeimental wavefoms confimed each othe. Expeimental esults show that the ANN contolle in case of any changes moe than 5% of maximum convete ated cuent povides an appopiate W signal to maximize the convete voltage gain and incease the convete efficiency. The W signal changes gadually to povide enough time fo online PID contolle to compensate the changes in Vo. The online PID contolle egulates the output voltage of convete in each set point fo all vaiation anges of load cuent and line voltage. As is clea fom figue7 (D), settling time, veshoot and ise time in output voltage wavefoms emain in an acceptable ange in case of any step changes. 35

7 Aust. J. Basic & Appl. Sci., 5(): 36-35, 0 Fig. 6: The implemented pototype of convete. (A) (B) (C ) (D) Fig. 7: The expeimental wavefoms, input cuent and voltage of esonant netwok(a, B), Voltage of C (C) and step change in output voltage Vo (D). The signals of input cuent and voltage wee quite noisy due to high fuency switching elements. The negligible diffeence between simulation and expeimental esults is due to off-line taining of ANN contolle on base of ideal MATAB/SIMUINK model. To fine-tune the weights of ANN and educe the diffeence an online fine-tuning tain can be useful (i, W., X.H. Yu, 007; Kanin, E., 990). Expeimental esults show good ageement with simulations which appove the eliability of small signal model and ANN contolle. 35

8 Aust. J. Basic & Appl. Sci., 5(): 36-35, 0 (A) (B) Fig. 8: Simulated wavefoms (A) Voltage and cuent of esonant netwok (B) Voltage of C. Conclusion: The ANN contolle poposed in this pape can be a eliable altenative to classic contolles fo DC-DC convetes. In geneal the ANN contolle povides good chaacteistics in tems of oveshoot, ise-time and settling time. Compaison between simulated and expeimental esults showed good ageement which appoved eliability of poposed contolle. ACKNWEDGMENT The authos would like to thank the Powe Electonic eseach cente of Islamic Azad Univesity-Fasa Banch fo the financial suppot of this eseach poject. EFEENCES Aigne, H., 005. Method fo egulating and/o Contolling a Welding Cuent Souce with a esonance Cicuit, United States Patent Aulselvi, S., G. Uma and M. Hidambaam, 00. Design of PID contolle fo boost convete with HS zeo, IEEE-th Int. Conf. on Powe Electonics and Motion Contol, Xi an Univesity, China, pp: Astom, K.J., B. Wittenmak, 995. Adaptive Contol. Second Edition,Addison-Wesley Publishing Company, Inc. Cavalcante, F.S. and J.W. Kola, 003. Design of a 5kW High utput Voltage Seies-Paallel esonant DC-DC Convete, in Poceedings of the 3th IEEE Powe Electonics Specialists Confeence, Acapulco, Mexico, : Cecati, C., A. Dell'Aquila, M. isee, et al., A Passivity-BasedMultilevel Active ectifie with Adaptive Compensation fo Taction Applications, IEEE Tansactions on Industy Applications, 39(5). Isin Eenoglu, Ibahim Eksin, Engin Yesil, Mujde Guzelkaya, 006. An intelligent Hybid FUZZY-PID Contolle 0th Euopean Confeence on Modelling and Simulation EMCS. Kaman, F.,.G. Haley, B. Buton, T.G. Habetle, M.A. Booke, 998. A fast on-line neual-netwok taining algoithm fo a ectifie egulato, IEEE Tansactions on Powe Electonics, 3(): Kanin, E., 990. A simple pocedue fo puning back-popagation tained neual netwoks, IEEE Tansactions on Neual Netwoks, (): 39-. Kuo-Hsiang Cheng, C.F. Hsu, Chih-Min in, Tsu-Tian ee, C. i, 007. Fuzzy Neual Sliding-Mode Contol fo DC DC Convetes Using Asymmetic Gaussian Membeship Functions, IEEE Tansactions on Industial Electonics. i, W., X.H. Yu, 007. Impoving DC powe supply efficiency with neual netwok contolle, in: Poceedings of the IEEE Intenational Confeence on Contol and Automation, May, pp: uo, F.., H. Ye, 006. Synchonous and esonant DC/DC convesion technology, Enegy facto and mathematical modeling,taylo and Fancis publication. Malekjamshidi, Z., M. Jafai, M. Imanieh, 009. "Compaison between Pue Fuzzy and Hybid Fuzzy-PID contolles on a DC-DC convete", Austalasian Univesities Powe Engineeing Confeence (AUPEC 009)- Adelaide, Austalia. tega,., A. oa, P.J. Nicklasson, H. Sia-amiez, 998. Passivity based Contol of Eule-agange Systems: Mechanical, Electical and Electomechanical Applications. Spinge-Velag, ondon, UK. Queo, J.M., J.M. Caasco,.G. Fanquelo, 00. Implementation of a neual contolle fo the seies esonant convete, IEEE Tansactions on Industial Electonics, 9(3):

9 Aust. J. Basic & Appl. Sci., 5(): 36-35, 0 Siew-Chong Tan, Y.M., ai, Chi Tse, 008. Geneal Design Issues of Sliding-Mode Contolles in DC DC Convetes, IEEE Tansactions n Industial Electonics, 55(3), MACH. Viswanathan, K.,. uganti and D. Sinivasan, 00. A univesal fuzzy contolle fo a nonlinea powe convete, FUZZ-IEEE 0 Conf. ec., pp: 6-5. Xiao-Hua Yu, Weiming i, Taufik "Design and implementation of a neual netwok contolle fo eal-time adaptive voltage egulation" 35

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