TRANSFORMERLESS 1-PHASE ACTIVE POWER LINE CONDITIONERS

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1 TRANSFORMERLESS HASE ATIVE OWER LINE ONDITIONERS Macin JARNUT, Gzegoz BENYSEK Univesity of Zielona Góa Zielona Góa (oland) Ryszad STRZELEKI Gdynia Maitime Univesity Gdynia (oland) Abstact ape poposes based on invese Γ topology tansfomeless phase Active owe Line onditiones (AL), the multiple capabilities of which include cuent conditioning and voltage estoing. The effectiveness of the phase AL is caefully outlined, while the systems geneal pefomance and flexibility ae intensively investigated. Expeimental esults of a pototypes ae pesented to validate poposed appoach. This wok was supooted by olish ommittee fo Scientific Reseach unde Gant 8TA 8. INTRODUTION The goal of this pape is to pesent a simple, tansfomeless (tansfomeless leads to significantly decease dimension and weight) AL systems based on the invese Γ topologies (invese Γ topology is bette solution than Γ topology in situation of changed load)[] and to investigate to which extent they ae suited to fulfill a wide ange of diffeent tasks: to pevent dity loads fom polluting the electical distibution netwok (cuent conditioning mode); to potect sensitive loads fom line distubances as voltage sags (voltage estoing mode); The intention is to combine cicuit simplicity with flexibility in pefomance. Fist, AL with tansfomes ae descibed in chapte II. Second the two poposed tansfomeless AL systems, based on invese Γ topologies, functionalities and modes of opeation of them with special egad to cuent conditioning mode and voltage estoing mode in chapte III will be explained. This chapte also includes enhanced contols. The pesentation of expeimental esults in chapte IV will finally demonstate the systems feasibilities.. AL WITH TRANSFORMERS Fig. shows selected AL with tansfomes [][8]. esented AL (based on invese Γ topology) possess the same majo tasks: cuent and voltage conditioning modes. Those goals can be eached with diffeent souce capacito connections to the netwok and with dependency what kind souce (voltage and/o cuent) is connected to the system. Fullbidge cicuit equies 8 switches the lagest numbe. Undoubtedly this is the disadvantage of this system. On the othe hand, the souce capacitance is not divided. Substitute capacitance equied fo instantaneous powe flow is unitay. The smallest numbe of active elements (switches) is equied in half bidge AL system. Although thee ae only two bidge banches (4 switches), but the souce capacitance consists fom two independent capacitos. This disadvantage is excluded in system based on thee banches. Six switches ae applied into this system, whee one banch is used to divide the capacitance. A commonneutal point is putted into pactice. To disadvantages of this solution we can add two times highe voltage on the D cicuit. It is undisputed that one of the most impotant featues is possibility of usage, to build such a cicuit, vey popula 3phase Intelligent owe Modules. 3. TRANSFORMERLESS AL onfiguations descibed above equie tansfomes as inteface between AL and the net. This heavy featue is eliminated in configuations descibed below (Fig. and Fig.3)[4][8]. Both studied aangements utilize invese Γ topology (invese Γ

2 i i f u u T L f T L f T 7 u i i Q u i u T T 8 i f i i i T f u u L T f u u T T L f ' L f L f T '' i cf T i i T u sin 5Hz I T f u u u sin 5 Hz T L f L f i u Tp= ms II T Fig.. AL on the base of: fullbidge cicuit; halfbidge cicuit; thee banches cicuit. is bette than Γ in situation of wide load changes) and in fist appoximation can be modelled as ideal cuent and voltage souces. 3.. Seiesaallel Tansfomeless AL Fist fom investigated systems, based on seiespaallel active powe filte topology [], makes possible to get: i) sinusoidal souce cuent (i (t)); ii) unity input powe facto; iii) stabilized and without defomations load voltage. ontol system possess two main pats. Fist pat ealises output (load) voltage stabilization whee I egulato pefoms pinciple pat. Input signals of the egulato thee ae measued output (load) voltage u (t) and efeence sinusoidal couse and finally it s output signal is added with initially filteed cuent on the capacito f. The last activity diminish oscillations in capacito f voltage. Second pat in the contol algoithm ealises contol of the paallel cuent souce in such way to keep constant value of capacito voltage in D cicuit. The D voltage is compaed with the efeence value, and afte initial filteing bought to the sample & hold block. Such opeation is impotant, because this signal sets souce cuent magnitude. Invaiability of this signal, duing one peiod, guaantees sinusoidal souce cuent. Fo fequency 5 Hz this signal is sampled pe ms, synchonous with netwok Fig..Seiespaallel tansfomeless phase AL and it s contol algoithm. voltage pass though. Remembeed value of cuent magnitude afte multiplying by efeence sinusoidal couse becomes efeence cuve. Finally, pocess of souce cuent contol, duing one peiod, is ealised by I egulato. To disadvantages of the seiespaallel tansfomeless phase AL we can add athe lage capacitance f and fact that D voltage is not well matched to the equied voltage of the seies connected souce. 3.. aallel Tansfomeless AL Second fom the investigated systems, paallel tansfomeless phase AL [4], makes also possible to get sinusoidal souce cuent (i (t)), input powe facto nea unity and, in situation of sinusoidal souce voltage, load voltage without defomations. All those goals ae achieved in diffeent way than in the fist system. System consists fom two elements: seies eactance (in fist appoximation epesented by cuent souce i) and contolled sinusoidal (in some cases nonsinusoidal) voltage souce u (t), both inseted between the souce and the load. In this cicuit, a two level WM modulation VS (Voltage Souce onvete) as u (t) voltage souce, was used. The majo diffeence between this conditione and the othe active powe filtes lies in the way of souce cuent hamonics compensation. The classic active powe filte has to detect the load ha

3 monic cuents and geneate the compensating components [][6]. esently investigated system does not need to detect the load hamonics components because they ae natually absobed by the VS which has the attibute to isolate the load fom the souce (powe system). U u LL i i i u u u Q Q I i L ( ) S i UD UDREF tigge K E f L f T Q u u I GEN T tigge Extended algoithm GEN u D U khz Fig. 3. aallel tansfomeless phase AL and it s contol algoithm. In steady state (neglecting the losses in the VS) the angle coesponds to the eal powe supplied by the netwok (the eal powe supplied by the netwok has to be equal to the eal powe of the load) and to the constant (in steady state) enegy accumulated on the D link capacito (). U U ( U U ) T T3 T T4 f S DREF sin = () D On the base of above the majo pupose of the contol algoithm is to detemine the angle, popotional to the eal powe of the load, ( U U ) f S DREF D = acsin () U U and to poduce sinusoidal (in some cases distoted) voltage u (t) shifted with angle in egad to souce voltage u (t). If eal powe supplied by the system is geate than the load demand, the suplus potion will be absobed by the VS and thus cause the D link capacito voltage to incease. If eal powe supplied by the system is less than the load demand, the D link capacito voltage will decease. To egulate the D link capacito voltage a popotionintegation (I) contolle was used. This contolle uses the eo between the efeence U DREF and the actual D voltage U D as a feedback signal. The I contolle poduces the phase angle to contol the eal powe absobed o supplied by the VS thus egulates the D link capacito voltage. A simplified contol algoithm is pesented in Fig.3. In situation when system (netwok) voltage u (t) is not sinusoidal (poses highe hamonics o/and othe components), to avoid souce cuent distotion, thee is need to use extended contol algoithm (Fig.3). The extended pat has to extact the unneeded components (highe hamonics o/and othe) fom distoted netwok voltage u (t) and then add to the aleady shifted basic component (at fequency 5/6 Hz) of the supply voltage. This solution unfotunately leads to distoted load voltage. The decision about tuning on the extended algoithm must be made afte answe the question: what is moe impotant sinusoidal souce cuent, nea unity input powe facto and no ovecuents duing souce voltage sags and dips (when algoithm is on) o sinusoidal load voltage, geat input eactive powe and ovecuents duing souce voltage sags and dips (when algoithm is off)? oposed aangement (Fig.3) makes also possible eactive powe compensation. Let us detemine equation on input powe facto. Fo defined voltages: U = U cos( ) ju sin( ) (3) U = U (4) U = U cos( ) ju sin( ) (5) U U ; U, ; whee: ( ) ( ), U equations on active and eactive powes ae as follows: UU U UU = sin( ) ; Q = cos( ) (6) UU = sin( ) ; Q Q cos( ) U U U = (7) UU UU = sin( ) sin( ) (8a) U U U U ) cos( ) (8b) U U = cos( On the base of above equations, with assumption that U =U and taking into account that in steady

4 state thee is no active powe exchange with VS, equation on input powe facto is as follows: F = cos.5acsin (9) U On the base of cuves pesented in Fig.4., thee is possible to say that due to small values of inductance L S the phase angle F L S = mh L S =()mh x Fig.4. Input powe facto changes. between voltages u (t) and u (t) is vey small and hence the phase angle between i (t) and u (t) is even smalle. As a esults, the input powe facto is nea unity. Q /Q SS [%] Q /Q SS [%] A achieved by adjusting the convete modulation index Additional Solutions Vaiable input powe facto poblem can be solved in seveal ways. onstant and unity input powe is possible to get in situation when VS output voltage magnitude U is highe than souce voltage magnitude U. Fo this pupose conditione has to be equipped with additional souce to supply to the D link capacito equied active powe. The second solution is a conditione with additional paallel connected cuent souce (symmetical configuation) as it is in Fig.6. In this case, to get unity input powe facto, paallel cuent souce ( i ) has to poduce eactive cuent I Lf3 with pope magnitude, additionally implementing appopiate contol algoithm (neglecting input powe facto) thee is possible to stabilize load voltage independent with souce voltage vaiations. Because both paallel cuent souce ( i ) and paallel voltage souce (u ) possess common D link capacito thee is also possible to exchange between them some active powe and in this way avoid tun on mode poblems and make u (t) voltage moe stiff. i i i i Q u u u Q L S =(3, 5, 7, 9)mH U =const I Lf 3 I Ls 4 L S =3 mh 6 U /U [%] Q /Q SS [%] Q 5 /Q SS [%] B I i L S i Ls i L f 3 T L f u u 5 5 L S =(3, 5, 7, 9)mH U =const L S =3 mh T Fig.6. Symmetical phase tansfomeless AL. f 5 U /U [%] Fig.5. Influence of the U voltage vaiations on eactive input powe, whee: A < B, Q SS input eactive powe when U =U. Fo pupose of the eactive powe compensation the magnitude U has to be contolled to be equal to that of U, because any diffeences between them ae leading to consideable gowth of the input eactive powe, see Fig.5. The same amplitudes can be The thid solution is a conditione with additional seies connected voltage souce, as it is in Fig.7. In this system unity input powe facto is possible to get though changes of the active and eactive powe flow. It is known that seies quadatue voltage injection U fq pimaily affect the active powe flow q [3][5][7](in slight degee thee is also affected eactive powe flow Q q ). Respectively seies inphase voltage injection U fp pimaily affect the eactive powe flow Q p [3][5][7] (in slight degee

This pupose is achieved with common, fo both souces (seies and paallel voltage), D link capacito. u i S i i p Q p u u u Q f fq fp I Q state of the seiespaallel tansfomeless phase AL.

5 thee is also affected active powe flow p ). Because seies connected souce intenally can poduce only voltage in quadatue with the line cuent, to poduce inphase voltage (to poduce p and Q p components) thee is need additional souce. This pupose is achieved with common, fo both souces (seies and paallel voltage), D link capacito. u i S i i p Q p u u u Q f fq fp I Q state of the seiespaallel tansfomeless phase AL. On basis of pesented couses it is possible to say, that studied aangement fulfils it s functions: souce cuent become completely sinusoidal, even in case of stongly defomed load cuent. onditione assues also load voltage stabilization, independent with souce voltage amplitude changes (U =7 V), load voltage is constant (U =5 V). Tabl.. Investigated system paametes System A System B Souce voltage 5 V 8 V D link efeence voltage 3 V 8 V Inductance L S.4 mh Filte inductance L f mh Filte inductance L f mh.3 mh Filte capacitance f µf 4 µf D link capacitance 3 µf µf switching fequency khz khz i L f S i L T f L u f u T f Fig.7. Voltage seiespaallel tansfomeless phase AL. One pulse ectifie U U UUfq UUfp sin cosϕ sinϕ () 43 4 = q p Q UU = U U fq sinϕ Qq U cos U U fp cosϕ Qp whee: ( U, U ); ϕ ( I U );, () Implementing appopiate contol algoithm (neglecting input powe facto) thee is also possible to stabilize load voltage independent with souce voltage magnitude vaiations. 4. EERIMENTAL RESULTS To veify popeties of the poposed tansfomeless phase AL a down scale hadwae models, with paametes pesented in Table, wee developed. Fig.8. demonstates opeation duing steady Two pulse ectifie with capacito filte Fig.8. Expeimental wavefoms, whee h:5vsouce/load voltage; h :A souce/load cuent; time 5ms/div Fig.(94) pesent expeimental wavefoms obtained in paallel tansfomeless phase AL (Fig.3) fo two diffeent load types, linea (esistive) and nonlinea (two pulse ectifie with capacito filte). Fig.9. illustates investigated system behaviou in situation of linea (esistive) load. It is seen fom this figue that AL influence on souce cuent is on slight degee and can be additionally diminished though extended contol algoithm (because of distoted supply voltage). Fig.() demonstate the filteing capability of the AL. As one can see fom those figues, the load cuent contains a lage amount of hamonics due to two pulse ectifie with capacito filte, howeve the souce cuent is sinusoidal. The extended contol algoithm can addition

ally impove shape of the souce cuent because of distoted souce voltage.

It is obseved fom those figues that in situation of nominal souce voltage, algoithm geneates only

In situation when souce voltage magnitude vay (magnitude unde nominal value 3%) algoithm geneates

This pocedue makes impossible occuence ovecuents duing voltage dips and sags as well as avoids input

On the left basic contol algoithm, on the ight extended contol algoithm.

On the left load cuent and spectum, on the ight souce cuent and spectum; time ms/div. Fig.9.

3. Nonlinea load = [kw], extended contol algoithm.

6 ally impove shape of the souce cuent because of distoted souce voltage. Additionally Tables to 4 ae pesenting THD coefficients in chaacteistic points of the both investigated systems. Fig.(3, 4) demonstate extended contol algoithm popeties in situation of souce voltage magnitude vaiations. It is obseved fom those figues that in situation of nominal souce voltage, algoithm geneates only signal popotional to the highe hamonics in supply voltage. In situation when souce voltage magnitude vay (magnitude unde nominal value 3%) algoithm geneates additionally basic fequency component. This pocedue makes impossible occuence ovecuents duing voltage dips and sags as well as avoids input eactive powe gowth (see Fig.5). a) Fig.. Nonlinea load = [kw]. On the left basic contol algoithm, on the ight extended contol algoithm. h: souce cuent; h: VS output cuent; time ms/div b) Fig.. Nonlinea load = [kw], extended contol algoithm. On the left load cuent and spectum, on the ight souce cuent and spectum; time ms/div. Fig.9. Linea load: a) =.4 [kw]; b) = [kw]. (on the left basic contol algoithm, on the ight extended contol algoithm). h: souce cuent; h: load cuent; h3 souce voltage; h4 VS s output voltage (voltage in ); time ms/div Fig.3. Nonlinea load = [kw], extended contol algoithm. On the left nominal souce voltage, on the ight souce voltage unde nominal value (3%). h efeence sinusoidal signal; h souce voltage signal; h3 signal geneated by the extended contol algoithm; time ms/div. Fig.. Nonlinea load = [kw]. On the left basic contol algoithm, on the ight extended contol algoithm. h: souce cuent; h: load cuent; time ms/div Fig.4. Nonlinea load = [kw], extended contol algoithm. On the left nominal souce voltage, on the ight souce voltage magnitude unde nominal value (3%). h3 signal geneated by the extended contol algoithm and Mspectum; time ms/div.

7 Tabl.. System 3. expeimental esults THD [%] i u i u One pulse ectifie 3,6,8 33,, Two pulse ectifie 3,4,8 8,,4 Tabl.3. System 3. basic contol algoithm THD [%] i u i u u c.4[kw] 3,7 3,6,8 4,6 4,5 Linea load [kw] 7,9 5,6 4,4 9, 8,9 Nonlinea.4 kw], 5, 6, 8, 8, load [kw] 7,7 5, 44, 8,9 8,3 Tabl.4. System 3. extended contol algoithm THD [%] i u i u u c.4[kw] 9,9 6, 6,3 7,7 7,7 Linea load [kw] 5,9 9, 5,9 5,6 5, Nonlinea.4[kW] 3,5 6, 6,8 8,6 8,6 load [Kw] 3,5 6,6 45, 8,8 8,7 5. ONLUSIONS ape pesents based on invese Γ topology phase tansfomeless AL, which pemits to fulfill vaious tasks. To veify popeties of the poposed conditiones a down scale hadwae models have been developed. On the base of expeimental investigations one can say that: both conditiones can fee fom highe hamonics souce cuent, even in situation of stongly defomed load cuent; souce cuent wave shape, in conditione B with extended contol algoithm, is with souce voltage wave shape independent; conditione A stabilizes load voltage in situation of souce voltage magnitude vaiations; both conditiones possess the eactive powe compensation capability (conditione B can secue unity input powe facto when possess additional paallel connected cuent souce); when extended algoithm is tuned on thee is possible to get sinusoidal souce cuent and input powe facto nea unity as well as avoid ovecuents duing souce voltage sags and dips; when extended algoithm is tuned off thee is possible to get sinusoidal and stabilized load voltage, as well as geat input eactive powe and ovecuents duing souce voltage sags and dips. This wok was suppoted by the olish ommittee fo Scientific Reseach unde Gant 8TA 8 REFERENES. R. Stzelecki, H. Suponowicz: "owe facto in A supply systems and impovements methods," ublishing of the Technical Univesity of Waszawa, Waszawa.. R. Stzelecki, J. Kukluk, H. Suponowicz, H. Tunia: "A univesal symmetical topologies fo active powe line conditiones," EE'99 Lausanne. 3. R. Stzelecki, G. Benysek, Z. Fedyczak, J. Bojaski: Inteline powe flow contolle pobabilistic appoach, 33d Annual IEEE owe Electonics Specialists onfeence ES ', ains, Austalia,, Vol., pp R. Stzelecki, J. Rusiński, G. Benysek: "Voltage souce powe quality conditione ", Electomagnetic phenomena in Nonlinea icuits EN, VII Symposium. Leuven, Belgia,, pp H. Fujita, Y. Watanabe, H. Akagi: "ontol and analysis of a unified powe flow contolle," IEEE Tans. owe Electonics, 4, 6, 999, pp H. Akagi: New Tends in Active Filtes. EE 95 onf. oc., 995, pp L. Gyugyi, K. Sen. Kalyan, olin D. Schaude: "The inteline powe flow contolle concept: a new appoach to powe flow management in tansmission systems," IEEE Tansactions on owe Delivey, Vol.4, No.3,pp G. Meckien, R. Stzelecki, M. Klytta: Układy fazowych steowników AL o topologiach oszczędnościowych, owe Electonics Devices ompatibility ED '99 Słubice, oland, pp of. Ryszad Stzelecki was bon in 955 in Bydgoszcz, oland. He eceived the M.Sc. and h.d degee fom Technical Univesity in Kiev. He eceived his D.Sc. degees fom Institute of Electodynamics Academy Since of Ukaine. esently, he is Full ofesso of the Gdynia Maitime Univesity. His aeas of inteest include powe electonics cicuits, electic powe quality and powe flow contolle Mailing addess: Ryszad Stzelecki Gdynia Maitime Univesity, Depat. Of Ship Automation 8 Moska St, 6546 Gdynia, OLAND phone:(48 68) 38538, fax:(48 68) stzele@am.gdynia.pl D. Gzegoz Benysek was bon in 968 in Kamsko (distict Zielona Góa), oland. He eceived M.Sc. and h.d. degees fom the Technical Univesity of Zielona Góa. At pesent he is Reseache in the Univesity of Zielona Góa. His fields of inteest is in powe electonics and distibuted geneation. Mailing addess: Gzegoz Benysek Univesity of Zielona Góa, Institute of Elec. Engineeing 5 odgóna St., 6546 Zielona Góa, OLAND phone:(48 68) 3847, fax:(48 68) G.Benyseki@iee.uz.zgoa.pl

Discussion #7 Example Problem This problem illustrates how Fourier series are helpful tools for analyzing electronic circuits. Often in electronic

Discussion #7 Example Problem This problem illustrates how Fourier series are helpful tools for analyzing electronic circuits. Often in electronic Discussion #7 Example Poblem This poblem illustates how Fouie seies ae helpful tools fo analyzing electonic cicuits. Often in electonic cicuits we need sinusoids of vaious fequencies But we may aleady