HFA GHz - 2.5GHz 250mW Power Amplifier. Description. Features. Applications. Ordering Information. Functional Block Diagram

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1 SEMICONDUCTOR HFA39 January GHz - 2.GHz mw Power Amplifier Features Highly Integrated Power Amplifier with T/R Switch Operates Over 2.7V to Supply Voltage High Linear Output Power (P 1dB : +24dBm) Individual Gate Control for Each Amplifier Stage Low Cost SSOP-28 Plastic Package Applications Systems Targeting IEEE Standard TDD Quadrature-Modulated Communication Systems Wireless Local Area Networks PCMCIA Wireless Transceivers ISM Systems TDMA Packet Protocol Radios PCS/Wireless PBX Wireless Local Loop Ordering Information PART NUMBER TEMP. RANGE ( o C) PACKAGE PKG. NO. TM Description The Harris 2.4GHz PRISM chip set is a highly integrated five-chip solution for RF modems employing Direct Sequence Spread Spectrum (DSSS) signaling. The HFA39 2.4GHz-2.GHz, mw power amplifier is one of the five chips in the PRISM chip set (see the Typical Application Diagram). The Harris HFA39 is an integrated power amplifier with transmit/receive switch in a low cost SSOP 28 plastic package. The power amplifier delivers +27dB of gain with high efficiency and can be operated with voltages as low as 2.7V. The power amplifier switch is fully monolithic and can be controlled with CMOS logic levels. The HFA39 is ideally suited for QPSK, BPSK or other linearly modulated systems in the 2.4GHz Industrial, Scientific, and Medical (ISM) frequency band. It can also be used in GFSK systems where levels of +dbm are required. Typical applications include Wireless Local Area Network (WLAN) and wireless portable data collection. HFA39IA -4 to 8 28 Ld SSOP M28. HFA39IA96-4 to 8 Tape and Reel Pinout HFA39 (SSOP) TOP VIEW Functional Block Diagram T/R CNTRL V DDX (+) V GX (-) V DD TR T/R CNTRL STAGE BIAS CONTROL 4 24 RF OUT RX OUT 6 23 V DD3 RX OUT V G RF IN STAGE 1 STAGE 2 STAGE 3 RF_OUT TO ANTENNA V DD V DD V G V G1 14 RF IN PRISM and the PRISM logo are trademarks of Harris Corporation. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright Harris Corporation File Number

2 HFA39 Typical Application Diagram HFA3724 HSP3824 (FILE# 467) TUNE/SELECT (FILE# 464) HFA3424 (NOTE) (FILE# 4131) HFA3624 UP/DOWN CONVERTER (FILE# 466) 2 o /9 o M U X I M U X RXI RXQ RSSI A/D A/D A/D TXI DE- SPREAD CCA DPSK DEMOD MAC-PHY INTERFACE DATA TO MAC CTRL RFPA HFA39 (FILE# 4132) VCO VCO Q TXQ SPREAD DPSK MOD. DUAL SYNTHESIZER HFA24 (FILE# 462) QUAD IF MODULATOR DSSS BASEBAND PROCESSOR PRISM CHIP SET FILE #463 NOTE: Required for systems targeting specifications. TYPICAL TRANSCEIVER APPLICATION USING THE HFA39 For additional information on the PRISM chip set, call (47) to access Harris AnswerFAX system. When prompted, key in the four-digit document number (File #) of the datasheets you wish to receive. The four-digit file numbers are shown in the Typical Application Diagram, and correspond to the appropriate circuit

3 HFA39 Absolute Maximum Ratings Maximum Input Power (Note 2) dBm Operating Voltages (Notes 2, 3) V DD = 8V, V GG = -8V Operating Conditions Temperature Range o C to 8 o C Thermal Information Thermal Resistance (Typical, Note 1) θ JA ( o C/W) SSOP Package Maximum Storage Temperature Range o C to o C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications T A = o C, Z = Ω, V DD = +, P IN = -3dBm, f = 2.4GHz, Unless Otherwise Specified PARAMETER MIN TYP MAX UNITS POWER AMPLIFIER Linear Gain db VSWR In/Out - 1.7:1 - Input Return Loss db Output Return Loss db Output Power at P 1dB dbm Second Harmonic at P 1dB - - dbc Third Harmonic at P 1dB dbc IDD at P1dB (VDD1 + VDD2 + VDD3) ma NOTES: 2. Ambient temperature (T A ) = o C. 3. V DD + V GG not to exceed 12V. Pin Description PINS SYMBOL DESCRIPTION 1 DC and RF Ground. 2 DC and RF Ground. 3 DC and RF Ground. 4 DC and RF Ground. DC and RF Ground. 6 DC and RF Ground. 7 DC and RF Ground. 8 RX OUT Output of T/R Switch for receive mode. 9 V G2 Negative bias control for the second PA stage, adjusted to set V DD2 quiescent bias current, which is typically 3mA. Typical voltage at pin = -.7. Input impedance: > 1MΩ. DC and RF Ground. 11 V DD1 Positive bias for the first stage of the PA, 2.7V to. 12 DC and RF Ground. 13 DC and RF Ground. 14 V G1 Negative bias control for the first PA stage, adjusted to set V DD1 quiescent bias current, which is typically ma. Typical voltage at pin = -.7. Input impedance: > 1MΩ. RF IN RF Input of the Power Amplifier. 16 DC and RF Ground

4 HFA39 Pin Description (Continued) PINS SYMBOL DESCRIPTION 17 V G3 Negative bias control for the third PA stage, adjusted to set V DD3 quiescent bias current, which is typically 9mA. Typical voltage at pin = -.9. Input impedance: > 1MΩ. 18 V DD2 Positive bias for the second stage of the PA. 2.7V to DC and RF Ground. 23 V DD3 Positive bias for the third stage of the PA. 2.7V to. 24 DC and RF Ground. RF OUT RF output of T/R switch and power amplifier for transmit mode. 26 T/R CTRL V for transmit mode, + for receive mode. 27 V DD TR V DD for T/R switch. 28 DC and RF Ground. NOTE: Process variation will effect V G3 voltage requirement to develop 9mA stage 3 quiescent current, typical range = -.7 to Typical Performance Curves Power Amplifier Small Signal Performance NOTE: All data measured at T A = o C and V G1, V G2 and V G3 adjusted for first stage quiescent current of ma, second stage current of 3mA and third stage current of 9mA, respectively V DD1 = V DD2 = V DD3 GAIN (db) 3 RETURN LOSS (db) FIGURE 1. LINEAR GAIN FIGURE 2. INPUT MATCH RETURN LOSS (db) FIGURE 3. OUTPUT MATCH Power Amplifier CW Performance at Various Supply Voltages NOTE: All data measured at T A = o C and V G1, V G2 and V G3 adjusted for first stage quiescent current of 3mA, second stage current of 7mA and third stage current of 9mA, respectively

5 HFA39 Typical Performance Curves (Continued) 3 POWER (dbm) EFFICIENCY (%) 4 3 POWER INPUT (dbm) FIGURE 4. POWER OUTPUT FIGURE. POWER ADDED EFFICIENCY -1 COMPRESSION (dbm) FIGURE 6. GAIN COMPRESSION Power Amplifier Temperature Performance NOTE: All data measured at T A = o C and V G1, V G2 and V G3 adjusted for first stage quiescent current of ma, second stage current of 3mA and third stage current of 9mA, respectively. 3 = + GAIN (db) 3 o C 7 o C - o C POWER (dbm) o C - o C 7 o C V DD1 = V DD2 = V DD3 = FIGURE 7. LINEAR GAIN FIGURE 8. POWER OUTPUT 1-114

6 HFA39 Typical Performance Curves (Continued) COMPRESSION (db) o C o C 7 o C -4 = FIGURE 9. GAIN COMPRESSION Power Amplifier Spurious Response at Various Supply Voltages NOTE: All data measured at T A = o C and V G1, V G2 and V G3 adjusted for first stage quiescent current of ma, second stage current of 3mA and third stage current of 9mA, respectively. 2.4GHz, TONE SPACING 6kHz 7 6 IMR (dbc) 4 3 dbc FUNDAMENTAL P OUT OF TONES (dbm) FIGURE. THIRD ORDER INTERMODULATION RATIO FUNDAMENTAL P OUT (dbm) FIGURE 11. SECOND HARMONIC RATIO 6 dbc FUNDAMENTAL P OUT (dbm) FIGURE 12. THIRD HARMONIC RATIO 1-1

7 HFA39 Typical Performance Curves (Continued) Transmit/Receive Switch Performance NOTE: All data measured with V DD TR = +, T A = o C. INSERTION LOSS (db) ISOLATION (db) RETURN LOSS (db) - - INPUT OUTPUT FIGURE 13. RECEIVE MODE T/R INSERTION LOSS/ISOLATION FIGURE 14. RECEIVE MODE T/R SWITCH MATCH Typical Application Example C 8 C 21 V DD (T/R ANT) C 7 C T/R CNTRL 4 24 C 24 RF OUT (Ω TRANSMISSION LINE) RX OUT (Ω TRANSMISSION LINE) V G2 (-) R 3 V DD1 (+) C 22 C R 6 C 11 C 12 C C 4 C 16 C 19 C 3 C C 18 C 14 R 4 R 1 V DD3 (+) V DD2 (+) V G3 (-) V G1 (-) R 2 R C C 23 RF IN (Ω TRANSMISSION LINE) EXTERNAL CIRCUITRY PARTS LIST LABEL VALUE PURPOSE C 3 -C 22pF Bypass (GHz) C 23 -C 22pF DC Block C 11 -C 16 pf Bypass (MHz) C 18 -C 22.1µF Bypass (khz) R 1, R 6 1.kΩ FET Gate Divider R 3, R kω Network R 2 12kΩ R 4 1kΩ NOTE: All off-chip components are low cost surface mount components obtainable from multiple sources. (.in x.4in or.3in x.in.) 1-116