GaAs phemt MMIC Low Noise Amplifier, 0.3 GHz to 20 GHz HMC1049

Transcription

1 ACG ACG ACG FEATURES Low noise figure:. db PdB output power:. dbm PSAT output power: 7. dbm High gain: db Output IP: 9 dbm Supply voltage: VDD = 7 V at 7 ma Ω matched input/output (I/O) -lead mm mm SMT package: mm APPLICATIONS Test instrumentation High linearity microwave radios VSAT and SATCOM Military and space GENERAL DESCRIPTION The HMC9 is a GaAs MMIC low noise amplifier that operates between. GHz and GHz. This LNA provides db of small signal gain,. db noise figure, and an IP output of 9 dbm, yet requires only 7 ma from a 7 V supply. The PdB output power of. dbm enables the LNA to function as a local oscillator (LO) driver for balanced, I/Q, or GaAs phemt MMIC Low Noise Amplifier,. GHz to GHz HMC9 FUTIONAL BLOCK DIAGRAM V DD GND RFIN HMC9 9 V GG Figure. GND RFOUT/V DD 9 7 image rejection mixers. VDD can also be applied to Pin ; however, Pin requires a bias tee with VDD = V. The HMC9 amplifier I/Os are internally matched to Ω and the device is supplied in a compact, leadless, QFN mm mm surface-mount package. - Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9, Norwood, MA -9, U.S.A. Tel: Analog Devices, Inc. All rights reserved. Technical Support

2 HMC9 TABLE OF CONTENTS Features... Applications... Functional Block Diagram... General Description... Revision History... Specifications... Absolute Maximum Ratings... ESD Caution... Pin Configuration and Function Descriptions... Interface Schematics... Typical Performance Characteristics...7 Evaluation Printed Circuit Board... Packaging and Ordering Information... Outline Dimensions... Ordering Guide... REVISION HISTORY / Rev.. to Rev. A This Hittite Microwave Products data sheet has been reformatted to meet the styles and standards of Analog Devices, Inc. Updated Format... Universal Changes to General Description... Change to Table, Thermal Resistance Parameter Column... Added Figure... Changes to Table... Moved Figure to Figure 9 to Interface Schematics Section... Change to Figure and Figure 9... Changes to Figure... Added Ordering Guide Section... Rev. A Page of

3 HMC9 SPECIFICATIONS TA = C, VDD = 7 V, IDD = 7 ma. Table. Parameter Min Typ Max Min Typ Max Min Typ Max Unit FREQUEY RANGE. GHz GAIN.. db Gain Variation Over Temperature..9.7 db/ C NOISE FIGURE db RETURN LOSS Input db Output db OUTPUT Output Power for db Compression (PdB). dbm Saturated (PSAT) 7. dbm Output Third-Order Intercept (IP) 9 dbm TOTAL SUPPLY CURRENT ma Adjust VGG between V to V to achieve IDD = 7 ma typical. Measurement taken at POUT/tone = dbm. Rev. A Page of

4 HMC9 ABSOLUTE MAXIMUM RATINGS Table. Parameter Rating Drain Bias Voltage (VDD) V Drain Bias Voltage (RF Out/VDD) 7 V RF Input Power dbm Gate Bias Voltage, VGG V to +. V Channel Temperature 7 C Continuous PDISS (T = C). W (Derate 7. mw/ C Above C) Thermal Resistance (Channel to Ground.9 C/W Paddle) Temperature Storage Temperature C to + C Operating Temperature C to + C ESD Sensitivity (HBM) Class A Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Table. Typical Supply Current vs. VDD VDD (V) IDD (ma) Adjust VGG to achieve IDD = 7 ma. ESD CAUTION Rev. A Page of

5 HMC9 PIN CONFIGURATION AND FUTION DESCRIPTIONS GND RFIN V GG ACG ACG ACG V DD 7 GND RFOUT/V DD HMC9 TOP VIEW (Not to Scale) NOTES. = NO CONNECT. THESE PINS ARE NOT CONNECTED INTERNALLY; HOWEVER, ALL DATA WAS MEASURED WITH THESE PINS CONNECTED TO RF/DC GROUND EXTERNALLY.. EXPOSED PAD. THE EXPOSED GROUND PADDLE MUST BE CONNECTED TO RF/DC GROUND. Figure. Pin Configuration Diagram - Table. Pin Function Descriptions Pin No. Mnemonic Description,, to,, 7 to, to 9,, No Connect. These pins are not connected internally; however, all data was measured with these pins connected to RF/dc ground externally (see the Typical Performance Characteristics section for data plots). RFIN RF Input. This pin is dc-coupled and matched to Ω. VDD Power Supply Voltage for the Amplifier. External bypass capacitors ( pf and. μf) are required. ACG Low Frequency Termination. An external bypass capacitor of pf is required. RFOUT/VDD RF Output/Alternate Power Supply Voltage for the Amplifier. An external bias tee is required when used as alternative VDD. This pin is dc-coupled and matched to Ω., ACG, Low Frequency Termination. External bypass capacitors of pf are required. ACG VGG Gate Control for Amplifier. Adjust the voltage to achieve IDD = 7 ma. External bypass capacitors of pf,. μf, and.7μf are required., GND Ground. Connect Pin and Pin to RF/dc ground. EP Exposed Pad. The exposed ground paddle must be connected to RF/dc ground. See the Interface Schematics section for pin interfaces. Rev. A Page of

6 HMC9 INTERFACE SCHEMATICS V DD RFIN ACG - Figure. VDD Interface ACG Figure 7. ACG and ACG Interface -9 GND - RFOUT/V DD - Figure. RFOUT/VDD Interface Figure. GND Interface ACG RFOUT/V DD RFIN ACG - -7 Figure 9. ACG Interface Figure. RFIN Interface V GG - Figure. VGG Interface Rev. A Page of

7 HMC9 TYPICAL PERFORMAE CHARACTERISTICS Data taken with VDD applied to Pin, VDD = 7 V. S S S T A = C RESPONSE (db) RETURN LOSS (db) FREQUEY (GHz) - FREQUEY (GHz) -9 Figure. Broadband Gain and Return Loss Figure. Output Return Loss vs. Temperature T A = C T A = C GAIN (db) NOISE FIGURE (db) FREQUEY (GHz) Figure. Gain vs. Temperature -7 FREQUEY (GHz) Figure. Noise Figure vs. Temperature - T A = C T A = C RETURN LOSS (db) NOISE FIGURE (db) FREQUEY (GHz) FREQUEY (GHz) - Figure. Input Return Loss vs. Temperature Figure. Noise Figure vs. Temperature, Low Frequency Rev. A Page 7 of

8 HMC9 V DD = V V DD = 7V V DD = V 7 T A = C NOISE FIGURE (db) PdB (dbm) FREQUEY (GHz) Figure. Noise Figure vs. VDD - FREQUEY (GHz) Figure 9. PdB vs. Temperature - I DD = ma I DD = 7mA I DD = ma T A = C NOISE FIGURE (db) P SAT (dbm) 7 FREQUEY (GHz) Figure 7. Noise Figure vs. IDD - FREQUEY (GHz) Figure. PSAT vs. Temperature - T A = C V DD = V V DD = V V DD = 7V IP (dbm) PdB (dbm) FREQUEY (GHz) - FREQUEY (GHz) -7 Figure. Output IP vs. Temperature Figure. PdB vs. VDD Rev. A Page of

9 HMC9 P SAT (dbm) FREQUEY (GHz) V DD = V V DD = V V DD = 7V - P OUT (dbm), GAIN (db), PAE (%) GAIN P OUT PAE INPUT POWER (dbm) - Figure. PSAT vs. VDD Figure. Power GHz ISOLATION (db) FREQUEY (GHz) T A = C -9 P OUT (dbm), GAIN (db), PAE (%) GAIN P OUT PAE INPUT POWER (dbm) - Figure. Reverse Isolation vs. Temperature Figure. Power GHz Rev. A Page 9 of

10 HMC9 P OUT (dbm), GAIN (db), PAE (%) GAIN P OUT PAE 9 9 INPUT POWER (dbm) Figure. Power GHz - GAIN (db), P SAT (dbm) GAIN P SAT NOISE FIGURE 7 I DD (ma) Figure. Noise Figure, Gain, and Power vs. Supply GHz NOISE FIGURE (db) - GAIN (db), P SAT (dbm) NOISE FIGURE (db) GAIN P SAT NOISE FIGURE V DD (V) - Figure 7. Noise Figure, Gain, and Power vs. Supply GHz Rev. A Page of

11 HMC9 Data taken with VDD applied to the bias tee at Pin. S S S T A = C RESPONSE (db) IP (dbm) FREQUEY (GHz) Figure 9. Broadband Gain and Return Loss, VDD = V, Supply to Bias Tee - FREQUEY (GHz) Figure. Output IP vs. Temperature, VDD = V, Supply to Bias Tee - T A = C 7 T A = C GAIN (db) PdB (dbm) FREQUEY (GHz) - FREQUEY (GHz) -9 Figure. Gain vs. Temperature, VDD = V, Supply to Bias Tee Figure. PdB vs. Temperature, VDD = V, Supply to Bias Tee T A = C T A = C NOISE FIGURE (db) P SAT (dbm) FREQUEY (GHz) Figure. Noise Figure vs. Temperature, VDD = V, Supply to Bias Tee -7 FREQUEY (GHz) Figure. PSAT vs. Temperature, VDD = V, Supply to Bias Tee - Rev. A Page of

12 HMC9 EVALUATION PRINTED CIRCUIT BOARD J J J IN C C + VDD C --- OUT U J C U C C H9 XXXX C C7 VGG J J C9 + - Figure. Evaluation Board Layout C pf 9 7 J C.7µF + V DD J C nf C pf IN V DD GND RFIN ACG HMC9 RFOUT/V DD OUT J 9 7 V GG ACG ACG 7 9 J C9.7µF + C nf C pf PACKAGE BASE GND C pf C7 nf - Figure. Evaluation Board Schematic Rev. A Page of

13 HMC9 Table. List of Materials for Evaluation PCB Item Description J, J, J, J PCB mount SMA RF connector J, J DC pins C to C pf capacitor, package C to C7 pf capacitor, package C, C9.7 μf capacitor, tantalum U HMC9LPE PCB --- evaluation PCB The circuit board used in the application should use RF circuit design techniques. Signal lines should have Ω impedance; connect the package ground leads and exposed paddle directly to the ground plane. Use a sufficient number of via holes to connect the top and bottom ground planes. The evaluation circuit board shown is available from Analog Devices, Inc., upon request. Circuit board material: Rogers or Arlon FR. Rev. A Page of

14 HMC9 PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS TOP VIEW BOTTOM VIEW FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUTION DESCRIPTIONS SECTION OF THIS DATA SHEET. NOTES:. LEADFRAME MATERIAL: COPPER ALLOY. DIMENSIONS ARE IN IHES [MILLIMETERS].. LEAD SPACING TOLERAE IS NON-CUMULATIVE.. PAD BURR LENGTH SHALL BE.mm MAXIMUM. PAD BURR HEIGHT SHALL BE.mm MAXIMUM.. PACKAGE WARP SHALL NOT EXCEED.mm.. REFER TO ANALOG DEVICES APPLICATION NOTE FOR SUGGESTED PCB LAND PATTERN. Figure 7. -Lead Quad Flat No-Lead Package [QFN] mm mm Body, Very Thin Quad Dimensions shown in inches and [millimeters] ORDERING GUIDE Model Temperature Range Lead Finish MSL Rating Package Description Qty. Branding HMC9LPE C to + C % matte Sn MSL -Lead QFN HMC9LPETR C to + C % matte Sn MSL -Lead QFN, 7 Tape and Reel EVAL-HMC9LP E = RoHS Compliant Part. MSL rating indicates a maximum peak reflow temperature of C. Four-digit lot number, XXXX. Evaluation board ---A H9 XXXX H9 XXXX Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D--/(A) Rev. A Page of